This code uses HW difference on the USB_RESET pin (added PULL UP resistor
on the L333 rev) to distinguish between two BK4 HW revisions.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Add Falcon mode support, which allows the SPL to load and
jump to the Linux kernel directly, without the need of loading
U-Boot proper.
CONFIG_SPL_OS_BOOT=y needs to be passed in the defconfig
in order to use Falcon mode.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Add the initial support for the pico-imx6 variants.
DDR initialization is based on the TechNexion's U-Boot code.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
When CONFIG_SPL_OS_BOOT is selected, it is still convenient to be able
to escape from Falcon mode and boot to U-Boot proper.
Add a mechanism that allows booting in U-Boot proper when the
key 'c' is entered on console at boot time.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Improve the README by adding instructions on how to boot using
Falcon mode, which allows the SPL to load the kernel directly,
without using U-Boot proper.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
When CONFIG_SPL_OS_BOOT is selected, it is still convenient to be able
to escape from Falcon mode and boot to U-Boot proper.
Add a mechanism that allows booting in U-Boot proper when the
key 'c' is entered on console at boot time.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Sync the Falcon mode instructions with the ones fro pico-imx7d.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Add support for the VXT VL050-8048NT-C01 panel connected through
the 24 bit parallel LCDIF interface.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Because FIT could not be used for AHAB secure boot on i.MX8,
so switch to use container image that could let SPL verify
ATF and U-Boot with AHAB.
Enable HUSH_PARSER in defconfig to make run netboot could work.
Note: The AHAB related code has not been added.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Because FIT could not be used for AHAB secure boot on i.MX8,
so switch to use container image that could let SPL verify
ATF and U-Boot with AHAB.
Note: The AHAB related code has not been added.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The first stage of flash.bin is larger than 584 * 512, so when
writting u-boot.itb, some data will be override. Enlarge the
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to fix boot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since the SD3.0 kernel driver needs M4 image support, this causes
problem for usb boot booting into kernel. To decouple the relationship,
we modify the FDT file in u-boot to disable SD3.0.
So the kernel won't depend on M4 image.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This prevents messages like
gpio@20a0000: get_value: error: gpio GPIO2_2 not reserved
when CONFIG_DM_GPIO is enabled.
Also, when CONFIG_DM_GPIO is enabled, checkboard is too
early to use gpio_get_value, so read it directly on failure.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Commit e37ac717d7 ("Convert to use fsl_esdhc_imx for i.MX platforms")
converted FSL_ESDHC to FSL_ESDHC_IMX, but the config check for
apalis_imx6 wasn't updated accordantly.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Only one dtb is currently supported, so match with imx6-apalis.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
To support DM_VIDEO,
Add display node for lcdif
Drop board iomuxc settings.
Enable DM_VIDEO
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
When booting SPL on the board, met boot failure:
"
Trying to boot from MMC2
MMC Device 1 not found
spl: could not find mmc device 1. error: -19
SPL: failed to boot from all boot devices
"
Let's register the two mmc controllers in SPL stage to
avoid boot failure.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Add i.MX6ULZ board support. the i.MX6ULZ is SW compatible
with i.MX6ULL. so most code of i.MX6ULL can be reused
by i.MX6ULZ.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Modify the configuration naming to be generic to xilinx rather than
specific to Versal. The offset value is different for Zynq and ZynqMP
to avoid overlapping with FSBL.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Move the exisiting function of getting board dtb from versal to a common
Xilinx folder.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Probe ZynqMP firmware driver on the board initialization phase and
ensure that firmware is in place to continue execution. The probing is
done on board_init so it can be used for both SPL and U-Boot proper.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Use the new function from firmware version to get the firmware version.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
New firmware header to place firmware specific macro and function
declarations. The patch also moves the macros defining PM operations as
well as some helper macros.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There were several changes in past in this file without removing headers
(watchdog cleanup, soft reset, etc). That's why remove additional useless
headers.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Setup initrd_high and fdt_high to be placed in lowmem space for kernel to
be able to reach it. Values are setup at run time to ensure that the same
setting can be used on different memory setup. Do this setting only when
variables are not
Similar run time detection was done for Zynqmp and Versal.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Similar SCs but different wiring.
- dc_i2c is connected to X-PRC cards that's why label is required to have
an option to hook up some devices.
- Exactly identify i2c devices on x-prc boards.
In case of missing i2c connection devices won't be accessible.
- USB 0 should be device mode with super speed.
- USB 1 should be host mode.
- Fix i2c mux reset pin entry - commented, not verified.
- Fix i2c1 eeprom compatible string - it is an ST 128Kbit device.
Need to use atmel fallback.
- Fix si570 I2C slave address and add corresponding part numbers.
- Enable AMS for system monitoring.
- phy reset property should be commented because it will throw a
warning dump when called from context that can sleep.
No support for phys property (zynqmp phy driver) with SGMII.
Add is-internal-pcspma property required by uboot.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Xilinx Zynq SoC has two sdhci controllers but boot is only possible from
the first one. That's why there is a need to specify controller number.
mmc1 is supposed to be secondary boot device and should be also listed in
distribution boot.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add zu48dr and zu49dr to the list of zynqmp devices. The zu48dr and zu49dr
are the new RFSoC silicons with id values of 0x7b and 0x7e.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new jtag distro boot command to look for bootscript file in
DDR and execute it first incase of jtag bootmode.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new dfu usb distro boot command to look for bootscript
from dfu-util and runs it.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
This patch adds new jtag distro boot command to look for bootscript file
in DDR and execute it first incase of jtag bootmode.
This patch also updates scriptaddr to 512MB as there is high of script
corruption incase of bigger kernel image.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Code reads DT and setup MMU table based on memory node. This will ensure
that only DT needs to be changed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds PL bitstream load support for Versal platform. The PL
bitstream is loaded by making an SMC to ATF which in turn communicates
with platform firmware which configures and loads PL bitstream on to PL.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Define board_late_init which performs bootmode detection
and prepares corresponding distro boot commaand sequence.
Also disable it for mini platforms because simply there is no need to have
it enabled.
But also disable it for virtual platform because Qemu is not modelling this
register space that's why travis testing would fail. This configuration
should be reverted when mainline Qemu is updated.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds sdboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Thsi patch adds qspiboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Boot from QSPI nor flash.
The at91bootstrap, u-boot, u-boot env redundant, u-boot env,
device tree and kernel will reside in the QSPI nor flash.
The rootfs will reside in the NAND flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
- EBI Chip Select Register is now in SFR,
- the pins are set to default values,
- timings are matching MT29F4G08BABWP's nand flash requirements.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[tudor.ambarus@microchip.com:
- fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest macros
- drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros
- drop inclusion of asm/arch/at91sam9_smc.h]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Remove 2017 from being printed at boot video console.
This is outdated.
To avoid this situation, remove the year completely.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add support for qspi memory on board. Created boot support for QSPI
for both u-boot proper and SPL.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip
WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Since there is now a new version of the FSP and it is incompatible with
the existing version, move the code into an fsp1 directory. This will
allow us to put FSP v2 code into an fsp2 directory.
Add a Kconfig which defines which version is in use.
Some of the code in this new fsp1/ directory is generic across both FSPv1
and FSPv2. Future patches will address this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and
usdhc2. This creates the missing imx6q-logicpd-u-boot.dtsi file
which will enable these functions so SPL can properly setup UART, detect
microSD card, and startup.
Fixes: 8f4691e31a ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled,
remove MMC init")
Signed-off-by: Adam Ford <aford173@gmail.com>
On HS devices the access to TRNG is restricted on the non-secure
ARM side, disable the node in DT to prevent firewall violations.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
When booting through the efi stub, the memory map get's created by
reading the dram bank information. Depending on the version of the RPi4
this information changes. Read the device tree to initialize the dram
bank data structure. This way the kernel is able to access the whole
range of available memory.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Add SerDes1 protocol 14 in the list of supported protocols.
This configuration enables one high-speed 100G port and PCIe x4.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The code that generates the compatible property concatenates the
ethernet phy id and clause-compatible information without
separating them with a comma, resulting into no ethernet phy driver
getting loaded by Linux kernel.
Suffix phy_id_compatible_str with comma to fix this
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
lx2160a rev1 and rev2 SoC has different pcie controller.
The pcie controller device tree node fields "compatible"
and registers names needs to be updated accordingly
This change in device tree is handled as part of
fdt fixups. These changes would only be applied
if the soc revision is not rev1.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
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Merge tag 'rpi-next-2019.10' of https://github.com/mbgg/u-boot
- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
Define the memory map for the BCM2711 based on the dt configuration
available in the Raspberry Pi kernel fork.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
[mb: BCM2838 -> BCM2711]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The Raspebrry Pi 4 uses the new revision code scheme as documented by
the foundation. This change adds an entry for this board as well.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Align the board and driver prototype for board_interface_eth_init
to avoid execution issue (the interface_type parameter is defined
as int or phy_interface_t).
To have a generic weak function (it should be reused by other driver)
I change the prototype to use directly udevice.
This prototype is added in netdev.h to allow compilation check
and avoid warning when compiling with W=1 on file
board/st/stm32mp1/stm32mp1.c
warning: no previous prototype for 'board_interface_eth_init'\
[-Wmissing-prototypes]
int board_interface_eth_init(int interface_type, ....
^~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
These are some very late changes mostly required to get 64-bit
division working on ARC boards.
For that we had to import missing parts of libgcc and add compiler
flags to EMSDP which otherwise used very simple profile for compliation.
And while at it another fix for EM SDP initialization is inluded as well.
Even though EM SDP is FPGA-based board and different FPGA
images (known as .bit-files) are awailable for the board still
there's a common subset of options we may rely on for all configs.
These are:
* Normalizer
* Swap instructions
* Simple multiplier
* Barrel-shifter
* Floating-point unit
* Shorter instructions (code density)
This among other improvements allows to compile code with
64-bit divisions, see [1].
[1] https://patchwork.ozlabs.org/patch/1156541/
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
If the "Page Mode" is not enabled on the device,
read operations from PSRAM may result in incorrect data.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Find the UCLASS_CACHE driver to configure the cache controller's
settings.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch sets the serial# environment variable by reading the
board serial number from the OTP memory region.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Add DT entry for the DM PCI driver, update board configs
and drop ad-hoc board init code for the PCI bus. Instead,
let the DM PCI driver initialize and operate the hardware.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This reverts commit fc04b92354 where the
FVP DRAM configuration was added.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines for P2041RDB,
P3041, P4080, P5020 and P5040 DS boards only when DM_PCI is
not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines for P1020,
P1021, P1024, P1025 and P2020 RDB boards only when DM_PCI
is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Support of device tree model for T2080RDB, T4240RDB, T1024RDB,
T1042D4RDB, P1020RDB, P2020RDB, P2041RDB, P3041DS, P4080DS, P5040DS and
MPC8548CDS. Also support of i2c dm model.
Add example of its files to generate FIT to start kernel
on ev1 or dk2 board with
- only kernel and dtb = fit_copro_kernel_dtb.its
- kernel, M4 copro firmware and dtb = it_copro_kernel_dtb.its
Add extlinux example to manage config in generated FIT.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Implements copro image loading with FIT.
Once image is loaded with remoteproc,
the M4 coprocessor is automatically started.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Update management of misc_read, which now return length of data
after the commit 8729b1ae2c ("misc: Update read() and write()
methods to return bytes xfered")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Update management of misc_read in sysconf_init, which now return
length of data after the commit 8729b1ae2c ("misc: Update read()
and write() methods to return bytes xfered")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Update the stm32mp1 baord after the commit 8729b1ae2c
("misc: Update read() and write() methods to return bytes xfered")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Due to kernel DT alignment, pwr-supply is renamed to vdd-supply
and is a subnode of pwr-regulators.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As for Audio codec IC, HDMI IC is not "IO safe".
HDMI regulators (v3v3 and v1v2) must be enabled to allow
I2C1 bus usage. HDMI IC must be under reset during power up
and keep HDMI and AUDIO devices in reset while they are not
used in U-Boot to keep them in low power mode
(each device can be kept in reset independently keeping their
power supplies ON until kernel).
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Depending on backup register value, we maintain the debug unit
powered-on for debugging purpose.
Only BUCK1 is required for powering the debug unit, so revert
the setting for all the other power lanes, except BUCK3 that
has to be always on.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add device tree for P1041RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for T1042D4RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for T1024RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for T2080RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
When 'make qemu-riscv64_defconfig', there is a build warning:
board/emulation/qemu-riscv/Kconfig:24:
warning: config symbol defined without type
Fix it by specifying the config symbol type to 'hex'.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL
enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The
configurations are meant to help the development of SPL on RISC-V.
The configurations enable RAM as the only SPL boot device. Images must
be loaded at address 0x80200000. In the default boot flow, U-Boot SPL
starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot
proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is
then started in supervisor mode by OpenSBI.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
We should use the shared helpers to setup the necessary parts
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec. The ICID macros for SEC needed to be adapted because
the format of the registers is different.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used
to control SPI and other IP signal routing.
USBOSC:
0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz.
SPI devices are unusable in this mode.
1= SPI_CLK used as SPI clock.
SPI devices are usable in this mode. USB block is clocked from
internal sources
SPR[3:2]:
SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]):
00= SDHC/eMMC 8-bit
01= SD Card Rev 2.0/3.0
10= SPI on-board memory
11= TDM Riser / SPI off-board connector.
The default value is 00 if an SDCard/eMMC card is selected as the boot
device.
SPR[1:0]:
SPI_SIN/SOUT/SCK Routing (schematic net CFG_SPI_ROUTE[1:0]):
00= SDHC Sync loop
01= TDM Riser / SPI off-board connector.
10= SPI on-board memory.
11= SPI off-board connector.
By default, the SPI feature is not available, so we need to configure
the above register fields to select the route to the SPI feature.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Flexcan in LX2160ARDB is controlled by FPGA register boardcfg4
bit 5. enable this bit so that flexcan is enabled in LX2160ARDB.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls1088a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add an implementation of the rtc_enable_32khz_output() that uses the
driver model i2c APIs.
Also put code related to rtc_enable_32khz_output
under CONFIG_RTC_ENABLE_32KHZ_OUTPUT.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls2088a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls1028a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used. When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch solves
the problem that the i2c-related api of the lx2160a platform does not
support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
This driver needs modification to work with new soc,
like ls1028, since bitmap of RCFG is changed to
RESV[7:5] LIVE[4] WDEN[3] RESV[2:1] GO[0]
000 1 0 00 0
Also the RCW location is moved to only dutcfg0.
RESV[7:4] RCWSRC[3:0]
1111 configurable
Following commands are functional now
qixis_reset
qixis_reset sd
qixis_reset qspi
qixis_reset emmc
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
The Kconfig file calls to ti/common/Kconfig twice which makes
several of the menu items repeat themselves. In an effort to
clean this up, this patch removes the second call which eliminates
the duplicate menu items.
Signed-off-by: Adam Ford <aford173@gmail.com>
Sorry for the noise, but there appears to be a regression with older
hardware. Since it broke the direct_nor boot option, it should be
reverted until a better solution is available.
This reverts commit 51cd1e2373.
The full path has changed in the recent kernels so that it is
not possible to load them. Aliases "ethernet0" and "ethernet1"
are still present in both legacy and new kernels.
Also, fix error messages to correspond to the taken actions.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Historically there have been various boot options, SPI flash,
NAND or NOR. The NOR flash is mutually exclusive with MMC, but
it isn't mutually exclusive with NAND or SPI Flash, so this patch
enables both NAND flash and SPI Flash when booting from NOR.
Signed-off-by: Adam Ford <aford173@gmail.com>
This commit adds support for the B&R brsmarc1 SoM.
The SoM is based on TI's AM335x SoC.
Mainly vxWorks 6.9.4.x is running on the board,
doing some PLC stuff on various carrier boards.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
The SPL for the Overo board does not initialise the MMC. Hence, it
cannot load the main boot loader from the SD card susequently. This
patch moves the initialisation code for the MMC so it gets included in
the SPL.
[trini: Add missing header]
Signed-off-by: Tom Rini <trini@konsulko.com>
The SEI510 board is based on the Amlogic S905X2 SoC
from the Amlogic G12A SoC family.
The board has the following specifications :
- Amlogic S905X2 ARM Cortex-A53 quad-core SoC
- XGB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- eMMC
- SDcard
- Infrared receiver
- SDIO WiFi Module
The board default behaviour is for booting Android and triggers
fastboot on recovery or reboot mode.
USB vendor ID (used by fastboot) is 0x18d1 (Google) for
default udev rules for existing android users work out of the box.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This board is unmaintained and can be removed. This also allows us to
remove kmp204x-common.h and integrate it in kmp204x.h.
Signed-off-by: Valentin Longchamp <valentin.longchamp@ch.abb.com>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Remove the PORTL2 board and all its dependencies as it is no longer
supported by the company.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Activate the driver model for the Ethernet interface (RGMII) in the KM
Kirkwood Kconfig file. Additionally, raise the auto negotiation timeout
to eight seconds as more time is required for those boards.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Activate the driver model for the serial interface in the KM Kirkwood
Kconfig file. The associated preprocessor definitions could be removed
from the header file. However, the clock of 200 MHz needs to be declared
in the device tree.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
After moving the KM specific configurations to Kconfig, the associated
preprocessor definitions can now be removed in the headers. Moreover, the
whitelist has been adapted correspondingly.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
To execute the conversion away from board specific header files, Kconfig
menus have been implemented for all KM boards and additionally for those
having an ARM architecture.
For the moment, the preprocessor definitions stay in the headers. The
boolean types, however, needed a modification (#define CONFIG_* 1).
The default configuration files of some boards required an update in order
to not change the currently defined values of the configurations.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This file contains lots of internal details about the environment. Most
code can include env.h instead, calling the functions there as needed.
Rename this file and add a comment at the top to indicate its internal
nature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Fixup apalis-tk1.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
This header file is now only used by files that access internal
environment features. Drop it from various places where it is not needed.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Move these functions to the new header file and rename set_default_env()
to env_set_default() so that it has a consistent env_ prefix.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Move env_set_hex() over to the new header file along with env_set_addr()
which uses it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
As part of the effort to remove things from common.h, create a new header
for the gzip functions. Move the function declarations to it and add
missing documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This commit adds board support for Hikey960 board from Hisilicon. This
board is one of the Consumer Edition boards of the 96Boards family
powered by Kirin960 SoC.
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/hikey960/
The initial supported/tested devices include:
- Debug serial
- SD
With these support, it's good enough for loading Linux Kernel from SD.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
giedi and deneb are i.MX8X based and have additional data with
WLAN MAC in factoryset container. Enable building for these
boards and adapt factoryset functions to set WLAN MAC and dtb
name in environment.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
For new boards we always enable DM_I2C. Extend factoryset functions
to support EEPROM reading on these boards.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
- Enable SD slot on Intel Edison
- Populate CSRT ACPI table for shared DMA controller on Intel Tangier
- Convert Intel ICH-SPI driver to use new spi-mem ops
- Enable config_distro_bootcmd for QEMU x86
- Support U-Boot as a payload for Intel Slim Bootloader
- Avoid writing temporary asl files into the source tree which fixes the
parallel build issue occasionally seen
Support the V1.2 hardware revision with the following pin muxing
changes:
Ddc_scl_pv4 and ddc_sda_pv5 previously used as Apalis GPIO3 and GPIO4
are now used as DDC pins.
Gen2_i2c_scl_pt5 and gen2_i2c_sda_pt6 previously used as DDC pins are
now used as USB power enable signals.
Usb_vbus_en0_pn4 and usb_vbus_en1_pn5 previously used as USB power
enable signals are now used as GPIO3 and GPIO4.
Additionally a new device tree file tegra124-apalis-v1.2-eval.dtb is
loaded on V1.2 and later modules and resp. USB power enable signals
activated.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
When mainline kernels reboot TK1 they use SW_RESET,
that reset mode does not reset PMIC. Some rails
need to be off for RAM Re-repair to work correctly.
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Make sure the Apalis GPIO 8 aka FAN_EN is on when using Apalis TK1
modules.
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
By keeping RESET_MOCI_CTRL low we avoid explicitly releasing
RESET_MOCI#.
Please note that module hardware versions up to V1.1A will already
release RESET_MOCI# in hardware coming out of reset.
Please further note that with this change the USB hub on the Apalis
Evaluation board is kept in reset in U-Boot and therefore none of its
ports are operational in U-Boot.
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add slimbootloader board to run U-boot as a Slim Bootloader payload
- Add new board/intel/slimbootloader directory with minimum codes
- Add slimbootloader configuration files
- Add doc/board/intel/slimbootloader.rst
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add slimbootloader board MAINTAINERS file]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Enable SD slot on Intel Edison platform.
By default firmware doesn't put device on active state. Thus,
we have to do this explicitly.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Add rk3399 boards Khadas Edge/-V/-Captain
- Add fully souce code support for rk3328 including TPL/DRAM init
- Enable boot from eMMC for rk3399 rock960/ficus boards
- turn on the IO supply for dw_mmc
Add devicetree support for Khadas Edge-Captain.
Khadas Captain is the carrier board for Khadas Edge.
Specification
- Rockchip RK3399
- Dual-Channel 2GB/4GB LPDDR4
- SD card slot
- Onboard 16GB/32GB/128GB eMMC
- RTL8211FD 1Gbps
- AP6356S/AP6398S WiFI/BT
- HDMI Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- Full 4 Lane M.2 Socket
- 16MB SPI Flash
- IR
- Programmable MCU
Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2:
"arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards"
(sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e)
Signed-off-by: Nick Xie <nick@khadas.com>
Tested-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add devicetree support for Khadas Edge-V.
Khadas Edge-V is a Khadas VIM form factor Rockchip RK3399 board.
Specification
- Rockchip RK3399
- Dual-Channel 2GB/4GB LPDDR4
- SD card slot
- Onboard 16GB/32GB/128GB eMMC
- RTL8211FD 1Gbps
- AP6356S/AP6398S WiFI/BT
- HDMI Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- Full 4 Lane M.2 Socket
- 16MB SPI Flash
- IR
- Programmable MCU
Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2:
"arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards"
(sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e)
Signed-off-by: Nick Xie <nick@khadas.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add devicetree support for Khadas Edge.
Khadas Edge is an expandable Rockchip RK3399 board with goldfinger.
Specification
- Rockchip RK3399
- Dual-Channel 2GB/4GB LPDDR4
- Onboard 16GB/32GB/128GB eMMC
- RTL8211FD 1Gbps
- AP6356S/AP6398S WiFI/BT
- HDMI Out, DP
- USB 3.0, 2.0
- USB Type C power and data
- 16MB SPI Flash
- Programmable MCU
Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2:
"arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards"
(sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e)
Signed-off-by: Nick Xie <nick@khadas.com>
Tested-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
- add support for 4GiB DRAM memory
- add support for Amlogic G12B based Odroid-N2
- small duplicate logic fix for gxbb clock driver
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Merge tag 'u-boot-amlogic-20190731' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- sync Amlogic G12A DT with linux 5.3-rc1
- add support for 4GiB DRAM memory
- add support for Amlogic G12B based Odroid-N2
- small duplicate logic fix for gxbb clock driver
This reverts commit 877ab2423b.
The above patch was designed to shrink code by only pin-muxing items
needed for SPL in SPL and relying on driver model or SPL to mux other
items. Unfortunately, da850evm_direct_nor doesn't use SPL so items
that were only muxed during SPL are not muxed causing the board
to no longer boot.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the removal of da850_am18xxevm, there is at least one
whitelisted CONFIG option that can be deleted. This patch
removes CONFIG_DA850_AM18X_EVM since it's not required any more
Signed-off-by: Adam Ford <aford173@gmail.com>
ODROID-N2 is a single board computer manufactured by Hardkernel Co. Ltd
with the following specifications:
- Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
- 4GB DDR4 SDRAM
- Gigabit Ethernet
- HDMI 2.1 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 3.0 Host, 1 x USB OTG
- eMMC, microSD
- Infrared receiver
The board directory is W400, the name of the Amlogic Reference Design
of Amlogic G12B with Gigabit boards, which will be used for similar
boards.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
fpga:
- Xilinx virtex2 cleanup
- Altera cyclon2 cleanup
zynq:
- Minor Kconfig cleanup
- Add psu_init configuration for Z-turn board
zynqmp:
- Add support for pmufw config passing to PMU
- script for psu_init conversion
- zcu1275 renaming
xilinx:
- Add support for UltraZed-EV SoM
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Merge tag 'xilinx-for-v2019.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx/FPGA changes for v2019.10
fpga:
- Xilinx virtex2 cleanup
- Altera cyclon2 cleanup
zynq:
- Minor Kconfig cleanup
- Add psu_init configuration for Z-turn board
zynqmp:
- Add support for pmufw config passing to PMU
- script for psu_init conversion
- zcu1275 renaming
xilinx:
- Add support for UltraZed-EV SoM
xilinx_zynqmp_mini configuration is throwing build error:
readlink: missing operand
Try 'readlink --help' for more information.
because CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE is not defined at all and
Makefile pass ifneq condition. Add SPL_BUILD dependency which is also
reflected in Kconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The board was added without adding a MAINTAINERS entry.
Fixes:
$ ./tools/genboardscfg.py -f
WARNING: no status info for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
WARNING: no maintainers for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
$
Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the
only publicly-available compatible carrier card. The SoM is based on the EV
version of the Xilinx ZynqMP SoC+FPGA.
The psu_init_gpl.c file has been generated from the board definition files
at [0] using Vivado 2018.3 and then minimized by
tools/zynqmp_psu_init_minimize.sh. Manually removed serdes init code since
it is not mentioned in device tree and fixed a checkpatch error.
[0] 3686c9ff7d/ultrazed_7ev_cc/1.1
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fixes sparse warnings when building zynqmp defconfigs:
./board/xilinx/zynqmp/xil_io.h:12:6: warning: symbol 'Xil_Out32' was not declared. Should it be static?
./board/xilinx/zynqmp/xil_io.h:17:5: warning: symbol 'Xil_In32' was not declared. Should it be static?
./board/xilinx/zynqmp/xil_io.h:22:6: warning: symbol 'usleep' was not declared. Should it be static?
Also add __maybe_unused to usleep() since it is not used by minimized
psu_init_gpl.c files, so it would warn as "defined but not used".
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Optionally allow U-Boot to load a configuration object into the Power
Management Unit (PMU) firmware on Xilinx ZynqMP.
The configuration object is required by the PMU FW to enable most SoC
peripherals. So far the only way to boot using U-Boot SPL was to hard-code
the configuration object in the PMU firmware. Allow a different boot
process, where the PMU FW is equal for any ZynqMP chip and its
configuration is passed at runtime by U-Boot SPL.
All the code for Inter-processor communication with the PMU is isolated in
a new file (pmu_ipc.c). The code is inspired by the same feature as
implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted
Firmware:
* fb647e6b4c/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c (L295)
* c48d02bade/plat/xilinx/zynqmp/pm_service/pm_api_sys.c (L357)
SPL logs on the console before loading the configuration object:
U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200)
Loading PMUFW cfg obj (2008 bytes)
EL Level: EL3
...
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable CONFIG_SPL_DM and enable the driver model for serial by defining
an appropriate device in the board file for da850-lcdk.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
This board has been abandonded for a while. I do not have this hardware
and nobody has appeared to notice and/or care that it's orphaned.
Since much of this code is inserted into the da850evm code base, removing
it from support will make da850evm support easier going forward.
This patch removes the da850_am18xxevm_defconfig, README references to this
board and the reference to this board from the MAINTAINERS list.
Signed-off-by: Adam Ford <aford173@gmail.com>
