Commit Graph

259 Commits

Author SHA1 Message Date
Tom Rini
9c6115822e Merge branch '2019-08-11-ti-imports'
- More DaVinci updates and fixes
- PCIe support on am65x
- Watchdog converted to DM
- Assorted other bugfixes
2019-08-12 18:47:53 -04:00
Sekhar Nori
476e991452 arm: dts: k3-am65: add support for PCIe and SERDES
Add needed device-tree nodes to support PCIe 0
and SERDES on AM65x SoC. The nodes are kept
disabled by default.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-12 13:33:40 -04:00
Manivannan Sadhasivam
af8a735ed0 arm: dts: Import HI3660 devicetree from Linux
This commit imports HI3660 SoC devicetree from Linux

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-08-11 16:43:41 -04:00
Marek Vasut
a811e19b91 ARM: dts: renesas: Add R8A77980 V3H DTs and headers
Import R8A77980 V3H DTs and headers from Linux 5.2.7 , commit 5697a9d3d55f.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
Ryder Lee
4f3ee271eb ARM: dts: add hifsys reset for MediaTek SoCs
This adds missing hifsys reset parts in header files.

Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
2019-08-07 15:31:03 -04:00
Tom Rini
bbaf56eda0 - sync Amlogic G12A DT with linux 5.3-rc1
- add support for 4GiB DRAM memory
 - add support for Amlogic G12B based Odroid-N2
 - small duplicate logic fix for gxbb clock driver
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Merge tag 'u-boot-amlogic-20190731' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- sync Amlogic G12A DT with linux 5.3-rc1
- add support for 4GiB DRAM memory
- add support for Amlogic G12B based Odroid-N2
- small duplicate logic fix for gxbb clock driver
2019-07-31 16:06:24 -04:00
Neil Armstrong
0d84acb00a ARM: dts: add support for Odroid-N2
Import HardKernel Odroid-N2 DT from Linux 5.3-rc1, commit 5f9e832c1370
("Linus 5.3-rc1") based on an Amlogic G12B S922X SoC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2019-07-31 12:10:50 +02:00
Neil Armstrong
d93757f2f6 ARM: dts: Sync Amlogic G12A with Linux 5.3-rc1
Sync the Amlogic Meson G12A DT and Bindings file with the Linux 5.3-rc1
from the commit 5f9e832c1370 ("Linus 5.3-rc1").

Also remove the meson-g12a-u-boot.dtsi and meson-g12a-u200-u-boot.dtsi,
now conflicting with the main DT content.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
2019-07-31 12:10:42 +02:00
Tom Rini
dcf722ece6 Merge branch 'master' of git://git.denx.de/u-boot-sh 2019-07-30 19:19:04 -04:00
Lokesh Vutla
382f1dda97 dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
Add pinctrl macros for J721E SoC. These macro definitions are
similar to that of AM6, but adding new definitions to avoid
any naming confusions in the soc dts files.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26 21:49:28 -04:00
Lokesh Vutla
c163af6cb8 dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access
TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:23 -04:00
Eugeniu Rosca
70f3b164a6 dt-bindings: Synchronize R-Car Gen3 headers with Linux 5.2
Backport and squash below Linux v5.2 commits:

Commit id       *  Summary line
da3e1c57caf93e [1] soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain
b5eb730e031aca [1] soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains
3961d355dfb512     dt-bindings: power: r8a77965: Remove non-existent A3IR power domain

(*) Patch id mismatch between Linux and U-Boot commit
[1] Dropped changes in drivers/soc/renesas/r8a77970-sysc.c,
    since the file doesn't exist in U-Boot.

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
2019-07-23 13:38:23 +02:00
Anup Patel
66591a719a clk: sifive: Sync-up DT bindings header with upstream Linux
The location and license header of DT bindings header for SiFive
clock driver has changed in upstream Linux hence this patch.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-19 14:24:51 +08:00
Patrick Delaunay
d3f077b349 dt-bindings: pinctrl: stm32: add new entry for package information
Add "st,package" entry. Possibles values are:
-STM32MP_PKG_AA for LFBGA448 (18*18) package
-STM32MP_PKG_AB for LFBGA354 (16*16) package
-STM32MP_PKG_AC for TFBGA361 (12*12) package
-STM32MP_PKG_AD for TFBGA257 (10*10) package

see Linux commit 966d9b928f626a54a0c27c0fdae1e3dfe9bab416
for v5.2-rc1

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:18:53 +02:00
Heinrich Schuchardt
143256b353 fdt: update bcm283x device tree sources to Linux 5.1-rc6 state
Updating the bcm283x device tree sources adds the device trees for

- Raspberry Pi 3 Model A+
- Raspberry Pi 3 Model B+
- Raspberry Pi Compute Module IO board rev1
- Raspberry Pi Compute Module 3 IO board V3.0
- Raspberry Pi Zero

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-06-12 12:23:46 +02:00
Neil Armstrong
b1e81e67ee ARM: dts: sync Amlogic G12A DT with Linux 5.2-rc1
Sync from Linux commit a188339ca5a3 ("Linux 5.2-rc1")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-05-31 09:57:49 +02:00
Chris Brandt
3529596442 ARM: dts: renesas: Add RZ/A1 platform code
Add platform code and DTs for Renesas RZ/A1 R7S72100 SoC.
Distinguishing feature of this SoC is that it has up to
10 MiB of on-SoC static RAM (SRAM).

The DTs are imported from Linux 5.0.11, commit d5a2675b207d .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-07 05:41:32 +02:00
Tom Rini
86f578ee85 - mscc: small fixes, enhance network support for Serval, Luton amd
Ocelot
 - mt7620: rename arch to more generic name mtmips
 - mips: pass initrd addresses via DT as physical addresses
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Merge tag 'mips-pull-2019-05-03' of git://git.denx.de/u-boot-mips

- mscc: small fixes, enhance network support for Serval, Luton and Ocelot
- mt7620: rename arch to more generic name mtmips
- mips: pass initrd addresses via DT as physical addresses
2019-05-04 20:02:42 -04:00
Horatiu Vultur
5c629b1b69 net: mscc: ocelot: Update DTS for Luton pcb90
Update device tree for luton to add support for luton pcb90.
This pcb has 24 ports from which 12 ports are connected to
SerDes6G.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03 16:46:36 +02:00
Horatiu Vultur
8c211af8f8 net: mscc: ocelot: Update DTS for Ocelot pcb120.
Update device tree for ocelot to add support for ocelot pcb120.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03 16:42:24 +02:00
Horatiu Vultur
4788704dd8 net: mscc: serval: Add ethernet nodes for Serval
Add ethernet nodes for Serval SoCs family. There are 2 pcb in this
family: pcb105 and pcb106.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03 16:42:23 +02:00
Andreas Dannenberg
7202af927b arm: dts: k3-am654: Sync IOPAD macros with Linux
Transition to the IOPAD macros as used in Linux in which the pin mux
mode is specified using a dedicated parameter while also dropping the
related MUX_MODEx macros that are no longer needed. This transition
will allow us to keep both Linux and U-Boot DTS in sync more easily.
While at it also align the file name of the include file itself and
update any references accordingly.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-05-03 07:30:31 -04:00
Tom Rini
b4ee6daad7 Porting to DM and i.MX8
------------------------
 
 - warp7 to DM
 - kp_imx53 to DM
 - Warnings in DT
 - MX8QM support
 - colibri-imx6ull to DM
 - imx7d-pico to DM
 - ocotp for MX8
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Merge tag 'u-boot-imx-20190426' of git://git.denx.de/u-boot-imx

Porting to DM and i.MX8
------------------------

- warp7 to DM
- kp_imx53 to DM
- Warnings in DT
- MX8QM support
- colibri-imx6ull to DM
- imx7d-pico to DM
- ocotp for MX8
2019-05-01 07:25:51 -04:00
Peng Fan
7246d57659 dt-bindings: clock: dt-bindings: pinctrl: add i.MX8QM clocks definition
Add i.MX8QM clocks definition

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 17:03:25 +02:00
Peng Fan
4662c1b6e0 dt-bindings: pinctrl: add i.MX8QM pads definition
Add i.MX8QM pads definition

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25 17:03:25 +02:00
Tom Rini
c2bb9c5b9e STM32 MCUs update:
_ DT rework and alignment with DT kernel v4.20
 _ mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20
 _ mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20
 _ configs: update for F746/769 boards
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Merge tag 'u-boot-stm32-mcu-20190423' of https://github.com/pchotard/u-boot

STM32 MCUs update:
- DT rework and alignment with DT kernel v4.20
- mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20
- mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20
- configs: update for F746/769 boards
2019-04-24 12:26:39 -04:00
Tom Rini
ceb6ddbc73 - Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
 - Add support for the Libretech-AC AML-S805X-AC board
 - Add Amlogic AXG reset compatible
 - Add I2C support for Amlogic AXG
 - Fix AXG PIN and BANK pinctrl definitions
 - Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
 - Add initial support for Amlogic G12A SoC and U200 board
 - Enable PHY_REALTEK for selected boards
 - Fix Khadas VIM2 README
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Merge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogic

- Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
- Add support for the Libretech-AC AML-S805X-AC board
- Add Amlogic AXG reset compatible
- Add I2C support for Amlogic AXG
- Fix AXG PIN and BANK pinctrl definitions
- Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
- Add initial support for Amlogic G12A SoC and U200 board
- Enable PHY_REALTEK for selected boards
- Fix Khadas VIM2 README
2019-04-24 12:26:25 -04:00
Fabien Parent
cd52c3253a clk: mediatek: add driver for MT8516
Add clock driver for MediaTek MT8516 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
[trini: Redo whitespace]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-23 17:57:26 -04:00
Patrice Chotard
13ba6d0e6f ARM: dts: stm32: Sync DT with v4.20 kernel for stm32h7
Synchronize stm32h7 device tree with kernel v4.20.
U-boot DT files and pinctrl bindings are updated,
useless nodes are removed and gpio compatible added.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:31:17 +02:00
Patrice Chotard
fe63d3cfb7 ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7
Synchronize stm32f7 device tree with kernel v4.20.

All pinctrl bindings are updated.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:31:06 +02:00
Patrice Chotard
71dfd5f3f5 ARM: dts: stm32: Sync DT files with v4.20 kernel for stm32f4
Synchronize stm32f7 device tree with kernel v4.20.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-04-23 15:30:57 +02:00
Neil Armstrong
f9e605437e ARM: dts: Import Amlogic G12A u200 DT from Linux 5.1-rc1
Import Linux 5.1-rc1 DT from 9e98c678c2d6 ("Linux 5.1-rc1") for the
meson-g12a-u200 board, the meson-g12a.dtsi and the corresponding bindings.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-23 11:19:09 +02:00
Jagan Teki
a93a55044b arm64: allwinner: sun50i: Sync H6 dts(i) files from Linux
Usually the Linux dts changes were synced in specific tags in Allwinner,
to keep track for whats been synced so-far and plan for future syncs.

But this patch sync sun50i-h6* dts(i) files from Linux w/o any specific
tag since these dts(i) changes are required for new H6 boards support.

Linux commit details about the sun50i-h6* sync:
"arm64: dts: allwinner: h6: move MMC pinctrl to dtsi"
(sha1: 6ba2e45d57afdfd982d12f168edd6a79a65075d8)

Linux commit details about the sun8i-tcon-top.h sync:
"dt-bindings: display: sunxi-drm: Add TCON TOP description"
(sha1: 59a9c39544cd1e5952c2a33028d71aa8180648f8)

Part of the sync initiated by 'Clément Péron'.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-14 22:32:32 +05:30
Tom Rini
0a5228be86 - mt76xx: add USB support, small fixes
- ath79: small fixes, add support for QCA9563 SoC and AP152 reference board
 - mscc: small fixes, add network support for JR2 and ServalT SoCs
 - bmips: small fixes, enable more drivers for ARM specific BCM6858 and BCM63158 SoCs
 - MIPS: fix redundant relocation of initrd images
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Merge tag 'mips-pull-2019-04-12' of git://git.denx.de/u-boot-mips

- mt76xx: add USB support, small fixes
- ath79: small fixes, add support for QCA9563 SoC and AP152 reference board
- mscc: small fixes, add network support for JR2 and ServalT SoCs
- bmips: small fixes, enable more drivers for ARM specific BCM6858 and BCM63158 SoCs
- MIPS: fix redundant relocation of initrd images
2019-04-13 08:27:26 -04:00
Tom Rini
015289580f stm32 patches for v2019.07-rc1
- Add trusted boot with TF-A for stm32mp1
 - stm32mp1 dts files sync'ed with Linux version
 - add STM32MP1 Discovery boards (DK1 and DK2)
 - add STMFX gpio expander driver
 - misc improvement for stm3mp1 supports
 - rename stpmu1 to stpmic1 (official name)
 - stm32_qspi: move to exec_op (spi nor driver for stm32 mpu and mcu)
 - add STM32 FMC2 NAND flash controller driver
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Merge tag 'u-boot-stm32-20190412' of https://github.com/patrickdelaunay/u-boot

stm32 patches for v2019.07-rc1
- Add trusted boot with TF-A for stm32mp1
- stm32mp1 dts files sync'ed with Linux version
- add STM32MP1 Discovery boards (DK1 and DK2)
- add STMFX gpio expander driver
- misc improvement for stm3mp1 supports
- rename stpmu1 to stpmic1 (official name)
- stm32_qspi: move to exec_op (spi nor driver for stm32 mpu and mcu)
- add STM32 FMC2 NAND flash controller driver
2019-04-12 15:43:19 -04:00
Horatiu Vultur
1141176163 net: mscc: jaguar2: Add ethenet nodes for Jaguar2.
Add ethernet nodes for Jaguar2 SoCs family. There are 3 pcb in this
family: pcb110, pcb111 and pcb112.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12 17:32:51 +02:00
Patrick Delaunay
42f01aacfd power: rename stpmu1 to official name stpmic1
Alignment with kernel driver name & binding
introduced by https://patchwork.kernel.org/cover/10761943/
to use the final marketing name = STPMIC1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-12 16:09:13 +02:00
Patrick Delaunay
d46c22b3fd power: stpmu1: rename files to stpmic1
Prepare file modification for kernel alignment and
rename driver to stpmic1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-12 16:09:13 +02:00
Vignesh R
ffcc66e8fe dma: ti: add driver to K3 UDMA
The UDMA-P is intended to perform similar (but significantly upgraded) functions
as the packet-oriented DMA used on previous SoC devices. The UDMA-P module
supports the transmission and reception of various packet types.
The UDMA-P also supports acting as both a UTC and UDMA-C for its internal
channels. Channels in the UDMA-P can be configured to be either Packet-Based or
Third-Party channels on a channel by channel basis.

The initial driver supports:
- MEM_TO_MEM (TR mode)
- DEV_TO_MEM (Packet mode)
- MEM_TO_DEV (Packet mode)

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
2019-04-11 20:07:12 -04:00
Tom Rini
f95fdf237d Merge branch 'master' of git://git.denx.de/u-boot-sh
- Various rmobile fixes
2019-04-11 14:29:22 -04:00
Marek Vasut
72242e5439 clk: renesas: Synchronize Gen3 tables with Linux 5.0
Synchronize R-Car Gen3 clock tables with Linux 5.0,
commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09 18:19:10 +02:00
Marek Vasut
a3c31e98a1 clk: renesas: Synchronize Gen2 tables with Linux 5.0
Synchronize R-Car Gen2 clock tables with Linux 5.0,
commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-04-09 18:19:10 +02:00
Claudiu Beznea
068d4c0a11 pinctrl: at91: add slewrate support for SAM9X60
Add slew rate support for SAM9X60 pin controller.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2019-04-09 09:28:50 +03:00
Anup Patel
c40b6df87f clk: Add SiFive FU540 PRCI clock driver
Add driver code for the SiFive FU540 PRCI IP block.  This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.

Based on code written by Wesley Terpstra <wesley@sifive.com>
found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
https://github.com/riscv/riscv-linux

Boot and PLL rate change were tested on a SiFive HiFive Unleashed
board.

Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2019-02-27 09:12:33 +08:00
Simon Glass
2ca471379b sound: Add support for Intel HDA
The Intel High-definition Audio is a newer-generation audio system which
provides for transfer of a large number of audio stream, each containing
up to 16 channels.

Add support for HDA as a library which can be used by other drivers.
U-Boot currently uses only two channels (stereo).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20 15:27:09 +08:00
Patrick Delaunay
e74b74c528 dts: stm32mp1: clock tree update
- Add st,digbypass on clk_hse node (needed for board rev.C)
- MLAHB/AHB max frequency increased from 200 to 209MHz, with:
  - PLL3P set to 208.8MHz for MCU sub-system
  - PLL3Q set to 24.57MHz for 48kHz SAI/SPI2S
  - PLL3R set to 11.29MHz for 44.1kHz SAI/SPI2S
  - PLL4P set to 99MHz for SDMMC and SPDIFRX
  - PLL4Q set to 74.25MHz for EVAL board

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-09 07:50:57 -05:00
Shawn Guo
8eef803a27 poplar: sync up device tree with kernel 4.20
It adds missing pinctrl headers, updates clock header and sync up Poplar
device tree with kernel 4.20 release.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2019-01-25 12:12:56 -05:00
Jagan Teki
aa86bf90d1 sunxi: A64: Update sun50i-a64-ccu.h
Update sun50i-a64-ccu.h from the Linux sunxi/dt64-for-4.20 tree:
commit 679294497be31596e1c9c61507746d72b6b05f26
Author: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz>
Date:   Wed Sep 26 19:48:24 2018 +0000
    arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay

This should be a part of previous sync patch from
commit 1b39a1834e
Author: Andre Przywara <andre.przywara@arm.com>
Date:   Mon Oct 29 00:56:47 2018 +0000

    sunxi: A64: Update .dts/.dtsi files

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-01-18 22:19:09 +05:30
Jagan Teki
8dcc7e6922 ARM: dts: sun8i: Update A80 dts(i) from Linux-v4.18-rc3
Update all A80 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.

arch/arm/boot/dts/sun9i-a80*:

commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date:   Tue Mar 27 14:58:00 2018 +0200

    Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

include/dt-bindings/*/sun9i-a80-*:

commit 783ab76ae553abc23f80ef7511052d055697531b
Author: Chen-Yu Tsai <wens@csie.org>
Date:   Sat Jan 28 20:22:36 2017 +0800

    clk: sunxi-ng: Add A80 Display Engine CCU

Note: sun9i-a80-cx-a99.dts is updated only uart0, since the same
dts is not available in Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-01-18 22:19:09 +05:30
Weijie Gao
3e066bcaef reset: MedaiTek: add reset controller driver for MediaTek SoCs
This patch adds reset controller driver for MediaTek SoCs.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-01-14 17:43:18 -05:00