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ARM: dts: sun8i: Update A80 dts(i) from Linux-v4.18-rc3

Browse Source 
Update all A80 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.

arch/arm/boot/dts/sun9i-a80*:

commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date:   Tue Mar 27 14:58:00 2018 +0200

    Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

include/dt-bindings/*/sun9i-a80-*:

commit 783ab76ae553abc23f80ef7511052d055697531b
Author: Chen-Yu Tsai <wens@csie.org>
Date:   Sat Jan 28 20:22:36 2017 +0800

    clk: sunxi-ng: Add A80 Display Engine CCU

Note: sun9i-a80-cx-a99.dts is updated only uart0, since the same
dts is not available in Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Jagan Teki 2019-01-11 16:22:57 +05:30
parent 337fcdc06b
commit 8dcc7e6922
10 changed files with 1598 additions and 472 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

260
arch/arm/dts/sun9i-a80-cubieboard4.dts
View File

@ -47,7 +47,6 @@
#include "sun9i-a80.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Cubietech Cubieboard4";
@ -63,8 +62,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins_cubieboard4>;
green {
label = "cubieboard4:green:usr";
@ -76,18 +73,96 @@
gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
};
};
vga-connector {
compatible = "vga-connector";
label = "vga";
ddc-i2c-bus = <&i2c3>;
port {
vga_con_in: endpoint {
remote-endpoint = <&vga_dac_out>;
};
};
};
vga-dac {
compatible = "corpro,gm7123", "adi,adv7123", "dumb-vga-dac";
vdd-supply = <&reg_dcdc1>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
vga_dac_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_out_vga>;
};
};
port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
vga_dac_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&vga_con_in>;
};
};
};
};
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
clock-names = "ext_clock";
/* enables internal regulator and de-asserts reset */
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
};
};
&de {
status = "okay";
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_cubieboard4>;
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH18 */
cd-inverted;
cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH18 */
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dldo1>;
vqmmc-supply = <&reg_cldo3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
};
&mmc1_pins {
bias-pull-up;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
@ -100,23 +175,12 @@
&mmc2_8bit_pins {
/* Increase drive strength for DDR modes */
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
drive-strength = <40>;
};
&pio {
led_pins_cubieboard4: led-pins@0 {
allwinner,pins = "PH6", "PH17";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 {
allwinner,pins = "PH18";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
&osc32k {
/* osc32k input is from AC100 */
clocks = <&ac100_rtc 0>;
};
&r_ir {
@ -248,14 +312,166 @@
reg_rtc_ldo: rtc_ldo {
regulator-name = "vcc-rtc-vdd1v8-io";
};
sw {
/* unused */
};
};
};
axp806: pmic@745 {
compatible = "x-powers,axp806";
reg = <0x745>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
bldoin-supply = <&reg_dcdce>;
regulators {
reg_s_aldo1: aldo1 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
aldo2 {
/*
* unused, but use a different name to
* avoid name clash with axp809's aldo's
*/
regulator-name = "s_aldo2";
};
aldo3 {
/*
* unused, but use a different name to
* avoid name clash with axp809's aldo's
*/
regulator-name = "s_aldo3";
};
reg_bldo1: bldo1 {
regulator-always-on;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
regulator-name = "vcc18-efuse-adc-display-csi";
};
reg_bldo2: bldo2 {
regulator-always-on;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
regulator-name =
"vdd18-drampll-vcc18-pll-cpvdd";
};
bldo3 {
/* unused */
};
reg_bldo4: bldo4 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vcc12-hsic";
};
reg_cldo1: cldo1 {
/*
* This was 3V in the original design, but
* 3.3V is the recommended supply voltage
* for the Ethernet PHY.
*/
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-gmac-phy";
};
reg_cldo2: cldo2 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "afvcc-cam";
};
reg_cldo3: cldo3 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-io-wifi-codec-io2";
};
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpub";
};
reg_dcdcd: dcdcd {
regulator-always-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-vpu";
};
reg_dcdce: dcdce {
regulator-always-on;
regulator-min-microvolt = <2100000>;
regulator-max-microvolt = <2100000>;
regulator-name = "vcc-bldo-codec-ldoin";
};
sw {
/*
* unused, but use a different name to
* avoid name clash with axp809's sw
*/
regulator-name = "s_sw";
};
};
};
ac100: codec@e89 {
compatible = "x-powers,ac100";
reg = <0xe89>;
ac100_codec: codec {
compatible = "x-powers,ac100-codec";
interrupt-parent = <&r_pio>;
interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
#clock-cells = <0>;
clock-output-names = "4M_adda";
};
ac100_rtc: rtc {
compatible = "x-powers,ac100-rtc";
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
clocks = <&ac100_codec>;
#clock-cells = <1>;
clock-output-names = "cko1_rtc",
"cko2_rtc",
"cko3_rtc";
};
};
};
#include "axp809.dtsi"
&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd0_rgb888_pins>;
};
&tcon0_out {
tcon0_out_vga: endpoint@0 {
reg = <0>;
remote-endpoint = <&vga_dac_in>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};

2
arch/arm/dts/sun9i-a80-cx-a99.dts
View File

@ -365,7 +365,7 @@
*/
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};

227
arch/arm/dts/sun9i-a80-optimus.dts
View File

@ -46,7 +46,6 @@
#include "sun9i-a80.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Merrii A80 Optimus Board";
@ -63,11 +62,8 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins_optimus>, <&led_r_pins_optimus>;
/* The LED names match those found on the board */
led2 {
label = "optimus:led2:usr";
gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>;
@ -87,8 +83,6 @@
reg_usb1_vbus: usb1-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&usb1_vbus_pin_optimus>;
regulator-name = "usb1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
@ -98,13 +92,19 @@
reg_usb3_vbus: usb3-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&usb3_vbus_pin_optimus>;
regulator-name = "usb3-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
};
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
clock-names = "ext_clock";
/* enables internal regulator and de-asserts reset */
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
};
};
&ehci0 {
@ -112,7 +112,8 @@
};
&ehci1 {
status = "okay";
/* Enable if HSIC peripheral is connected */
status = "disabled";
};
&ehci2 {
@ -121,14 +122,28 @@
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>;
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */
cd-inverted;
cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH8 */
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dldo1>;
vqmmc-supply = <&reg_cldo3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
};
&mmc1_pins {
bias-pull-up;
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
@ -141,7 +156,7 @@
&mmc2_8bit_pins {
/* Increase drive strength for DDR modes */
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
drive-strength = <40>;
};
&ohci0 {
@ -152,49 +167,15 @@
status = "okay";
};
&pio {
led_pins_optimus: led-pins@0 {
allwinner,pins = "PH0", "PH1";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
mmc0_cd_pin_optimus: mmc0_cd_pin@0 {
allwinner,pins = "PH18";
allwinner,function = "gpio_in";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
usb1_vbus_pin_optimus: usb1_vbus_pin@1 {
allwinner,pins = "PH4";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
usb3_vbus_pin_optimus: usb3_vbus_pin@1 {
allwinner,pins = "PH5";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
&osc32k {
/* osc32k input is from AC100 */
clocks = <&ac100_rtc 0>;
};
&r_ir {
status = "okay";
};
&r_pio {
led_r_pins_optimus: led-pins@1 {
allwinner,pins = "PM15";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};
&r_rsb {
status = "okay";
@ -320,6 +301,146 @@
reg_rtc_ldo: rtc_ldo {
regulator-name = "vcc-rtc-vdd1v8-io";
};
sw {
/* unused */
};
};
};
axp806: pmic@745 {
compatible = "x-powers,axp806";
reg = <0x745>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
bldoin-supply = <&reg_dcdce>;
regulators {
reg_s_aldo1: aldo1 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
aldo2 {
/*
* unused, but use a different name to
* avoid name clash with axp809's aldo's
*/
regulator-name = "s_aldo2";
};
aldo3 {
/*
* unused, but use a different name to
* avoid name clash with axp809's aldo's
*/
regulator-name = "s_aldo3";
};
reg_bldo1: bldo1 {
regulator-always-on;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
regulator-name = "vcc18-efuse-adc-display-csi";
};
reg_bldo2: bldo2 {
regulator-always-on;
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <1900000>;
regulator-name =
"vdd18-drampll-vcc18-pll-cpvdd";
};
bldo3 {
/* unused */
};
reg_bldo4: bldo4 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vcc12-hsic";
};
reg_cldo1: cldo1 {
/*
* This was 3V in the original design, but
* 3.3V is the recommended supply voltage
* for the Ethernet PHY.
*/
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-gmac-phy";
};
reg_cldo2: cldo2 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "afvcc-cam";
};
reg_cldo3: cldo3 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-io-wifi-codec-io2";
};
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpub";
};
reg_dcdcd: dcdcd {
regulator-always-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-vpu";
};
reg_dcdce: dcdce {
regulator-always-on;
regulator-min-microvolt = <2100000>;
regulator-max-microvolt = <2100000>;
regulator-name = "vcc-bldo-codec-ldoin";
};
sw {
/*
* unused, but use a different name to
* avoid name clash with axp809's sw
*/
regulator-name = "s_sw";
};
};
};
ac100: codec@e89 {
compatible = "x-powers,ac100";
reg = <0xe89>;
ac100_codec: codec {
compatible = "x-powers,ac100-codec";
interrupt-parent = <&r_pio>;
interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
#clock-cells = <0>;
clock-output-names = "4M_adda";
};
ac100_rtc: rtc {
compatible = "x-powers,ac100-rtc";
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
clocks = <&ac100_codec>;
#clock-cells = <1>;
clock-output-names = "cko1_rtc",
"cko2_rtc",
"cko3_rtc";
};
};
};
@ -328,7 +449,7 @@
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
@ -338,7 +459,9 @@
};
&usbphy2 {
status = "okay";
phy-supply = <&reg_bldo4>;
/* Enable if HSIC peripheral is connected */
status = "disabled";
};
&usbphy3 {

1064
arch/arm/dts/sun9i-a80.dtsi
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File diff suppressed because it is too large Load Diff

162
include/dt-bindings/clock/sun9i-a80-ccu.h Normal file
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@ -0,0 +1,162 @@
/*
* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_CLOCK_SUN9I_A80_CCU_H_
#define _DT_BINDINGS_CLOCK_SUN9I_A80_CCU_H_
#define CLK_PLL_AUDIO 2
#define CLK_PLL_PERIPH0 3
#define CLK_C0CPUX 12
#define CLK_C1CPUX 13
#define CLK_OUT_A 27
#define CLK_OUT_B 28
#define CLK_NAND0_0 29
#define CLK_NAND0_1 30
#define CLK_NAND1_0 31
#define CLK_NAND1_1 32
#define CLK_MMC0 33
#define CLK_MMC0_SAMPLE 34
#define CLK_MMC0_OUTPUT 35
#define CLK_MMC1 36
#define CLK_MMC1_SAMPLE 37
#define CLK_MMC1_OUTPUT 38
#define CLK_MMC2 39
#define CLK_MMC2_SAMPLE 40
#define CLK_MMC2_OUTPUT 41
#define CLK_MMC3 42
#define CLK_MMC3_SAMPLE 43
#define CLK_MMC3_OUTPUT 44
#define CLK_TS 45
#define CLK_SS 46
#define CLK_SPI0 47
#define CLK_SPI1 48
#define CLK_SPI2 49
#define CLK_SPI3 50
#define CLK_I2S0 51
#define CLK_I2S1 52
#define CLK_SPDIF 53
#define CLK_SDRAM 54
#define CLK_DE 55
#define CLK_EDP 56
#define CLK_MP 57
#define CLK_LCD0 58
#define CLK_LCD1 59
#define CLK_MIPI_DSI0 60
#define CLK_MIPI_DSI1 61
#define CLK_HDMI 62
#define CLK_HDMI_SLOW 63
#define CLK_MIPI_CSI 64
#define CLK_CSI_ISP 65
#define CLK_CSI_MISC 66
#define CLK_CSI0_MCLK 67
#define CLK_CSI1_MCLK 68
#define CLK_FD 69
#define CLK_VE 70
#define CLK_AVS 71
#define CLK_GPU_CORE 72
#define CLK_GPU_MEMORY 73
#define CLK_GPU_AXI 74
#define CLK_SATA 75
#define CLK_AC97 76
#define CLK_MIPI_HSI 77
#define CLK_GPADC 78
#define CLK_CIR_TX 79
#define CLK_BUS_FD 80
#define CLK_BUS_VE 81
#define CLK_BUS_GPU_CTRL 82
#define CLK_BUS_SS 83
#define CLK_BUS_MMC 84
#define CLK_BUS_NAND0 85
#define CLK_BUS_NAND1 86
#define CLK_BUS_SDRAM 87
#define CLK_BUS_MIPI_HSI 88
#define CLK_BUS_SATA 89
#define CLK_BUS_TS 90
#define CLK_BUS_SPI0 91
#define CLK_BUS_SPI1 92
#define CLK_BUS_SPI2 93
#define CLK_BUS_SPI3 94
#define CLK_BUS_OTG 95
#define CLK_BUS_USB 96
#define CLK_BUS_GMAC 97
#define CLK_BUS_MSGBOX 98
#define CLK_BUS_SPINLOCK 99
#define CLK_BUS_HSTIMER 100
#define CLK_BUS_DMA 101
#define CLK_BUS_LCD0 102
#define CLK_BUS_LCD1 103
#define CLK_BUS_EDP 104
#define CLK_BUS_CSI 105
#define CLK_BUS_HDMI 106
#define CLK_BUS_DE 107
#define CLK_BUS_MP 108
#define CLK_BUS_MIPI_DSI 109
#define CLK_BUS_SPDIF 110
#define CLK_BUS_PIO 111
#define CLK_BUS_AC97 112
#define CLK_BUS_I2S0 113
#define CLK_BUS_I2S1 114
#define CLK_BUS_LRADC 115
#define CLK_BUS_GPADC 116
#define CLK_BUS_TWD 117
#define CLK_BUS_CIR_TX 118
#define CLK_BUS_I2C0 119
#define CLK_BUS_I2C1 120
#define CLK_BUS_I2C2 121
#define CLK_BUS_I2C3 122
#define CLK_BUS_I2C4 123
#define CLK_BUS_UART0 124
#define CLK_BUS_UART1 125
#define CLK_BUS_UART2 126
#define CLK_BUS_UART3 127
#define CLK_BUS_UART4 128
#define CLK_BUS_UART5 129
#endif /* _DT_BINDINGS_CLOCK_SUN9I_A80_CCU_H_ */

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/*
* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_CLOCK_SUN9I_A80_DE_H_
#define _DT_BINDINGS_CLOCK_SUN9I_A80_DE_H_
#define CLK_FE0 0
#define CLK_FE1 1
#define CLK_FE2 2
#define CLK_IEP_DEU0 3
#define CLK_IEP_DEU1 4
#define CLK_BE0 5
#define CLK_BE1 6
#define CLK_BE2 7
#define CLK_IEP_DRC0 8
#define CLK_IEP_DRC1 9
#define CLK_MERGE 10
#define CLK_DRAM_FE0 11
#define CLK_DRAM_FE1 12
#define CLK_DRAM_FE2 13
#define CLK_DRAM_DEU0 14
#define CLK_DRAM_DEU1 15
#define CLK_DRAM_BE0 16
#define CLK_DRAM_BE1 17
#define CLK_DRAM_BE2 18
#define CLK_DRAM_DRC0 19
#define CLK_DRAM_DRC1 20
#define CLK_BUS_FE0 21
#define CLK_BUS_FE1 22
#define CLK_BUS_FE2 23
#define CLK_BUS_DEU0 24
#define CLK_BUS_DEU1 25
#define CLK_BUS_BE0 26
#define CLK_BUS_BE1 27
#define CLK_BUS_BE2 28
#define CLK_BUS_DRC0 29
#define CLK_BUS_DRC1 30
#endif /* _DT_BINDINGS_CLOCK_SUN9I_A80_DE_H_ */

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/*
* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_CLOCK_SUN9I_A80_USB_H_
#define _DT_BINDINGS_CLOCK_SUN9I_A80_USB_H_
#define CLK_BUS_HCI0 0
#define CLK_USB_OHCI0 1
#define CLK_BUS_HCI1 2
#define CLK_BUS_HCI2 3
#define CLK_USB_OHCI2 4
#define CLK_USB0_PHY 5
#define CLK_USB1_HSIC 6
#define CLK_USB1_PHY 7
#define CLK_USB2_HSIC 8
#define CLK_USB2_PHY 9
#define CLK_USB_HSIC 10
#endif /* _DT_BINDINGS_CLOCK_SUN9I_A80_USB_H_ */

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/*
* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_RESET_SUN9I_A80_CCU_H_
#define _DT_BINDINGS_RESET_SUN9I_A80_CCU_H_
#define RST_BUS_FD 0
#define RST_BUS_VE 1
#define RST_BUS_GPU_CTRL 2
#define RST_BUS_SS 3
#define RST_BUS_MMC 4
#define RST_BUS_NAND0 5
#define RST_BUS_NAND1 6
#define RST_BUS_SDRAM 7
#define RST_BUS_SATA 8
#define RST_BUS_TS 9
#define RST_BUS_SPI0 10
#define RST_BUS_SPI1 11
#define RST_BUS_SPI2 12
#define RST_BUS_SPI3 13
#define RST_BUS_OTG 14
#define RST_BUS_OTG_PHY 15
#define RST_BUS_MIPI_HSI 16
#define RST_BUS_GMAC 17
#define RST_BUS_MSGBOX 18
#define RST_BUS_SPINLOCK 19
#define RST_BUS_HSTIMER 20
#define RST_BUS_DMA 21
#define RST_BUS_LCD0 22
#define RST_BUS_LCD1 23
#define RST_BUS_EDP 24
#define RST_BUS_LVDS 25
#define RST_BUS_CSI 26
#define RST_BUS_HDMI0 27
#define RST_BUS_HDMI1 28
#define RST_BUS_DE 29
#define RST_BUS_MP 30
#define RST_BUS_GPU 31
#define RST_BUS_MIPI_DSI 32
#define RST_BUS_SPDIF 33
#define RST_BUS_AC97 34
#define RST_BUS_I2S0 35
#define RST_BUS_I2S1 36
#define RST_BUS_LRADC 37
#define RST_BUS_GPADC 38
#define RST_BUS_CIR_TX 39
#define RST_BUS_I2C0 40
#define RST_BUS_I2C1 41
#define RST_BUS_I2C2 42
#define RST_BUS_I2C3 43
#define RST_BUS_I2C4 44
#define RST_BUS_UART0 45
#define RST_BUS_UART1 46
#define RST_BUS_UART2 47
#define RST_BUS_UART3 48
#define RST_BUS_UART4 49
#define RST_BUS_UART5 50
#endif /* _DT_BINDINGS_RESET_SUN9I_A80_CCU_H_ */

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/*
* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_RESET_SUN9I_A80_DE_H_
#define _DT_BINDINGS_RESET_SUN9I_A80_DE_H_
#define RST_FE0 0
#define RST_FE1 1
#define RST_FE2 2
#define RST_DEU0 3
#define RST_DEU1 4
#define RST_BE0 5
#define RST_BE1 6
#define RST_BE2 7
#define RST_DRC0 8
#define RST_DRC1 9
#define RST_MERGE 10
#endif /* _DT_BINDINGS_RESET_SUN9I_A80_DE_H_ */

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/*
* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _DT_BINDINGS_RESET_SUN9I_A80_USB_H_
#define _DT_BINDINGS_RESET_SUN9I_A80_USB_H_
#define RST_USB0_HCI 0
#define RST_USB1_HCI 1
#define RST_USB2_HCI 2
#define RST_USB0_PHY 3
#define RST_USB1_HSIC 4
#define RST_USB1_PHY 5
#define RST_USB2_HSIC 6
#define RST_USB2_PHY 7
#endif /* _DT_BINDINGS_RESET_SUN9I_A80_USB_H_ */