ARM: dts: add hifsys reset for MediaTek SoCs

This adds missing hifsys reset parts in header files.

Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
This commit is contained in:
Ryder Lee 2019-07-29 22:17:47 +08:00 committed by Tom Rini
parent 8702e614d9
commit 4f3ee271eb
2 changed files with 16 additions and 0 deletions

View File

@ -248,6 +248,13 @@
status = "disabled";
};
hifsys: syscon@1a000000 {
compatible = "mediatek,mt7623-hifsys", "syscon";
reg = <0x1a000000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
ethsys: syscon@1b000000 {
compatible = "mediatek,mt7623-ethsys", "syscon";
reg = <0x1b000000 0x1000>;

View File

@ -15,4 +15,13 @@
#define ETHSYS_MCM_RST 2
#define ETHSYS_SYS_RST 0
/* HIFSYS resets */
#define HIFSYS_PCIE2_RST 26
#define HIFSYS_PCIE1_RST 25
#define HIFSYS_PCIE0_RST 24
#define HIFSYS_UPHY1_RST 22
#define HIFSYS_UPHY0_RST 21
#define HIFSYS_UHOST1_RST 4
#define HIFSYS_UHOST0_RST 3
#endif /* _DT_BINDINGS_MTK_RESET_H_ */