Commit Graph

20222 Commits

Author SHA1 Message Date
Utkarsh Gupta
55eab945da imx: HAB: Validate IVT before authenticating image
Calling csf_is_valid() with an un-signed image may lead to data abort
as the CSF pointer could be pointing to a garbage address when accessed
in HAB_HDR_LEN(*(const struct hab_hdr *)(ulong)ivt_initial->csf).

Authenticate image from DDR location 0x80800000...
Check CSF for Write Data command before authenticating image
data abort
pc : [<fff5494c>]          lr : [<fff54910>]
reloc pc : [<8780294c>]    lr : [<87802910>]
sp : fdf45dc8  ip : 00000214     fp : 00000000
r10: fffb6170  r9 : fdf4fec0     r8 : 00722020
r7 : 80f20000  r6 : 80800000     r5 : 80800000  r4 : 00720000
r3 : 17a5aca3  r2 : 00000000     r1 : 80f2201f  r0 : 00000019
Flags: NzcV  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...

To avoid such errors during authentication process, validate IVT structure
by calling validate_ivt function which checks the following values in an IVT:

IVT_HEADER = 0x4X2000D1
ENTRY != 0x0
RES1 = 0x0
DCD = 0x0       /* Recommended */
SELF != 0x0     /* Absoulute address of IVT */
CSF != 0x0
RES2 = 0x0

This commit also checks if Image's start address is 4 byte aligned.

commit "0088d127 MLK-14945 HAB: Check if IVT valid before authenticating image"
removed as this patch addresses the issue.

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Peng Fan
1fcd09703c imx: HAB: Update hab codes to support ARM64 and i.MX8M
There are some changes to support ARM64 i.MX8M platform in this patches:
1. The hab_rvt base and function vectors are different as i.MX6/7

2. Need to bypass an workaround for i.MX6 to fix problem in MMU.

3. The x18 register needed save & restore before calling any HAB API. According
   to ARM procedure call spec, the x18 is caller saved when it is used as
   temporary register. So calling HAB API may scratch this register, and
   cause crash once accessing the gd pointer.

   On ARMv7, the r9 is callee saved when it is used as variable register. So
   no need to save & restore it.

4. Add SEC_CONFIG fuse for iMX8M

When current EL is not EL3, the direct calling to HAB will fail because
CAAM/SNVS can't initialize at non-secure mode. In this case, we use
SIP call to run the HAB in ATF.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Ye Li
71c0b0af77 imx: hab: Add function to authenticate kernel image
When loading kernel image, the image size is parsed from header, so it
does not include the CSF and IVT.

Add back the authenticate_image function to wrap the imx_hab_authenticate_image
with calculating IVT offset and full image size.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Breno Lima
5e9f69309d imx: Avoid hardcoded Job Ring Max size
Prior instantiating RNG we have to ensure if the CAAM job rings are
available. Avoid hardcoded job ring max size and use the definition at
fsl_sec.h

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Breno Lima
9756cf53c3 imx: Ensure CAAM clock is enabled prior getting out_jr_size
Prior calling sec_in32() we have to ensure CAAM clock is enabled, the
function sec_in32() is reading CAAM registers and if CAAM clock is disabled
the system will hang.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Breno Lima
405100ba55 imx: Avoid hardcoded output ring size register offset (ORSR)
The CAAM output ring size register offset is currently defined in fsl_sec.h
as FSL_CAAM_ORSR_JRa_OFFSET, use this definition to avoid hardcoded value in
i.MX common code.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Breno Lima
61f8eba7b1 imx: imx7 Support for Manufacturing Protection
This code was originally developed by Raul Cardenas <raul.casas@nxp.com>
and modified to be applied in U-Boot imx_v2017.03.

More information about the initial submission can be seen
in the link below:
https://lists.denx.de/pipermail/u-boot/2016-February/245273.html

i.MX7D has an a protection feature for Manufacturing process.
This feature uses asymmetric encryption to sign and verify
authenticated software handled between parties. This command
enables the use of such feature.

The private key is unique and generated once per device.
And it is stored in secure memory and only accessible by CAAM.
Therefore, the public key generation and signature functions
are the only functions available for the user.

The manufacturing-protection authentication process can be used to
authenticate the chip to the OEM's server.

Command usage:

Print the public key for the device.
- mfgprot pubk

Generates Signature over given data.
- mfgprot sign <data_address> <data_size>

Signed-off-by: Raul Ulises Cardenas <raul.casas@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Peng Fan
2cbaf614cf imx8m: add regs used by CAAM
Add regs used by CAAM

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Ye Li
84a351c489 iMX8MQ: Recognize the B2 revision
i.MX8MQ B2 is using same value in OCOTP_READ_FUSE_DATA like B1, so
we have to check the ROM verision to distinguish the revision.

As we have checked the B1 rev for sticky bits work around in
secure boot. So it won't apply on B2.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Peng Fan
eb3ad32754 arch: mach-imx: imx8m: fix unique_id read error for imx8mp
The value of Unique ID in uboot and kernel is different for iMX8MP:

serial#=02e1444a0002aaff
root@imx8mpevk:/sys/devices/soc0# cat soc_uid
D699300002E1444A

The reason is that Fuse Addresses of Unique ID of iMX8MP are 0x420 and
0x430.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Peng Fan
62a7a8e06f imx8m: soc: update fuse path
Update fuse path to disable modules correctly.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Ye Li
e4263b9748 imx8m: Update thermal and PMU kernel nodes for dual/single cores
For dual core and single core iMX8M parts, the thermal node and PMU node
in kernel DTB also needs update to remove the refers to deleted core nodes.
Otherwise both driver will fail to work.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Ye Li
211f4743e9 imx8mn: Add support for 11x11 UltraLite part number
There are 3 part numbers for 11x11 i.MX8MNano with different core number
configuration: UltraLite Quad/Dual/Solo

Comparing with i.MX8MN Lite parts, they have MIPI DSI disabled. So
checking the MIPI DSI disable fuse to recognize these parts.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Ye Li
9dd35fa7db imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK
Add dedicated defconfigs for iMX8MN low drive mode which set the VDD_SOC
and VDD_DRAM to 0.8v, DDR at 1600MTS (800Mhz clock) and GPU at 200Mhz.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Peng Fan
b0b4ecfc9a imx8mn: Add LPDDR4 EVK board support
Add support for iMX8MN LPDDR4 EVK board which uses 2GB LPDDR4 and
PCA9450B PMIC.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-27 15:13:57 -03:00
Ye Li
198cff805b imx8mm_evk: Switch to new imx8mm evk board
Update PMIC to use PCA9540, the legacy board not supported by NXP

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-04-27 15:13:56 -03:00
Fabio Berton
2ea9a49bda imx: iMX6: Define disconnect_from_pc function
Copied from arch/arm/include/asm/arch-mx7ulp/imx-regs.h

Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
2021-04-27 08:57:18 -03:00
Andre Przywara
62acef239f sunxi: dts: H616: Drop reserved-memory node
Trusted Firmware now adds the /reserved-memory subnode to the DT at
runtime[1], putting in the right values.

Drop our hard-coded version, as this might clash with the actual values
(which have also changed), and rely on TF-A to add the node.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/7770

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-03-31 09:50:31 +01:00
Andre Przywara
c629ba854f sunxi: H616: Change TF-A load address to beginning of DRAM
Loading Trusted-Firmware's BL31 at 16KB into DRAM was originally a hack
to allow sharing more code with the other SoCs (which use this offset
in SRAM). However there is no longer a reason for that, as the
problematic macros have been properly separated there.

The latest (and hopefully final) TF-A code drop now changes the load
address to the beginning of DRAM, which is also more easily protected
by the Trustzone memory controller (code to be done).

Adjust the load address of BL31 now, to avoid any issues with
incompatible versions later on (the TF-A patches are about to be merged).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2021-03-31 09:50:05 +01:00
Tom Rini
1886e9d0c3 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Bug fixes related to FSL-IFC, watchdog
- layerscape-pcie, flexspi, T2080rdb.
2021-03-24 08:11:30 -04:00
Chris Packham
805c525b08 powerpc: t2080rdb: Enable RTC support
The T2080RDB has a ds1339 on i2c0. Add this to the devicetree and enable
the relevant support in the configs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-23 18:06:07 +05:30
Siew Chin Lim
2dbcc037cc arm: socfpga: Only do 'is OS booted from FIT' checking when VAB is enabled
Check CONFIG_SOCFPGA_SECURE_VAB_AUTH before perform 'is OS booted from FIT'
checking in board_prep_linux function. And, fix typo of
CONFIG_SOCFPGA_SECURE_VAB_AUTH_ALLOW_NON_FIT_IMAGE.

CONFIG_FIT will be enabled in both ATF and VAB boot flow, thus,
board_prep_linux function will always be called by both ATF and
VAB boot flow.

board_pre_linux function will do 'is OS booted from FIT' checking,
and it will be called before board_fit_image_post_process function.

VAB boot flow expects the OS is always booted from FIT and with VAB
signed cerfiticate because the VAB authentication is implemented in
board_fit_image_post_process function. So, VAB needs the 'is OS booted
from FIT' checking in board_pre_linux function.

However, for ATF boot flow, it is not a requirement that the OS must
always booted from FIT. The OS can be booted from individual Image and
kernel dtb file. Thus, we should not do 'if OS is booted from FIT'
checking in board_prep_linux function.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-03-23 14:46:35 +08:00
Tom Rini
e8a10a02bd - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
 - Remove the nand MTD configuration for NOR boot in stm32mp1 board
 - STM32programmer update
 - Bsec: manage clock when present in device tree
 - stm32mp15: move bootdelay configuration in defconfig
 - Update for stm32 dsi and dw_mipi_dsi
 - STM32 MCU's cleanup
 - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
 - Update stm32mp1 doc
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Merge tag 'u-boot-stm32-20210312' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
- Remove the nand MTD configuration for NOR boot in stm32mp1 board
- STM32programmer update
- Bsec: manage clock when present in device tree
- stm32mp15: move bootdelay configuration in defconfig
- Update for stm32 dsi and dw_mipi_dsi
- STM32 MCU's cleanup
- Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
- Update stm32mp1 doc
2021-03-15 08:43:19 -04:00
Patrice Chotard
23e20b2fa6 arm: stm32mp: Fix compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled
Fix following compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS
are enabled :

arch/arm/mach-stm32mp/cpu.c: In function ‘early_enable_caches’:
arch/arm/mach-stm32mp/cpu.c:223:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_size’
  223 |  gd->arch.tlb_size = PGTABLE_SIZE;
      |          ^
arch/arm/mach-stm32mp/cpu.c:224:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_addr’
  224 |  gd->arch.tlb_addr = (unsigned long)&early_tlb;
      |          ^

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-12 10:58:55 +01:00
Pali Rohár
15942805b7 arm: mvebu: a38x: Remove dead code ARMADA_39X
Config option ARMADA_39X is never set so remove all dead code hidden under
ifdef CONFIG_ARMADA_39X blocks.

Also remove useless checks for CONFIG_ARMADA_38X define as this macro is
always defined for a38x code path.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-12 07:44:21 +01:00
Patrick Delaunay
622c956cad stm32mp: bsec: manage clock when present in device tree
Enable the clocks during bsec probe when they are present in device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:50:10 +01:00
Patrick Delaunay
f49eb16c17 stm32mp: stm32prog: replace alias by serial device sequence number
The command "stm32prog serial <dev>" can directly use the device sequence
number of serial uclass as this sequence number is egual to alias when it
exist; this assumption simplify the code and avoid access to gd->fdt_blob
and the device tree parsing.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:41:17 +01:00
Patrick Delaunay
b9d5e3aa8f stm32mp: stm32prog: reactivate console and display serial error
When serial instance is not found in device tree, the console
should be enabled and the error should be indicated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:41:17 +01:00
Patrick Delaunay
5a05af87ef stm32mp: stm32prog: Add CONFIG_CMD_STM32PROG_SERIAL and _USB
Add CONFIG_CMD_STM32PROG_SERIAL and CONFIG_CMD_STM32PROG_USB to
independently select the support of UART or USB communication for
STM32CubeProgrammer.

For serial boot over UART, user can deactivate CONFIG_CMD_STM32PROG_SERIAL
to use U-Boot console of binary loaded by UART (for board bring-up for
example).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:41:17 +01:00
Patrick Delaunay
2dc2216692 stm32mp: stm32prog: Add Kconfig file for stm32prog command
Move CONFIG_CMD_STM32PROG in a specific Kconfig file for stm32prog command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:41:17 +01:00
Etienne Carriere
3d15245502 ARM: dts: stm32mp1: explicit clock reference needed by RCC clock driver
Define in the RCC clock provider node which root clocks the driver
depends on. These are root oscillators, which may be present or
not, upon FDT content.

This update binding is introduced in Linux kernel device tree by patch
"ARM: dts: stm32: move clocks/resets to SCMI resources for stm32mp15"

This patch is a preliminary step for SCMI support of stm32mp15
boards with trusted boot chain, based on TF-A or OP-TEE.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:03:19 +01:00
Simon Glass
736ecc643d x86: Select advanced Intel code only if allowed
At present most of the Intel-specific code is built on all devices, even
those which don't have software support for the features provided there.

This means that any board can enable CONFIG_INTEL_ACPIGEN even if it does
not have the required features.

Add a new INTEL_SOC option to control this access. This must be selected
by SoCs that can support the required features.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in arch/x86/Kconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09 09:42:12 +08:00
Simon Glass
049c4dc677 x86: Move INTEL_ACPIGEN to arch/x86
This option is better placed in the x86 code since it is not generic
enough to be in the core code. Move it.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in arch/x86/Kconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09 09:42:12 +08:00
Simon Glass
0b823e16b6 x86: Fix member check in intel_gnvs
When CONFIG_CHROMEOS is not enabled this currently does not build. Fix it.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09 09:42:12 +08:00
Heinrich Schuchardt
97401d0dbc x86: sizeof-array-div error in lpc_common_early_init
Building qemu-x86_64_defconfig with GCC 11.0 fails with:

arch/x86/cpu/intel_common/lpc.c:
In function ‘lpc_common_early_init’:
arch/x86/cpu/intel_common/lpc.c:56:40:
error: expression does not compute the number of elements in this array;
element type is ‘struct reg_info’, not ‘u32’ {aka ‘unsigned int’}
[-Werror=sizeof-array-div]
   56 |                         sizeof(values) / sizeof(u32));
      |                                        ^
arch/x86/cpu/intel_common/lpc.c:56:40: note: add parentheses around the
second ‘sizeof’ to silence this warning
arch/x86/cpu/intel_common/lpc.c:50:11: note: array ‘values’ declared here
   50 |         } values[4], *ptr;
      |           ^~~~~~

Add parentheses to silence warning.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09 09:42:12 +08:00
Siew Chin Lim
ae99131bf4 arm: socfpga: dts: soc64: Update filename in binman node of FIT image with VAB support
FIT image of Vendor Authentication Coot (VAB) contains signed images.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08 10:59:10 +08:00
Siew Chin Lim
1025b530a9 arm: socfpga: cmd: Support 'vab' command
Support 'vab' command to perform vendor authentication.

Command format: vab addr len
Authorize 'len' bytes starting at 'addr' via vendor public key

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08 10:59:10 +08:00
Siew Chin Lim
1bc20897c1 arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)
Vendor Authorized Boot is a security feature for authenticating
the images such as U-Boot, ARM trusted Firmware, Linux kernel,
device tree blob and etc loaded from FIT. After those images are
loaded from FIT, the VAB certificate and signature block appended
at the end of each image are sent to Secure Device Manager (SDM)
for authentication. U-Boot will validate the SHA384 of the image
against the SHA384 hash stored in the VAB certificate before
sending the image to SDM for authentication.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-03-08 10:59:10 +08:00
Siew Chin Lim
9a5bbdfd1a arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64
Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08 10:59:10 +08:00
Bin Meng
1d636a0cd5 ppc: qemu: Move board directory from board/freescale to board/emulation
board/emulation is the place for other QEMU targets like x86, arm,
riscv. Let's move the qemu-ppce500 board codes there.

List me as a co-maintainer for this board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:44 +05:30
Bin Meng
271a87b4ec gpio: mpc8xxx: Support controller register physical address beyond 32-bit
dev_read_addr_size_index() returns fdt_addr_t which might be a
64-bit physical address. This might be true for some 85xx SoCs
whose CCSBAR is mapped beyond 4 GiB.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
f94cbb5b87 ppc: mpc85xx: Add 'gpibe' register to 'struct ccsr_gpio'
Without this, the DM GPIO driver for MPC8xxx does not compile for
MPC85xx SoCs.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
3320656944 ppc: io.h: Use addrmap_ translation APIs only in post-relocation phase
In phys_to_virt() and virt_to_phys(), if CONFIG_ADDR_MAP is defined,
they use addrmap_ translation APIs to do the address translation.
However these APIs only work in post-relocation phase.

Update the code logic to fall back to use the default one when in
pre-relocation phase.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
907568e895 ppc: mpc85xx: Wrap LAW related codes with CONFIG_FSL_LAW
LAW related codes should be wrapped with CONFIG_FSL_LAW.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:42 +05:30
Rajesh Bhagat
c8c0170f19 configs: fsl: move via specific defines to Kconfig
Moves below via specific defines to Kconfig:

	CONFIG_FSL_VIA

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:41 +05:30
Rajesh Bhagat
504debcd8c configs: fsl: move bootrom specific defines to Kconfig
Moves below bootrom specific defines to Kconfig:

    CONFIG_SYS_FSL_BOOTROM_BASE
    CONFIG_SYS_FSL_BOOTROM_SIZE

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:41 +05:30
Tom Rini
52ba373b78 i.MX for 2021.04
----------------
 
 - new boards:
 	- i.MX8MN Beacon EmbeddedWorks (2GB)
 	- Gateworks Venice imx8mm
 - convert to DM:
 	- imx53-qsb, mx53loco, mx51evk, mx23-evk
 - Fixes :
 	- Network : FEC ethernet quirks
 	- DH dh-imx6
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6597
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Merge tag 'u-boot-imx-20210303' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2021.04
----------------

- new boards:
	- i.MX8MN Beacon EmbeddedWorks (2GB)
	- Gateworks Venice imx8mm
- convert to DM:
	- imx53-qsb, mx53loco, mx51evk, mx23-evk
- Fixes :
	- Network : FEC ethernet quirks
	- DH dh-imx6

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6597
2021-03-03 10:10:34 -05:00
Tim Harvey
03bf8436a3 board: gateworks: imx8mm: Add Gateworks Venice board support
Add initial support for Gateworks Venice product family based on the
i.MX 8M Mini SoC

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-03-03 14:15:02 +01:00
Tim Harvey
5db93abe33 arm: dts: imx8mm: add Gateworks i.MX8 Mini Dev kits
Add Gateworks i.MX 8M Mini Development kits from Linux-5.12-rc1

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-03-03 14:15:02 +01:00
Pali Rohár
50ef3851b8 arm: omap3: Compile s_init() function only when it is used
Function s_init() is called only from lowlevel_init(). So compile it only
when function lowlevel_init() is compiled.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
2021-03-03 04:12:46 +01:00
Pali Rohár
628680a99f arm: omap3: Compile lowlevel_init() function only when it is used
Function lowlevel_init() is called only from cpu_init_crit() and this
function is wrapped into #if .. #endif section. So compile also
lowlevel_init() function under same #if condition.

Function cpy_clk_code() uses lowlevel_init symbol to get address where
go_to_speed code ends. As this symbol is not available anymore when
compiling with CONFIG_SKIP_LOWLEVEL_INIT, defines a new label
go_to_speed_end at the place where go_to_speed code ends.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
2021-03-03 04:12:46 +01:00
Marek Vasut
7034478a2f ARM: imx: Include u-boot.img in u-boot-with-spl.imx if OF_SEPARATE=y
The u-boot-with-spl.imx is a concatenation of SPL and u-boot.uim.
The u-boot.uim is u-boot.bin wrapped in uImage. In case OF_SEPARATE
is enabled, the u-boot.bin does not contain control DT for U-Boot,
and so u-boot.uim does not contain the DT, and so u-boot-with-spl.imx
does not contain the DT, and a system where u-boot-with-spl.imx is
written to offset 1024B to the start of storage no longer boots, as
it is missing DT.

In case OF_SEPARATE is enabled, u-boot.img contains both u-boot.bin
and the necessary DTs. Therefore, use u-boot.img instead of u-boot.uim
to generate u-boot-with-spl.imx when OF_SEPARATE is enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2021-03-01 16:51:11 +01:00
Marek Vasut
076dc92ac6 ARM: imx: Do not hard-code MX8M MMU table DRAM entry offset
Instead of hard-coding the offset of DRAM entries in MMU table all over
the code, auto-detect the offset. This removes error-prone code which
would break e.g. in case the MMU table is modified.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
5d42ea5535 ARM: dts: imx8mq-evk: Remove u-boot,off-on-delay-us property
Commit 247bbeb74c ("ARM: dts: imx8m: increase off-on delay on the SD Vcc
regulator") caused the imx8mq-evk board to not be able to store the
environment variables in the SD card.

Remove the u-boot,off-on-delay-us property to fix the regression.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2021-03-01 10:21:36 +01:00
Ye Li
f19d1a946c arm: dts: imx8mp-evk: Add FEC PHY reset timing
Add phy-reset-duration and phy-reset-post-delay to FEC node for PHY
reset, otherwise the PHY does not work correctly.

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-03-01 10:21:36 +01:00
Marek Vasut
fb4c3387bc ARM: imx: Add missing FEC ethernet quirk for MX8M
The MX8M also contains a gigabit MAC, so define FEC_QUIRK_ENET_MAC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
23013aa961 mx23evk: Convert to driver model
Make the conversion to driver model as it is mandatory.

Successfully tested booting Linux from the SD card.

Dropped splash screen support as this needs to be properly
converted to DM and tested.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
c6f2b4cabf mx23-evk: Import devicetree file from Linux
Import the imx23-evk devicetree files from Linux kernel
version 5.11.

This is in preparation for converting the mx23evk_defconfig
target to driver model.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
07fc671d7e mx51evk: Convert to driver model
Make the conversion to driver model as it is mandatory.

Tested booting the Linux kernel from the SD card.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
1f3b3e7919 imx51-babbage: Import devicetree files from Linux
Import the imx51-babbage devicetree files from Linux kernel
version 5.11-rc7.

This is in preparation for converting the mx51evk_defconfig
target to driver model.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
21755161b2 ARM: dts: imx53-qsb: Describe the esdhc1 card detect pin
The micro SD card slot uses GPIO3_13 as card detect pin, so describe
it in the devicetree.

This was noticed when converting imx53-qsb board to driver model
in U-Boot as the micro SD card was not getting detected.

After this change it is possible to load the dtb and zImage
from the SD card and boot Linux.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
5c8db4922d mx53loco: Convert to driver model
Make the conversion to driver model as it is mandatory.

Remove the SATA support for now as the i.MX53 support has not
been added yet.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Fabio Estevam
a48c22bc52 imx53-qsb: Import devicetree files from Linux
Import the imx53-qsb devicetree files from Linux kernel
version 5.11-rc7.

This is in preparation for converting the mx53loco_defconfig
target to driver model.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Oleksandr Suvorov
91026456f4 board: toradex: move RGMII delays to PHY side
The RGMII link delays can be set on either MAC or PHY side. Set the
rgmii-id PHY mode for FEC and remove FEC_ENET_ENABLE_.XC_DELAY
setting, so that these definitions aren't used anymore throughout
the U-Boot.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Oleksandr Suvorov
e5da517c28 ARM: imx8: Add missing FEC ENET quirk for i.MX8/i.MX8X
Both NXP SoCs i.MX8 and i.MX8X have ENET gigabit MAC.
Define FEC_QUIRK_ENET_MAC for the imx8 platform and remove this
definition from configs of boards, based on MX8/MX8X.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Sean Anderson
1ce6e10c61 ARM: mx6: Add function to set serial#
The serial number OTP is similar to the imx7 version, except that the
register names are different. This also sets serial# directly, instead of
providing board_get_serial.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-03-01 10:21:36 +01:00
Tom Rini
a3c6d287ba - Add USB host boot support in stm32mp1 config
- Enable uefi related commands for STMicroelectronics STM32MP15 boards
 - Remove duplicate uart nodes in stm32mp15 device tree
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Merge tag 'u-boot-stm32-20210226' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Add USB host boot support in stm32mp1 config
- Enable uefi related commands for STMicroelectronics STM32MP15 boards
- Remove duplicate uart nodes in stm32mp15 device tree
2021-02-26 12:41:06 -05:00
Patrick Delaunay
1a1a47cdba arm: dts: stm32mp15: remove duplicate uart nodes
Remove duplicated uart nodes introduced with commit 62f95af92a
("ARM: dts: stm32mp1: DT alignment with Linux kernel v5.9-rc4"),
because the uart nodes wasn't correctly ordered in alphabetic order.

Only cosmetic: the generated device tree don't change.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-26 15:44:58 +01:00
Tom Rini
99bebbd5b2 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- turris_mox: Enhancements, mostlly defconfig changes (Pali)
- pci-aardvark: Set Max Payload Size and Max Read Request Size
                to 512 bytes (Pali)
- pci_mvebu: Minor cleanup and refactoring (Marek)
- Upgrade A38x DDR3 training to version 14.0.0 (Marek)
2021-02-26 07:55:16 -05:00
Tom Rini
94218ca9a8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv 2021-02-26 07:53:04 -05:00
Marek Behún
2ca5b190c3 ARM: dts: armada-385-turris-omnia: rename node in -u-boot.dtsi file
The SPI NOR flash node name in main device tree for Turris Omnia is
called `spi-nor@0`.

Rename node spi-flash@0 in Turris Omnia's -u-boot.dtsi file to spi-nor@0
so that U-Boot does not try to probe the same SPI NOR device multiple
times.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2021-02-26 10:22:29 +01:00
Tom Rini
2cc6071ed4 ppc: Remove MPC8569MDS board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.  As this is the last ARCH_MPC8569 board, remove that support
as well.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-25 11:59:54 -05:00
Tom Rini
93ef93b60b arm: Remove sksimx6 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2021-02-25 11:59:53 -05:00
Tom Rini
53ad2db946 arm: Remove mx53smd board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-02-25 11:59:06 -05:00
Tom Rini
1c4bd238b5 arm: Remove mx53ard board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-02-25 11:59:05 -05:00
Tom Rini
2610bf14b5 arm: Remove mx25pdk board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-02-25 11:59:05 -05:00
Sean Anderson
5540294fa4 riscv: k210: Enable QSPI for spi3
This device has four IOs connected to the SPI flash. Add the appropriate
bindings.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
2021-02-25 18:06:08 +08:00
Siew Chin Lim
2f7aa89703 common: Add "ifndef __ASSEMBLY__" in asm/global_data.h
Commit "common: Drop asm/global_data.h from common header" added
asm/global_data.h into secure.h. However, secure.h will be included
by psci.S. Adding asm/global_data.h has caused compilation failure in
pcsi.S. Add "ifndef __ASSEMBLY__" in asm/global_data.h.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-24 16:51:49 -05:00
Tom Rini
cbe607b920 Xilinx changes for v2021.04-rc3
qspi:
 - Support for dual/quad mode
 - Fix speed handling
 
 clk:
 - Add clock enable function for zynq/zynqmp/versal
 
 gem:
 - Enable clock for Versal
 - Fix error path
 - Fix mdio deregistration path
 
 fpga:
 - Fix buffer alignment for ZynqMP
 
 xilinx:
 - Fix reset reason clearing in ZynqMP
 - Show silicon version in SPL for Zynq/ZynqMP
 - Fix DTB selection for ZynqMP
 - Rename zc1275 to zcu1275 to match DT name
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Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.04-rc3

qspi:
- Support for dual/quad mode
- Fix speed handling

clk:
- Add clock enable function for zynq/zynqmp/versal

gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path

fpga:
- Fix buffer alignment for ZynqMP

xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
2021-02-23 10:45:55 -05:00
Tom Rini
8f7a16aac3 - adds adc-keys button driver
- fix meson-saradc driver to get reference voltage
 - add adc-keys test for sandbox
 - enable adc-keys for VIM3 & VIM3L boards
 - fix button.h build
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Merge tag 'u-boot-amlogic-20210222' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- adds adc-keys button driver
- fix meson-saradc driver to get reference voltage
- add adc-keys test for sandbox
- enable adc-keys for VIM3 & VIM3L boards
- fix button.h build
2021-02-22 12:37:02 -05:00
Tom Rini
bced796e2d Merge tag 'ti-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix ethernet on J721e
- Sync am335x DT nodes from Linux 5.9-rc7
- Minor Clock fixes
2021-02-22 09:12:04 -05:00
Dario Binacchi
d67da448ff arch: sandbox: fix typo in clk.h
Fix the 'devivce' typo in arch/sandbox/include/asm/clk.h.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-22 11:39:49 +05:30
Dario Binacchi
252ee3c5b9 arm: dts: sync am33xx-clocks with Linux 5.9-rc7
The commit 6337d53fdf ("arm: dts: sync am33xx with Linux 5.9-rc7")
synchronized the am33xx-clocks.dtsi file with Linux 5.9-rc7 with the
exception of two nodes. I think I was wrong and it is better to keep
the two files similar and possibly make changes to the *-u-boot.dtsi
files.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-22 11:39:48 +05:30
Sinan Akman
cbc3cd02a1 mpc8379erdb: Add device tree
Signed-off-by: Sinan Akman <sinan@writeme.com>
2021-02-21 18:45:26 -05:00
Igor Opaniuk
2147a16983 dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO
Use CONFIG_IS_ENABLED() macro, which provides more convenient
way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs
for both SPL and U-Boot proper.

CONFIG_IS_ENABLED(DM_I2C) expands to:
- 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y',
- 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y',
- 0 otherwise.

All occurences were replaced automatically using these bash cmds:
$ find . -type f -exec sed -i
     's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
    's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
    's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +

Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-21 06:08:00 +01:00
Tobias Schramm
7f4e294b57 sunxi: support boot console on uart1 for sun8i
The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on
GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins
as boot console.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-02-19 23:28:50 +00:00
Jernej Skrabec
bc24884c4c sunxi: spl: Fix H616 clock initialization
It turns out that there is a magic bit in PRCM region which seemingly
makes PLLs work if it's enabled. Sadly, there is no documentation what
it does exactly, so we'll just mimick BSP boot0 behaviour and enable it
before any clock is set up.

Fixes: b18bd53d6c ("sunxi: introduce support for H616 clocks")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-02-19 23:28:50 +00:00
Tom Rini
a1a652e801 Merge tag 'mmc-2021-2-19' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- mmc_spi improvement
- added mmc-pwrseq to remove duplicated code
- fix response timeout after switch command
- sdhci: skip cache invalidation if DMA is not used
2021-02-19 11:56:14 -05:00
Jaehoon Chung
ba74bc1a0e ARM: mach-meson: select MMC_PWRSEQ config
Before time, PWRSEQ is selected since below commit.
commit 262d343633 ("board: amlogic: select PWRSEQ for all amlogic platform")
Select MMC_PWRSEQ config because of introducing CONFIG_MMC_PWRSEQ for
only eMMC module.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19 15:11:21 +08:00
Tom Rini
766927a759 Merge branch '2021-02-18-SPL-FIT-OP-TEE-Linux-improvements'
- Improve interactions between SPL / OP-TEE and Linux in FIT images
2021-02-18 12:02:11 -05:00
Nicolas Saenz Julienne
e88018769c dm: test: Add test case for dev->dma_offset
Add test to validate dev->dma_offset is properly set on devices.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Nicolas Saenz Julienne
283628c412 dm: test: Add test case for dev_get_dma_ranges()
Introduce some new nodes in sandbox's test device-tree and dm tests in
order to validate dev_get_dma_range().

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18 11:56:25 +01:00
Marek Szyprowski
289d0ead28 test: add a simple test for the adc-keys button driver
Add adc-keys device to the sandbox/test.dts and connect it to the channel
#3 of the sandbox_adc driver. The default values sampled by sandbox_adc
driver determines that button3 and button4 are released and button5 is
pressed.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-18 11:37:26 +01:00
Alexandru Gagniuc
efc4ad0bc7 spl: fit: Drop 'length' argument to board_spl_fit_post_load()
The size is derived from the FIT image itself. Any alignment
requirements are machine-specific and known by the board code. Thus
the total length can be derived from the FIT image and knowledge of
the platform. The 'length' argument is redundant. Remove it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CC: Matt Porter <mporter@konsulko.com>
2021-02-17 17:12:45 -05:00
Alex Marginean
cc32fd911a arm: dts: ls1028a: Add Ethernet switch node and dependencies
The definition follows the DSA binding in kernel and describes the switch,
its ports and PHYs.  The switch node has the same structure as in Linux
and this patch enables it (and relevant ports) for the LS1028A RDB board.

ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028A, it is
not used in U-Boot and was disabled.  Ethernet port aliases were also
added to better manage the multitude of ports available now.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2021-02-16 12:38:36 -05:00
Dario Binacchi
f43d9e904d arm: dts: sync am33xx gpio nodes with Linux 5.9-rc7
Move gpio controller nodes from am33xx.dtsi to am33xx-l4.dtsi. Now both
files are more similar to those found in Linux 5.9-rc7. To be fully
operational as before it was also necessary to fix the am33xx-clock.dtsi
file. It too is now almost the same as the Linux kernel.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-16 10:30:11 +05:30
Vignesh Raghavendra
1e8f246563 ARM: dts: k3-j7200-common-proc-board-u-boot: Fix broken ethernet
Since commit 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts
into U-Boot") ranges have been added to CPSW node which results in
U-Boot CPSW driver failing to acquire phy_gmii_sel register range and
thus failing to configure GMII mode correctly.

Fix this by deleting ranges in -u-boot-dtsi just like its done for other
K3 platforms.

Fixes: 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-02-16 10:29:57 +05:30
Simon Glass
c5819701a3 image: Adjust the workings of fit_check_format()
At present this function does not accept a size for the FIT. This means
that it must be read from the FIT itself, introducing potential security
risk. Update the function to include a size parameter, which can be
invalid, in which case fit_check_format() calculates it.

For now no callers pass the size, but this can be updated later.

Also adjust the return value to an error code so that all the different
types of problems can be distinguished by the user.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15 22:31:52 -05:00
Tom Rini
2ae80437fb Merge branch '2021-02-02-drop-asm_global_data-when-unused'
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-15 10:16:45 -05:00
Tom Rini
73effc2dca sh: Remove sh7763rdp board
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well.  Remove it.

Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15 10:16:24 -05:00