sunxi: spl: Fix H616 clock initialization

It turns out that there is a magic bit in PRCM region which seemingly
makes PLLs work if it's enabled. Sadly, there is no documentation what
it does exactly, so we'll just mimick BSP boot0 behaviour and enable it
before any clock is set up.

Fixes: b18bd53d6c ("sunxi: introduce support for H616 clocks")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Jernej Skrabec 2021-02-01 18:25:57 +01:00 committed by Andre Przywara
parent a1a652e801
commit bc24884c4c
1 changed files with 5 additions and 0 deletions

View File

@ -9,6 +9,11 @@ void clock_init_safe(void)
{
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
/* this seems to enable PLLs on H616 */
if (IS_ENABLED(CONFIG_MACH_SUN50I_H616))
setbits_le32(SUNXI_PRCM_BASE + 0x250, 0x10);
clock_set_pll1(408000000);
writel(CCM_PLL6_DEFAULT, &ccm->pll6_cfg);