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gpio: mpc8xxx: Support controller register physical address beyond 32-bit 

dev_read_addr_size_index() returns fdt_addr_t which might be a
64-bit physical address. This might be true for some 85xx SoCs
whose CCSBAR is mapped beyond 4 GiB.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Bin Meng 2021-02-25 17:22:50 +08:00 committed by Priyanka Jain
parent f94cbb5b87
commit 271a87b4ec
2 changed files with 5 additions and 4 deletions
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2
arch/powerpc/include/asm/arch-mpc85xx/gpio.h
View File

@ -18,7 +18,7 @@
#endif
struct mpc8xxx_gpio_plat {
ulong addr;
phys_addr_t addr;
unsigned long size;
uint ngpios;
};

7
drivers/gpio/mpc8xxx_gpio.c
View File

@ -20,7 +20,7 @@ struct mpc8xxx_gpio_data {
/* The bank's register base in memory */
struct ccsr_gpio __iomem *base;
/* The address of the registers; used to identify the bank */
ulong addr;
phys_addr_t addr;
/* The GPIO count of the bank */
uint gpio_count;
/* The GPDAT register cannot be used to determine the value of output
@ -181,7 +181,7 @@ static int mpc8xxx_gpio_of_to_plat(struct udevice *dev)
if (dev_read_bool(dev, "little-endian"))
data->little_endian = true;
plat->addr = (ulong)dev_read_addr_size_index(dev, 0, (fdt_size_t *)&plat->size);
plat->addr = dev_read_addr_size_index(dev, 0, (fdt_size_t *)&plat->size);
plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
return 0;
@ -220,7 +220,8 @@ static int mpc8xxx_gpio_probe(struct udevice *dev)
mpc8xxx_gpio_plat_to_priv(dev);
snprintf(name, sizeof(name), "MPC@%lx_", data->addr);
snprintf(name, sizeof(name), "MPC@%.8llx",
(unsigned long long)data->addr);
str = strdup(name);
if (!str)