Commit Graph

610 Commits

Author SHA1 Message Date
Tom Rini
a4ef0657e3 Merge branch '2019-12-02-master-imports'
- A large series of clean-ups to reduce common.h contents
2019-12-02 22:05:35 -05:00
Simon Glass
d67bdaa799 common: Move trap_init() out of common.h
Move this function into the init.h header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-12-02 18:25:25 -05:00
Simon Glass
67c4e9f815 common: Move board_get_usable_ram_top() out of common.h
Move this function into init.h which seems to be designed for this sort
of thing. Also update the header to declare struct global_data so that it
can be included without global_data.h being needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:04 -05:00
Simon Glass
c30b7adbca common: Move interrupt functions into a new header
These functions do not use driver model but are fairly widely used in
U-Boot. But it is not clear that they will use driver model anytime soon,
so we don't want to label them as 'legacy'.

Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it
is widely used in U-Boot already.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:00 -05:00
Simon Glass
1eb69ae498 common: Move ARM cache operations out of common.h
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:58 -05:00
Simon Glass
9edefc2776 common: Move some cache and MMU functions out of common.h
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:55 -05:00
Simon Glass
1045315df0 common: Move get_ticks() function out of common.h
This function belongs in time.h so move it over and add a comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:13 -05:00
Daniel Schwierzeck
2a250ae9b6 MIPS: remove Micronas VCT boards
The deadline for migration to CONFIG_DM is v2020.01. The VCT
baords would need an almost complete rewrite of all drivers to
support driver model.

Unless someone has access to the hardware and volunteers to do the migration,
the board should be scheduled for removal.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
2019-11-29 16:18:35 +01:00
Weijie Gao
3f851c992d mips: mtmips: select essential drivers in Kconfig
Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the
system, they should be always selected.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
4e2ccca26d dts: mtmips: add default pinctrl to eth nodes for all boards
This patch adds default eth pinctrl for all boards.

There are two pinctrl nodes used for two scenarios:
ephy_iot_mode    - for IOT boards which have only one port (PHY0)
ephy_router_mode - For routers which have more than one ports

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
ef55fa03d4 dts: mtmips: add default pinctrl for gardena-smart-gateway-mt7688
This adds default pinctrl (dual SPI chip select) for gardena smart gateway

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
e3b326fee5 dts: mtmips: add mmc related nodes for mt7628an.dtsi
This patch adds mmc related nodes for mt7628an.dtsi

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
cff0b044d2 dts: mtmips: enable eth port0 led and link poll functions for all boards
This patch adds default p0led status and phy0 link polling for all boards.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
6658ebc96a dts: mtmips: update reset controller node for mt7628
This patch updates reset controller node for mt7628

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
123ffd4679 dts: mtmips: add default pinctrl for uart nodes
This patch adds default pinctrl for uart nodes

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
fdf92df285 dts: mtmips: add pinctrl node for mt7628
This patch adds pinctrl node with default pin state for mt7628an.dtsi.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
2d767a7497 dts: mtmips: add clock node for mt7628
This patch adds clkctrl node for mt7628 and adds clocks property for
some node.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
5fcea8d3f9 dts: mtmips: enable high-speed UART support for mt7628
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.

Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is built in.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
d1d8814458 dts: mtmips: move uart property clock-frequency into mt7628an.dtsi
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Álvaro Fernández Rojas
a69bae04fd mips: bmips: switch to board defines for dtb
Fixes commit 344db3f, which added missing bmips dtbs depending on their SoCs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
f923c758e0 bmips: correct name characters
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
331bee8786 bmips: enable vr-3032u nand support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
0f57c932f9 bmips: bcm63268: add support for brcmnand
BCM63268 uses 4.0 HW nand controller, which is currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
c4bf879063 bmips: bcm6362: add support for brcmnand
BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
12dfa45947 bmips: bcm6328: add support for brcmnand
BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Álvaro Fernández Rojas
edbd175c66 bmips: bcm6368: add support for brcmnand
BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by
brcmnand driver.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-10-25 17:20:43 +02:00
Ramon Fried
22247c63ac MIPS: add compile time definition of L2 cache size
If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.

Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
2019-10-25 17:20:43 +02:00
Simon Glass
4bfd1f5d62 env: Move env_init() to env.h
Move env_init() over to the new header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11 16:43:41 -04:00
Stefan Roese
9814fb272f mips: mt76xx: Implement new d-cache fix in last_stage_init()
With commit 06985289d4 ("watchdog: Implement generic watchdog_reset()
version") the init sequence has changed in arch_misc_init(), resulting
in a re-appearance of the d-cache issue on MT7688 boards (e.g. gardena).
When this happens, the first (or sometimes later ones as well) TFTP
command hangs and does not complete correctly. This leads to the
assumption that the d-cache is not in a clean state once the ethernet
driver is called (d-cache is used here for the buffers). The old work-
around with the cache flush somehow does not work any more now with
the new code change.

Unfortunately adding CONFIG_SYS_MALLOC_CLEAR_ON_INIT also did not fix
this issue. With v2019.07-rc3 it shows again. The time of accessing
the data seems to be very important here. It needs to be "very late"
in the boot process.

Testing has shown, that copying a 64KiB area in DDR at a very late
bootup time, directly before calling into the prompt, fixes this issue.
Flushing of the complete d-cache does not seem to necessary, as this
copy alone seems to fix this problem.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-07-05 17:12:27 +02:00
Stefan Roese
f913eab9b9 mips: mt76xx: Remove cache workaround and select SYS_MALLOC_CLEAR_ON_INIT
With commit 06985289d4 ("watchdog: Implement generic watchdog_reset()
version") the init sequence has changed in arch_misc_init(), resulting
in a re-appearance of the d-cache issue on MT7688 boards (e.g. gardena).
When this happens, the first (or sometimes later ones as well) TFTP
command hangs and does not complete correctly. This leads to the
assumption that the d-cache is not in a clean state once the ethernet
driver is called (d-cache is used here for the buffers). The old work-
around with the cache flush somehow does not work any more now with
the new code change.

To fix this issue, this patch now removes the old workaround and selects
CONFIG_SYS_MALLOC_CLEAR_ON_INIT for ARCH_MTMIPS. With this option the
complete malloc area is initialized with zeros (cache lines are touched).
Testing has shown that this also fixes the issue on the MT7688 boards.

Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-05-24 15:55:17 +02:00
Horatiu Vultur
5c629b1b69 net: mscc: ocelot: Update DTS for Luton pcb90
Update device tree for luton to add support for luton pcb90.
This pcb has 24 ports from which 12 ports are connected to
SerDes6G.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03 16:46:36 +02:00
Weijie Gao
16b94903e2 mips: rename mach-mt7620 to mach-mtmips
Currently mach-mt7620 contains only support for mt7628. To avoid confusion,
rename mach-mt7620 to mach-mtmips, which means MediaTek MIPS platforms.
MT7620 and MT7628 should be distinguished by SOC_MT7620 and SOC_MT7628
because they do not share the same lowlevel codes.

Dependencies of four drivers are changed to SOC_MT7628 as these drivers
are only used by MT7628.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-05-03 16:43:11 +02:00
Horatiu Vultur
8c211af8f8 net: mscc: ocelot: Update DTS for Ocelot pcb120.
Update device tree for ocelot to add support for ocelot pcb120.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03 16:42:24 +02:00
Horatiu Vultur
6390da4a57 net: mscc: ocelot: Update network driver for pcb120
Update Ocelot network driver to have support also for pcb120.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03 16:42:23 +02:00
Horatiu Vultur
6943cc9732 arch: mips: Update initrd_start and initrd_end
Microsemi SoC defines CONFIG_SYS_SDRAM_BASE to be 0x80000000, which
represents the start of kseg0 and represents a virtual address. Meaning
that the initrd_start and initrd_end point somewhere kseg0.
When these parameters are passed to linux kernel through DT
they are pointing somewhere in kseg0 which is a virtual address but linux
kernel expects the addresses to be physical addresses(in kuseg) because
it is converting the physical address to a virtual one.

Therefore update the uboot to pass the physical address of initrd_start
and initrd_end by converting them using the function virt_to_phys before
setting up the DT.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-05-03 16:42:23 +02:00
Robert P. J. Day
feda3b44a9 MSCC: delete obsolete reference to MSCC_BITBANG_SPI_GPIO
Remove "select MSCC_BITBANG_SPI_GPIO" since Kbuild option was deleted
back in commit ace9c103df:

  commit ace9c103df
  Author: Lars Povlsen <lars.povlsen@microchip.com>
  Date:   Tue Jan 8 10:38:35 2019 +0100

    mips: gpio: mscc: Obsoleted gpio-mscc-bitbang-spi.c
2019-05-03 16:42:23 +02:00
Horatiu Vultur
4788704dd8 net: mscc: serval: Add ethernet nodes for Serval
Add ethernet nodes for Serval SoCs family. There are 2 pcb in this
family: pcb105 and pcb106.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03 16:42:23 +02:00
Horatiu Vultur
72e224b864 mips: mscc: serval: Fix reset
In case the ddr training was failing, it couldn't reset, it was just
hanging. Therefore reimplement it, so when ddr training is failing
it would call _machine_restart, which power downs the DDR and does
a force reset.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-05-03 16:42:23 +02:00
Stefan Roese
06985289d4 watchdog: Implement generic watchdog_reset() version
This patch tries to implement a generic watchdog_reset() function that
can be used by all boards that want to service the watchdog device in
U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG.

Without this approach, new boards or platforms needed to implement a
board specific version of this functionality, mostly copy'ing the same
code over and over again into their board or platforms code base.

With this new generic function, the scattered other functions are now
removed to be replaced by the generic one. The new version also enables
the configuration of the watchdog timeout via the DT "timeout-sec"
property (if enabled via CONFIG_OF_CONTROL).

This patch also adds a new flag to the GD flags, to flag that the
watchdog is ready to use and adds the pointer to the watchdog device
to the GD. This enables us to remove the global "watchdog_dev"
variable, which was prone to cause problems because of its potentially
very early use in watchdog_reset(), even before the BSS is cleared.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: "Marek Behún" <marek.behun@nic.cz>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Maxim Sloyko <maxims@google.com>
Cc: Erik van Luijk <evanluijk@interact.nl>
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: "Álvaro Fernández Rojas" <noltari@gmail.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
2019-04-26 09:16:32 +02:00
Philippe Reynes
92cd0047a9 dt: bcm968380gerg: enable nand controller
Enable the nand controller in the device tree
of the board bcm96838gerg.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22 11:56:29 -04:00
Philippe Reynes
d8d9bfb90b dt: bcm6838: add nand controller
Add the nand controller in the bcm6838 device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-22 11:55:58 -04:00
Tom Rini
216800acf1 Merge branch 'master' of git://git.denx.de/u-boot-spi
Conflicts:
	arch/arm/dts/armada-385-amc.dts
	arch/arm/dts/armada-xp-theadorable.dts
	arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-14 00:03:06 -04:00
Horatiu Vultur
da843eab1f net: mscc: servalt: Add ethernet nodes for ServalT
Add ethernet nodes for ServalT SoCs family. Currently there is only one
pcb(pcb116) in this family.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12 17:32:53 +02:00
Horatiu Vultur
746f2d3e8b net: Add MSCC ServalT network driver.
Add network driver for Microsemi Ethernet switch.
It is present on ServalT SoCs.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:52 +02:00
Horatiu Vultur
1141176163 net: mscc: jaguar2: Add ethenet nodes for Jaguar2.
Add ethernet nodes for Jaguar2 SoCs family. There are 3 pcb in this
family: pcb110, pcb111 and pcb112.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
f1ed3cfc53 dt: bcm968380gerg: enable gpio controller
Enable the gpio controllers in the device tree
of the board bcm968380gerg.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
ce171053a8 dt: bcm6838: add gpio controller
Add gpio controllers in bcm6838 device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:51 +02:00
Rosy Song
61290fb52c mips: add initial support for qca956x referenced board
QCA9563 is CPU used on AP152 board :

    Clock speed : 750 MHz ,
    Arch :  Mips 74Kc,
    Eth : SGMII interface,
    MIMO config : 3 * 3 450M,
    2 * USB 2.0,

Signed-off-by: Rosy Song <rosysong@rosinson.com>

Changes for v2:
   - coding style cleanup
   - remove ununsed flash chip in defconfig
   - enable automatic icache / dcache size in defconfig

Changes for v3:
   - add detailed information for qca956x in commit message

Changes for v4:
   - remove pre-configured network settings in ap152.h

Changes for v5:
   - coding style cleanup
2019-04-12 17:32:50 +02:00
Rosy Song
fda1bb0574 mips: fix erros on registers macros of pll-ddr-config1-nfrac for QCA956X
See details in chapter 8.6.2 and 8.6.4 (page 140-141) of qca9563 datasheet,

   NFRAC[17:0]

So the mask of [17:5] is 0x1fff not 0x3fff.

Signed-off-by: Rosy Song <rosysong@rosinson.com>

Changes for v2-v3:
   - add more information for this commit

Changes for v4-v5:
   - coding style cleanup
2019-04-12 17:32:50 +02:00
Horatiu Vultur
e515166636 bootm: mips: Remove boot_reloc_ramdisk
Remove the function boot_reloc_ramdisk in the file arch/mips/lib/bootm
because it is relocating again the ramdisk. The function do_bootm_states()
already relocates the ramdisk even if it is a legacy uImage or a FIT image.

The relocation in the function do_bootm_states() was introduce in the
commit c2e7e72bb9 ("bootm: relocate ramdisk
if CONFIG_SYS_BOOT_RAMDISK_HIGH set")

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:50 +02:00