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MIPS: add compile time definition of L2 cache size

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If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.

Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
This commit is contained in:
Ramon Fried 2019-06-10 21:05:26 +03:00 committed by Daniel Schwierzeck
parent 17fd9915a4
commit 22247c63ac
2 changed files with 10 additions and 2 deletions
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10
arch/mips/Kconfig
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@ -408,9 +408,17 @@ config SYS_ICACHE_LINE_SIZE
help
The size of L1 Icache lines, if known at compile time.
config SYS_SCACHE_LINE_SIZE
int
default 0
help
The size of L2 cache lines, if known at compile time.
config SYS_CACHE_SIZE_AUTO
def_bool y if SYS_DCACHE_SIZE = 0 && SYS_ICACHE_SIZE = 0 && \
SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0
SYS_DCACHE_LINE_SIZE = 0 && SYS_ICACHE_LINE_SIZE = 0 && \
SYS_SCACHE_LINE_SIZE = 0
help
Select this (or let it be auto-selected by not defining any cache
sizes) in order to allow U-Boot to automatically detect the sizes

2
arch/mips/lib/cache.c
View File

@ -87,7 +87,7 @@ static inline unsigned long scache_line_size(void)
#ifdef CONFIG_MIPS_L2_CACHE
return gd->arch.l2_line_size;
#else
return 0;
return CONFIG_SYS_SCACHE_LINE_SIZE;
#endif
}