Ramon Fried 22247c63ac MIPS: add compile time definition of L2 cache size ... If configuration is set to skip low level init, automatic probe of L2 cache size is not performed and the size is set to 0. Flushing or invalidating the L2 cache will fail in this case. Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0. Signed-off-by: Ramon Fried <rfried.dev@gmail.com>		2019-10-25 17:20:43 +02:00
..
cpu	linker: Modify linker scripts to be more generic	2019-01-26 22:55:53 -05:00
dts	net: mscc: ocelot: Update DTS for Luton pcb90	2019-05-03 16:46:36 +02:00
include/asm	mips: Add SPL header	2018-12-19 15:23:01 +01:00
lib	MIPS: add compile time definition of L2 cache size	2019-10-25 17:20:43 +02:00
mach-ath79	mips: add initial support for qca956x referenced board	2019-04-12 17:32:50 +02:00
mach-bmips	bmips: swapping IO space isn't required	2018-12-10 18:46:45 +01:00
mach-jz47xx	MIPS: jz47xx: remove custom u-boot-spl.lds	2019-01-16 13:56:43 +01:00
mach-mscc	net: mscc: ocelot: Update network driver for pcb120	2019-05-03 16:42:23 +02:00
mach-mtmips	mips: mt76xx: Implement new d-cache fix in last_stage_init()	2019-07-05 17:12:27 +02:00
mach-pic32	Kconfig: Sort bool, default, select and imply options	2018-07-30 07:18:48 -04:00
config.mk	MIPS: fix linking of standalone programs	2018-11-18 16:02:23 +01:00
Kconfig	MIPS: add compile time definition of L2 cache size	2019-10-25 17:20:43 +02:00
Makefile	mips: rename mach-mt7620 to mach-mtmips	2019-05-03 16:43:11 +02:00
Makefile.postlink	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00