Commit Graph

13852 Commits

Author SHA1 Message Date
Peng Fan
4e805c197b imx8mn: Add LPDDR4 EVK board support
Add support for iMX8MN LPDDR4 EVK board which uses 2GB LPDDR4 and
PCA9450B PMIC.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
48ddafd9a4 imx8mm_evk: Switch to new imx8mm evk board
Update PMIC to use PCA9540, the legacy board not supported by NXP

Signed-off-by: Ye Li <ye.li@nxp.com>
2021-04-08 09:18:29 +02:00
Tom Rini
02395fec00 Merge tag 'mmc-2021-4-6' of https://source.denx.de/u-boot/custodians/u-boot-mmc
Update hwpartition usage
Check bootbus's arguments
workaround for erratum A-011334 for fsl_esdhc driver
add pulse width detection workaround for fsl_esdhc driver
Use alias num before checking mmc index when creating device
2021-04-06 22:42:55 -04:00
Tom Rini
1883652c8e - Add MMIO MDIO mux driver
- Add Amlogic G12A MDIO mux driver
 - Add DM_MDIO support for designware ethernet driver
 - Add Amlogic Meson8b and later designware ethernet glue driver
 - Switch all amlogic boards to Amlogic designware ethernet glue driver
 - Switch all amlogic boards to DM_MDIO when necessary
 - Remove all static ethernet setup code
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmBsLu8ACgkQd9zb2sjI
 SdFj4RAArL8OHCGzyAXrV95fnOnl76koOFnJJ0q6PREwvLWQh3GMpN4CBYtAn95a
 nbakXGN30pHlprrRrYi8nsGHWJX2MW1k8hDWGUJ4f+r2AuvCxMT7h3CHbKY0/pKZ
 h8s7Kwy1ze53ljAbQBUnF3anzYJFPpX3nvjbNo2o5ao0gCUNilEuz1RVn2R72v8R
 kp1iZb0bBhMN3mmNeOs670oXyDoRtX4eWyhbAdrTDhofxTvxfRlQJQrxJ6/I90ex
 IueCsRaT40vl9B5I+JJsanJFDPUTFeZIAc/6DchqPVlXxQjLYP/RjUIxaZbAbnFc
 vyXSWYhoK4GAmgNmXzL00VUVLfKvWvMVMncSgRKRqVY+YBkmoFrP4sYbFrZAPqsB
 yaUoWWnuKurWGRiqbEOlvK+AmQ7So0wWLE/cImmHaadpUDFow3JseeMdZphBdaOp
 4BevvSUNE2k8LazXKyPPlm73Po7uDZmTHYc9ADemBjIj0wvdROvgTdbOdtCAPwnv
 sNVP08l51fskueFYKAkWg1/5hu9YEqzb3C+n9QyZoDNmKaGxQ102HH2gHdXkFqBD
 EciaThsIogUOxYzz7zwU4a44bzzQBuh+yp6C4Ixxe9tOyFyknNppontMUUm41Blk
 HzOvBZjzxqpQOnuVfl1k7xORFXGehCnxwLhZvDIoLYhaqFzgLUc=
 =uQEZ
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20210406' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- Add MMIO MDIO mux driver
- Add Amlogic G12A MDIO mux driver
- Add DM_MDIO support for designware ethernet driver
- Add Amlogic Meson8b and later designware ethernet glue driver
- Switch all amlogic boards to Amlogic designware ethernet glue driver
- Switch all amlogic boards to DM_MDIO when necessary
- Remove all static ethernet setup code
2021-04-06 08:37:28 -04:00
Michael Walle
d3b745f7d0 mmc: fsl_esdhc: add pulse width detection workaround
HS400 mode on the LS1028A SoC isn't reliable. The linux driver has a
workaroung for the pulse width detection. Apply this workaround in
u-boot, too.

This will make HS400 mode work reliably on the LS1028A SoC.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-06 18:36:04 +08:00
Michael Walle
bd7b8505f2 mmc: fsl_esdhc: add workaround for erratum A-011334
LS1028A SoCs are restricted in what divider values are allowed for HS400
mode. This is basically a port from the corresponding linux driver.

Signed-off-by: Michael Walle <michael@walle.cc>
2021-04-06 18:35:55 +08:00
Neil Armstrong
2fbd37001c arm: meson: remove static ethernet link setup
The static ethernet link type config code is no more needed because now handled by
the meson8b glue driver, delete it.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-04-06 11:10:29 +02:00
Neil Armstrong
775998d451 arm: meson: remove static ethernet memory power domain enable
The ethernet memory power domain is handled by the meson-ee-pwrc driver,
delete the static code.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-04-06 11:10:29 +02:00
Neil Armstrong
81233abf73 arm: meson: remove static MDIO mux handling
The static MDIO mux handling in mach-meson is no more needed, delete it.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-04-06 11:10:29 +02:00
Tom Rini
472fd5a35a Merge tag 'rockchip-for-v2021.07' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix rk3368 lion board support;
- Fix px30 odroid-go2 board support;
- Add rk3399 NanoPi R4s and NanoPi M4B board support;
2021-04-05 22:39:10 -04:00
Tom Rini
90eba245a6 Merge branch 'next' 2021-04-05 11:29:57 -04:00
Tom Rini
db8b46120a Xilinx changes for v2021.07
net:
 - Fix gem PCS support
 
 spi:
 - Small trivial fixes
 
 zynq:
 - Enable time/timer commands
 - Update bitmain platform
 - Several DT changes
 
 zynqmp:
 - Update clock driver
 - mini config alignments
 - Add/update psu_init for zcu208/zcu216/zc1275
 - Several DT changes
 - Enable efi debug command (also for Versal)
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYGRy+AAKCRDKSWXLKUoM
 IUN9AKCQHHdbKIciyhucUj5ThwT3CDaUswCeLQkRB1SrM6E8k6KkErWEA+xOxsU=
 =fIEs
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2021.07' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.07

net:
- Fix gem PCS support

spi:
- Small trivial fixes

zynq:
- Enable time/timer commands
- Update bitmain platform
- Several DT changes

zynqmp:
- Update clock driver
- mini config alignments
- Add/update psu_init for zcu208/zcu216/zc1275
- Several DT changes
- Enable efi debug command (also for Versal)
2021-03-31 09:47:30 -04:00
Andre Przywara
62acef239f sunxi: dts: H616: Drop reserved-memory node
Trusted Firmware now adds the /reserved-memory subnode to the DT at
runtime[1], putting in the right values.

Drop our hard-coded version, as this might clash with the actual values
(which have also changed), and rely on TF-A to add the node.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/7770

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-03-31 09:50:31 +01:00
Andre Przywara
c629ba854f sunxi: H616: Change TF-A load address to beginning of DRAM
Loading Trusted-Firmware's BL31 at 16KB into DRAM was originally a hack
to allow sharing more code with the other SoCs (which use this offset
in SRAM). However there is no longer a reason for that, as the
problematic macros have been properly separated there.

The latest (and hopefully final) TF-A code drop now changes the load
address to the beginning of DRAM, which is also more easily protected
by the Trustzone memory controller (code to be done).

Adjust the load address of BL31 now, to avoid any issues with
incompatible versions later on (the TF-A patches are about to be merged).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2021-03-31 09:50:05 +01:00
Tom Rini
7d23eb9260 First set of u-boot-atmel features for 2021.07 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmBi3oscHGV1Z2VuLmhy
 aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyKr+CACDQJT4hGCDwc7XFjOw
 RN0aGRC6eGF4q3kL4VjBazCM1SBNs3vdVZV+bnYl3ioSNzy43K7CyFqqUlJH7CJV
 dakvNn71xVoQD3Xw3+I4ALibbD/tlli4vwMOeN4KlWCIdNrRrtUOQpli0M0BVDkL
 0IWMDf6OLAfw1uytubsQBVitFBQoiuE3ihSphoyTOFwQdI+xsMue5uVq+O0kDqU4
 gotBzmoSq5LONyNSdpHxXqujU4oXkuOr/TsVTOoRtEkQ63zVbfNWOg951is+UaHa
 F7f6W+cWdlb+HBs6TFb+Gva0TMmyWIH05jyIS52k6uFVM0tyFCOJFeZp81cjPP4L
 O3KI
 =ywRG
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-atmel-2021.07-a' of https://source.denx.de/u-boot/custodians/u-boot-atmel into next

First set of u-boot-atmel features for 2021.07 cycle:
This small feature set includes the implementation of the slew rate for
the PIO4 pin controller device, and a fix for arm926ejs-based
microprocessors that avoids a crash.
2021-03-30 11:24:09 -04:00
Michal Simek
9dcf2e5c0d ARM: bitmain: Enable nand and smcc drivers
Enable nand and smcc via DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:25 +02:00
Michal Simek
ce90654d1c xilinx: Sync DTs with Linux kernel
There are several changes which happen in mainline kernel which should get
also to U-Boot. Here is the list of patches from the kernel:

- ARM: zynq: Fix leds subnode name for zc702/zybo-z7
- arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
- arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111
- arm64: dts: zynqmp: Wire up the DisplayPort subsystem
- arm64: dts: zynqmp: Add DisplayPort subsystem
- arm64: dts: zynqmp: Add DPDMA node
- arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106
- arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
- arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106
- arm64: dts: zynqmp-zcu100-revC: correct interrupt flags
- arm64: dts: xilinx: align GPIO hog names with dtschema
- arm64: zynqmp: Add Xilinx AES node
- dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA

but also some other changes have been done.
- Using only one compatible string for adxl345 on zturn
- Remove Xilinx internal DP bindings
- Remove USB3.0 serdes configurations
- Remove SATA serdes configuration for zc1232
- Resort nvmem_firmware
- Update nand compatible string
- Aling power-domains property for sd0/1

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:24 +02:00
Amit Kumar Mahapatra
e2b71c382f arm64: zynqmp: Rename clocks as per the Arasan NAND driver
In zynqmp.dtsi file renamed "clk_sys" clock to "controller" and
"clk_flash" clock to "bus" as per upstreamed Arasan NAND driver.
This fixes NAND driver probe failure.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:24 +02:00
Amit Kumar Mahapatra
fbf043d7e6 arm64: zynqmp: Update device tree properties for nand flash
Update the following device tree properties for nand flash

- Set software ecc mode.
- Set bch as ecc algo.
- Set read block to 0.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:24 +02:00
Michal Simek
9577b2edf3 arm64: zynqmp: Add idt 8a34001 chip to zcu208/zcu216
There is Linux driver for these chips that's why add it to device tree.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:24 +02:00
Ashok Reddy Soma
d5843f26ac arm64: zynqmp: Add emmc specific parameters
EMMC will have bus-width 8 and it is non-removable in general. These
are missing from dt node. Add bus-width and non-removable parameters
to emmc node.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:24 +02:00
Alexandre Vicenzi
a99d70c180 board: dts: rockchip: Add NanoPi M4B
Add initial support for NanoPi M4B, a minor revision of
the original NanoPi M4.

Commit details of rk3399-nanopi-m4b.dts sync from Linux 5.12-rc4:
"arm64: dts: rockchip: Add NanoPi M4B board"
(sha1: c7b03115003f7f337ab165542cee37148cf30a8a)

Signed-off-by: Alexandre Vicenzi <alexandre.vicenzi@suse.com>
Reviewed-by: Kever Yang <kever.yang@rock-cihps.com>
2021-03-30 16:53:00 +08:00
Xiaobo Tian
b69b9f3f54 arm64: rk3399: Add support NanoPi R4s
NanoPi R4s is SBC base on Rockchip RK3399 hexa-core processor with
dual-Core Cortex-A72 and Mali-T864 GPU with 4GiB(LPDDR4) of RAM, SD card support,
including 2 gigabit ethernet(RTL8211E 1Gbps - RTL8111H 1Gbps) and 2 USB 3.0 port.
port.It also has two GPIO headers which allows further peripherals to be used.

The devicetree file is taken of the rk3399 nanopi4 Linux kernel [1].

[1] e7a0959082

Signed-off-by: xiaobo <peterwillcn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Christoph Muellner
1621afc84f rockchip: rk3399-puma: Restore correct VDD_LOG supply.
A commit from last year re-imported the DTS files form the upstream kernel.
By doing so the VDD_LOG regulator in the board's DTS was dropped.
Let's restore this, but move it into the u-boot overlay to prevent this
issue in the future.

Fixes: 167efc2c7a ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux")
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Heiko Stuebner
ba421b96a2 rockchip: rk3368: sync down rk3368-lion board devicetree from Linux
This brings the actual rk3368-lion devicetree files from Linux 5.10
instead of using something separate.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Heiko Stuebner
5aefa4af29 rockchip: rk3368: sync main rk3368 dtsi from Linux
This is the state as of v5.10 + the recently added timer0 phandle
targetted at the 5.12 merge window.

With this the non-mainline nodes like the dmc move to a separate
rk3368-u-boot.dtsi that is included from the board-specific
-u-boot.dtsi files, similar to how rk3399 does this.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Heiko Stuebner
ca7bb9dde7 rockchip: rk3368: move STACK_R_ADDR address and into Kconfig
With the STACK_R_ADDR at 0x600000 (6MB) we're competing with
with the loading address of either u-boot or atf parts, so move
that away to 0x4000000 (64MB) similar to rk3399.

Only lion currently sets that at all but not sheep the second
rk3368 board, so just move that to the Kconfig for rk3368 similar
to rk3399 as well.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Heiko Stuebner
53e14aa734 rockchip: rk3368: increase SYS_MALLOC_F_LEN to 0x4000
To prevent running out of memory, increase SYS_MALLOC_F_LEN to 0x4000
similar to what rk3399 uses.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-03-30 16:53:00 +08:00
Tom Rini
1057b1be75 Prepare v2021.04-rc5
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmBiRbMACgkQFHw5/5Y0
 tyz0KAv/T8glQGL6L2CYeLuwbs9tndQoaH2YNb3teNUJrqehBleJAQ6ubHP30d87
 rHrokJ4Zu3TC15sACrK4GOMvsAVkeCuU/jIqFJA4ieDZr8g7yfUMOZMsDiIFdd36
 Rdmi71Jtek/csyS5BfcUUYoXVbUCGQ8yAx7z0VrK0sqsqZYYJNwPmqgkR8U2ulNb
 FiLxwamFwH7+bsvcvHajO1dOyko0zR7GTisf/fOgmlHuF3BldqG4SDcNd528uEWb
 r3fXs2Ut6IaC/beCnmKUPVG3ZjdPtb+T230rRRhUOfjTwqR7SzXp5bTyzdgyw3gU
 rOgfi/mAGQPPG2E2fzPz0JCI1irbnkSE2fVJ4epaVUCoHIEsQQdy034aD3qLcHFY
 65ihEpRvCM7s9jfKX8XeIG4rKFB4i60TX5orzdMvx7wV3rxmPE9qQmF9lkD+fEA+
 TPuFtkjGmluSe+xWBVK7+6xuF6rcLEbNXuFWRi3qMSMgH8rtGfeJRonusOGPolwC
 jQ1T7szW
 =UJ/O
 -----END PGP SIGNATURE-----

Merge tag 'v2021.04-rc5' into next

Prepare v2021.04-rc5
2021-03-29 18:00:21 -04:00
Siew Chin Lim
2dbcc037cc arm: socfpga: Only do 'is OS booted from FIT' checking when VAB is enabled
Check CONFIG_SOCFPGA_SECURE_VAB_AUTH before perform 'is OS booted from FIT'
checking in board_prep_linux function. And, fix typo of
CONFIG_SOCFPGA_SECURE_VAB_AUTH_ALLOW_NON_FIT_IMAGE.

CONFIG_FIT will be enabled in both ATF and VAB boot flow, thus,
board_prep_linux function will always be called by both ATF and
VAB boot flow.

board_pre_linux function will do 'is OS booted from FIT' checking,
and it will be called before board_fit_image_post_process function.

VAB boot flow expects the OS is always booted from FIT and with VAB
signed cerfiticate because the VAB authentication is implemented in
board_fit_image_post_process function. So, VAB needs the 'is OS booted
from FIT' checking in board_pre_linux function.

However, for ATF boot flow, it is not a requirement that the OS must
always booted from FIT. The OS can be booted from individual Image and
kernel dtb file. Thus, we should not do 'if OS is booted from FIT'
checking in board_prep_linux function.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-03-23 14:46:35 +08:00
Martin Townsend
bbfb81c187 ARM: mach-at91: arm926ejs: fix data abort in startup returning from lowlevel_init
The startup code in arm/cpu/arm926ejs preserves the link register across
the call to lowlevel_init by using r4:

mov	r4, lr		/* perserve link reg across call */
bl	lowlevel_init	/* go setup pll,mux,memory */
mov	lr, r4		/* restore link */

The lowlevel_init function for at91 machines based on the same CPU uses r4
and hence corrupts it causing a data abort when it returns to the startup
code. This patch fixes this by using r6 instead of r4 in the lowlevel_init
function.

Discovered and the fix was tested on a AT91SAM9261 based board.

Signed-off-by: Martin Townsend <martin@rufilla.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-03-22 10:53:52 +02:00
Weijie Gao
f4f478be4c board: mt7629: enable compression of u-boot to reduce the size of final image
This patch makes use of the decompression mechanism implemented for mt7628
previously to reduce the total image size. Binman will be also removed.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20 16:24:27 -04:00
Weijie Gao
e8b98f0270 dts: mt7629: enable JTAG pins by default
The EPHY LEDs belongs to the built-in FE switch of MT7629, which is barely
used. These LED pins on reference boards are used as JTAG socket. So it's
a good idea to change the default state to JTAG, and this will make it
convenience for debugging.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20 16:24:27 -04:00
Fabien Parent
e96bedf146 board: Add MT8183 pumpkin board support
Add the MT8183 pumpkin board support.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20 16:24:27 -04:00
Fabien Parent
18380437c1 ARM: mediatek: Add MT8183 support
Add the MT8183 SoC support.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20 16:24:27 -04:00
Fabien Parent
86e07d59ee board: mediatek: rename pumpkin board into mt8516
More than one pumpkin board has been made with different MediaTek SoCs.
Rename the pumpkin board to follow the naming convention of all
other MediaTek boards and also to not be confusing when other pumpkin
boards will be added in follow-up commits.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20 16:24:26 -04:00
Lad Prabhakar
9e346340d7 board: silinux: Enable recovery SPL for EK874 board
Enable building SPL for EK874 board which is based on R8A774C0 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:30 +01:00
Lad Prabhakar
07148c1899 arm: rmobile: Add Silicon Linux EK874 board support
The EK874 development kit from Silicon Linux is made of CAT874 (the main
board) and CAT875 (the sub board that goes on top of CAT874).

This patch adds the required board support to boot Si-Linux EK874 board
based on R8A774C0 SoC.

DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi
have been imported from Linux kernel 5.11 commit f40ddce88593
("Linux 5.11").

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Lad Prabhakar
220f308a5c pinctrl: renesas: Add support for R8A774C0
Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car
E3 (a.k.a. r8a77990), however it doesn't have several automotive
specific peripherals.

This patch hooks R8A774C0 SoC with the pfc driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Lad Prabhakar
6180db6e56 arm: dts: r8a774c0: Resync R8A774C0 SoC DTSI with Linux 5.11
Resync the R8A774C0 SoC DTSI with Linux kernel 5.11 commit f40ddce88593
("Linux 5.11").

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
5be85de6a8 arm: rmobile: Add HopeRun HiHope RZ/G2H board support
The HiHope RZ/G2H board from HopeRun consists of main board
(HopeRun HiHope RZ/G2H main board) and sub board(HopeRun
HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits
below the HiHope RZ/G2H main board.

This patch adds the required board support to boot HopeRun HiHope
RZ/G2H board.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
dca070c382 arm: rmobile: Add HopeRun HiHope RZ/G2N board support
The HiHope RZ/G2N board from HopeRun consists of main board
(HopeRun HiHope RZ/G2N main board) and sub board(HopeRun
HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits
below the HiHope RZ/G2N main board.

This patch adds the required board support to boot HopeRun HiHope
RZ/G2N board.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
b650c83825 arm: rmobile: Add HopeRun HiHope RZ/G2M board support
The HiHope RZ/G2M board from HopeRun consists of main board
(HopeRun HiHope RZ/G2M main board) and sub board(HopeRun
HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits
below the HiHope RZ/G2M main board.

This patch adds the required board support to boot HopeRun HiHope
RZ/G2M board.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
40ac794524 arm: dts: rmobile: r8a774e1: Synchronize DTs with Linux 5.11
Synchronize r8a774e1 device trees with Linux 5.11,
commit f40ddce88593482919 ("Linux 5.11").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
2141203f58 arm: dts: rmobile: r8a774b1: Synchronize DTs with Linux 5.11
Synchronize r8a774b1 device trees with Linux 5.11,
commit f40ddce88593482919 ("Linux 5.11")

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Tom Rini
22fc991daf Prepare v2021.04-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmBPhiUACgkQFHw5/5Y0
 tywChgv/RYpdSKrD5s4kCJnImfOwDznESj/CqAQK3Au5zviq7qXRrgxyTKv2e1wM
 W51vUBd0cE1YTACXqbr92wSSyqoTthLqd57KQgVele5uC2dvkqVTSvjPOUwtyIbQ
 BTPkoQnHPn30AILRdPjpEdBGfZhJDDtJFdQopn6h4GjEjPKVH8Wx1Dd+V6SD5f20
 WiksUjgdjMr1AmORY+LdwwJO8FZrGGPYgs8CDtiqxmCSwh3d7kUFFTT+G23BZdo7
 M+81+1uIUaW2Bolds7ZTPrrjr8bPwkWoTqNYhUB4bNPLp72gwnjM1rtU1X3hyiJM
 MdxSBimLHUOYPihfeSYCHSUrJaQFAAEFkuzWfZN1fgoswKEZQIVVVTzT/TomTyqf
 1DIXD+0HpXGKgVLW/Nkpl4D+UFjR865XI4kiuDxddjKI7bGbvDlbZ/k3PNelD7op
 umUswHnC3OTSw/g+A9VH/zf1rMFNLfu++vD7XJtdoWlcsl6x6/6Fh75tuC6K/X0K
 caPmehD3
 =ENym
 -----END PGP SIGNATURE-----

Merge tag 'v2021.04-rc4' into next

Prepare v2021.04-rc4
2021-03-15 12:15:38 -04:00
Tom Rini
e8a10a02bd - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
 - Remove the nand MTD configuration for NOR boot in stm32mp1 board
 - STM32programmer update
 - Bsec: manage clock when present in device tree
 - stm32mp15: move bootdelay configuration in defconfig
 - Update for stm32 dsi and dw_mipi_dsi
 - STM32 MCU's cleanup
 - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
 - Update stm32mp1 doc
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmBLfA8cHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/pkNnD/4hQrwBdaJMz9YXL4Tp
 0W7kpCcTkG+gINY06BONNnKzBHq62SkWMo/lw9iF0nlcNKSOHzrz6ttm+e54ngs0
 qe/dn0yjgImDfr5p5JRMTG1m7/XwQpucZ8wowSZAwt5f/DDh9eta9AyST0ev+iXI
 Eqgbk5HsF2OCOK6h74FJidZUdLMLw+uQkIwPhglx3ZaxxFfXHAdWtXtJ9Fky2adU
 BC0PltvJ6KYl1LTUGCQvrCST1sNe1PXPHrcsUpsQnqUSZ65tGKgeH2On9Exsw6cE
 eA5v0aiQSMmAH2pYXrJwxhSW9b03yt3NdBQd09Du2YUuFe7yZeoWIFy8mM9jRaov
 QDe88aJ9ZjxB+TvYQPToEL0EIyBGkN3HnX05BtKzKLf+E2+wP6gEf/6Sob7fBf6n
 3n2Eud0COfe06hNiocYOHm8n/8bZxdmuEgMA8LU0PZETbH33NlvJtrjyBxY4OHOV
 G+RG6J8idpVWWQ69g2TqfsVhXSjF893nvLOu0+KjuNrZWG4BVxGjylVUSvayk7bG
 TI++ZKlbdvJGweZ3uUPcNLH4VaX47P/nZS/6vX1uL7NtRNvv3jLHN5z4t6zKI9rh
 3iTJxxVv3zilWcY1WsoSdUvK56RTubnNwUlpjriabdRwMDjMN0isL9N06PvOELoi
 jU1IkKBLtMvPbb2XfLRIjvQjTQ==
 =nIJc
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20210312' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
- Remove the nand MTD configuration for NOR boot in stm32mp1 board
- STM32programmer update
- Bsec: manage clock when present in device tree
- stm32mp15: move bootdelay configuration in defconfig
- Update for stm32 dsi and dw_mipi_dsi
- STM32 MCU's cleanup
- Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
- Update stm32mp1 doc
2021-03-15 08:43:19 -04:00
Patrice Chotard
23e20b2fa6 arm: stm32mp: Fix compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled
Fix following compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS
are enabled :

arch/arm/mach-stm32mp/cpu.c: In function ‘early_enable_caches’:
arch/arm/mach-stm32mp/cpu.c:223:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_size’
  223 |  gd->arch.tlb_size = PGTABLE_SIZE;
      |          ^
arch/arm/mach-stm32mp/cpu.c:224:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_addr’
  224 |  gd->arch.tlb_addr = (unsigned long)&early_tlb;
      |          ^

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-12 10:58:55 +01:00
Pali Rohár
15942805b7 arm: mvebu: a38x: Remove dead code ARMADA_39X
Config option ARMADA_39X is never set so remove all dead code hidden under
ifdef CONFIG_ARMADA_39X blocks.

Also remove useless checks for CONFIG_ARMADA_38X define as this macro is
always defined for a38x code path.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-12 07:44:21 +01:00
Patrick Delaunay
622c956cad stm32mp: bsec: manage clock when present in device tree
Enable the clocks during bsec probe when they are present in device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:50:10 +01:00