arm: rmobile: Add Silicon Linux EK874 board support

The EK874 development kit from Silicon Linux is made of CAT874 (the main
board) and CAT875 (the sub board that goes on top of CAT874).

This patch adds the required board support to boot Si-Linux EK874 board
based on R8A774C0 SoC.

DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi
have been imported from Linux kernel 5.11 commit f40ddce88593
("Linux 5.11").

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
This commit is contained in:
Lad Prabhakar 2021-03-15 22:24:05 +00:00 committed by Marek Vasut
parent 220f308a5c
commit 07148c1899
14 changed files with 796 additions and 0 deletions

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@ -824,6 +824,7 @@ dtb-$(CONFIG_RCAR_GEN3) += \
r8a774e1-beacon-rzg2h-kit.dtb \
r8a774a1-hihope-rzg2m-u-boot.dtb \
r8a774b1-hihope-rzg2n-u-boot.dtb \
r8a774c0-ek874-u-boot.dtb \
r8a774e1-hihope-rzg2h-u-boot.dtb \
r8a77950-ulcb-u-boot.dtb \
r8a77950-salvator-x-u-boot.dtb \

64
arch/arm/dts/cat875.dtsi Normal file
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@ -0,0 +1,64 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Silicon Linux sub board for CAT874 (CAT875)
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
/ {
model = "Silicon Linux sub board for CAT874 (CAT875)";
aliases {
ethernet0 = &avb;
};
};
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
renesas,no-ether-link;
phy-handle = <&phy0>;
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
};
};
&can0 {
pinctrl-0 = <&can0_pins>;
pinctrl-names = "default";
status = "okay";
};
&can1 {
pinctrl-0 = <&can1_pins>;
pinctrl-names = "default";
status = "okay";
};
&pciec0 {
status = "okay";
};
&pfc {
avb_pins: avb {
mux {
groups = "avb_mii";
function = "avb";
};
};
can0_pins: can0 {
groups = "can0_data";
function = "can0";
};
can1_pins: can1 {
groups = "can1_data";
function = "can1";
};
};

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@ -0,0 +1,453 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
/dts-v1/;
#include "r8a774c0.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/display/tda998x.h>
/ {
model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
compatible = "si-linux,cat874", "renesas,r8a774c0";
aliases {
serial0 = &scif2;
serial1 = &hscif2;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_out: endpoint {
remote-endpoint = <&tda19988_out>;
};
};
};
leds {
compatible = "gpio-leds";
led0 {
gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
label = "LED0";
};
led1 {
gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
label = "LED1";
};
led2 {
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
label = "LED2";
};
led3 {
gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;
label = "LED3";
};
};
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
reg_12p0v: regulator-12p0v {
compatible = "regulator-fixed";
regulator-name = "D12.0V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-boot-on;
regulator-always-on;
};
sound: sound {
compatible = "simple-audio-card";
simple-audio-card,name = "CAT874 HDMI sound";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sndcpu>;
simple-audio-card,frame-master = <&sndcpu>;
sndcodec: simple-audio-card,codec {
sound-dai = <&tda19988>;
};
sndcpu: simple-audio-card,cpu {
sound-dai = <&rcar_sound>;
};
};
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1>, <1800000 0>;
};
wlan_en_reg: fixedregulator {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us = <70000>;
gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
x13_clk: x13 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <74250000>;
};
connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hs_ep: endpoint {
remote-endpoint = <&usb3_hs_ep>;
};
};
port@1 {
reg = <1>;
ss_ep: endpoint {
remote-endpoint = <&hd3ss3220_in_ep>;
};
};
};
};
};
&audio_clk_a {
clock-frequency = <22579200>;
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&x13_clk>;
clock-names = "du.0", "du.1", "dclkin.0";
ports {
port@0 {
endpoint {
remote-endpoint = <&tda19988_in>;
};
};
};
};
&ehci0 {
dr_mode = "host";
status = "okay";
};
&extal_clk {
clock-frequency = <48000000>;
};
&hscif2 {
pinctrl-0 = <&hscif2_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "ti,wl1837-st";
enable-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
};
};
&i2c0 {
status = "okay";
clock-frequency = <100000>;
hd3ss3220@47 {
compatible = "ti,hd3ss3220";
reg = <0x47>;
interrupt-parent = <&gpio6>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hd3ss3220_in_ep: endpoint {
remote-endpoint = <&ss_ep>;
};
};
port@1 {
reg = <1>;
hd3ss3220_out_ep: endpoint {
remote-endpoint = <&usb3_role_switch>;
};
};
};
};
tda19988: tda19988@70 {
compatible = "nxp,tda998x";
reg = <0x70>;
interrupt-parent = <&gpio1>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
video-ports = <0x234501>;
#sound-dai-cells = <0>;
audio-ports = <TDA998x_I2S 0x03>;
clocks = <&rcar_sound 1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tda19988_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
tda19988_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
};
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
rtc@32 {
compatible = "epson,rx8571";
reg = <0x32>;
};
};
&lvds0 {
status = "okay";
clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
clock-names = "fck", "dclkin.0", "extal";
};
&ohci0 {
dr_mode = "host";
status = "okay";
};
&pcie_bus_clk {
clock-frequency = <100000000>;
};
&pciec0 {
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
};
&pfc {
du_pins: du {
groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp",
"du_clk_in_0";
function = "du";
};
hscif2_pins: hscif2 {
groups = "hscif2_data_a", "hscif2_ctrl_a";
function = "hscif2";
};
i2c1_pins: i2c1 {
groups = "i2c1_b";
function = "i2c1";
};
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <3300>;
};
sdhi0_pins_uhs: sd0_uhs {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <1800>;
};
sdhi3_pins: sd3 {
groups = "sdhi3_data4", "sdhi3_ctrl";
function = "sdhi3";
power-source = <1800>;
};
sound_clk_pins: sound_clk {
groups = "audio_clkout1_a";
function = "audio_clk";
};
sound_pins: sound {
groups = "ssi01239_ctrl", "ssi0_data";
function = "ssi";
};
usb30_pins: usb30 {
groups = "usb30", "usb30_id";
function = "usb30";
};
};
&rcar_sound {
pinctrl-0 = <&sound_pins &sound_clk_pins>;
pinctrl-names = "default";
/* Single DAI */
#sound-dai-cells = <0>;
/* audio_clkout0/1/2/3 */
#clock-cells = <1>;
clock-frequency = <11289600>;
status = "okay";
rcar_sound,dai {
dai0 {
playback = <&ssi0 &src0 &dvc0>;
};
};
};
&rwdt {
timeout-sec = <60>;
status = "okay";
};
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-1 = <&sdhi0_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi0>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
bus-width = <4>;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&sdhi3 {
status = "okay";
pinctrl-0 = <&sdhi3_pins>;
pinctrl-names = "default";
vmmc-supply = <&wlan_en_reg>;
bus-width = <4>;
non-removable;
cap-power-off-card;
keep-power-in-suspend;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1837";
reg = <2>;
interrupt-parent = <&gpio1>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
};
};
&usb2_phy0 {
renesas,no-otg-pins;
status = "okay";
};
&usb3_peri0 {
companion = <&xhci0>;
status = "okay";
usb-role-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb3_hs_ep: endpoint {
remote-endpoint = <&hs_ep>;
};
};
port@1 {
reg = <1>;
usb3_role_switch: endpoint {
remote-endpoint = <&hd3ss3220_out_ep>;
};
};
};
};
&xhci0 {
pinctrl-0 = <&usb30_pins>;
pinctrl-names = "default";
status = "okay";
};

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@ -0,0 +1,33 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source extras for U-Boot for the Hihope board
*
* Copyright (C) 2021 Renesas Electronisc Corporation
*/
#include "r8a774c0-ek874.dts"
#include "r8a774c0-u-boot.dtsi"
/ {
aliases {
spi0 = &rpc;
};
};
&rpc {
num-cs = <1>;
status = "okay";
spi-max-frequency = <50000000>;
#address-cells = <1>;
#size-cells = <0>;
flash0: spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "w25m512jv", "spi-flash", "jedec,spi-nor";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
reg = <0>;
};
};

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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Silicon Linux RZ/G2E evaluation kit (EK874)
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
#include "r8a774c0-cat874.dts"
#include "cat875.dtsi"
/ {
model = "Silicon Linux RZ/G2E evaluation kit EK874 (CAT874 + CAT875)";
compatible = "si-linux,cat875", "si-linux,cat874", "renesas,r8a774c0";
};

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@ -0,0 +1,53 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source extras for U-Boot on R8A774C0 SoC
*
* Copyright (C) 2021 Renesas Electronics Corp.
*
*/
#include "r8a779x-u-boot.dtsi"
/ {
soc {
rpc: rpc@ee200000 {
compatible = "renesas,rcar-gen3-rpc", "renesas,rpc-r8a774c0";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
clocks = <&cpg CPG_MOD 917>;
bank-width = <2>;
status = "disabled";
};
};
};
/delete-node/ &can0;
/delete-node/ &can1;
/delete-node/ &canfd;
/delete-node/ &pwm0;
/delete-node/ &pwm1;
/delete-node/ &pwm2;
/delete-node/ &pwm3;
/delete-node/ &pwm4;
/delete-node/ &pwm5;
/delete-node/ &pwm6;
/delete-node/ &vin4;
/delete-node/ &vin5;
/delete-node/ &rcar_sound;
/delete-node/ &audma0;
/delete-node/ &sdhi1;
/delete-node/ &sdhi3;
/delete-node/ &vspb0;
/delete-node/ &vspd0;
/delete-node/ &vspd1;
/delete-node/ &vspi0;
/delete-node/ &fcpvb0;
/delete-node/ &fcpvd0;
/delete-node/ &fcpvd1;
/delete-node/ &fcpvi0;
/delete-node/ &csi40;
/delete-node/ &du;
/delete-node/ &lvds0;
/delete-node/ &lvds1;
/delete-node/ &hdmi_con_out;
/delete-node/ &sound;
/delete-node/ &tda19988;

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@ -113,6 +113,12 @@ config TARGET_HIHOPE_RZG2
help
Support for RZG2 HiHope platform
config TARGET_SILINUX_EK874
bool "Silicon Linux EK874 board"
imply R8A774C0
help
Support for Silicon Linux EK874 platform
config TARGET_SALVATOR_X
bool "Salvator-X board"
imply R8A7795
@ -148,6 +154,7 @@ source "board/renesas/salvator-x/Kconfig"
source "board/renesas/ulcb/Kconfig"
source "board/beacon/beacon-rzg2m/Kconfig"
source "board/hoperun/hihope-rzg2/Kconfig"
source "board/silinux/ek874/Kconfig"
config MULTI_DTB_FIT_UNCOMPRESS_SZ
default 0x80000 if TARGET_HIHOPE_RZG2

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@ -0,0 +1,15 @@
if TARGET_SILINUX_EK874
config SYS_SOC
default "rmobile"
config SYS_BOARD
default "ek874"
config SYS_VENDOR
default "silinux"
config SYS_CONFIG_NAME
default "silinux-ek874"
endif

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@ -0,0 +1,6 @@
SILINUX_EK874 BOARD
M: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
S: Maintained
F: board/silinux/ek874/
F: include/configs/silinux-ek874.h
F: configs/silinux_ek874_defconfig

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@ -0,0 +1,9 @@
#
# board/silinux/ek874/Makefile
#
# Copyright (C) 2021 Renesas Electronics Corporation
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := ek874.o ../../renesas/rcar-common/common.o

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@ -0,0 +1,30 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* board/silinux/ek874/ek874.c
* This file is ek874 board support.
*
* Copyright (C) 2021 Renesas Electronics Corporation
*/
#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
#define RST_BASE 0xE6160000
#define RST_CA53RESCNT (RST_BASE + 0x44)
#define RST_CA53_CODE 0x5A5A000F
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
return 0;
}
void reset_cpu(ulong addr)
{
writel(RST_CA53_CODE, RST_CA53RESCNT);
}

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@ -0,0 +1,83 @@
CONFIG_ARM=y
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3F0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_SILINUX_EK874=y
# CONFIG_BOARD_EARLY_INIT_F is not set
# CONFIG_SPL is not set
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_RENESAS=y
CONFIG_DEFAULT_DEVICE_TREE="r8a774c0-ek874-u-boot"
CONFIG_SMBIOS_PRODUCT_NAME=""
CONFIG_FIT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_BLK=y
CONFIG_CLK=y
CONFIG_CLK_RENESAS=y
CONFIG_DM_GPIO=y
CONFIG_RCAR_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_USE_4K_SECTORS=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_RENESAS_RPC_SPI=y
CONFIG_DM_MMC=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_RENESAS_SDHI=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCIF_CONSOLE=y
CONFIG_TEE=y
CONFIG_OPTEE=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SMBIOS_MANUFACTURER=""

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@ -0,0 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* include/configs/silinux-ek874.h
* This file is Silicon Linux EK874 board configuration.
*
* Copyright (C) 2021 Renesas Electronics Corporation
*/
#ifndef __SILINUX_EK874_H
#define __SILINUX_EK874_H
#include "rcar-gen3-common.h"
/* Ethernet RAVB */
#define CONFIG_BITBANGMII_MULTI
/* Generic Timer Definitions (use in assembler source) */
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
#endif /* __SILINUX_EK874_H */

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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _DT_BINDINGS_TDA998X_H
#define _DT_BINDINGS_TDA998X_H
#define TDA998x_SPDIF 1
#define TDA998x_I2S 2
#endif /*_DT_BINDINGS_TDA998X_H */