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pinctrl: renesas: Add support for R8A774C0

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Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car
E3 (a.k.a. r8a77990), however it doesn't have several automotive
specific peripherals.

This patch hooks R8A774C0 SoC with the pfc driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
This commit is contained in:
Lad Prabhakar 2021-03-15 22:24:04 +00:00 committed by Marek Vasut
parent 4ece226e80
commit 220f308a5c
5 changed files with 24 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/mach-rmobile/Kconfig.64
View File

@ -15,6 +15,7 @@ config R8A774B1
config R8A774C0
bool "Renesas SoC R8A774C0"
imply CLK_R8A774C0
imply PINCTRL_PFC_R8A774C0
config R8A774E1
bool "Renesas SoC R8A774E1"

10
drivers/pinctrl/renesas/Kconfig
View File

@ -77,6 +77,16 @@ config PINCTRL_PFC_R8A774B1
the GPIO definitions and pin control functions for each available
multiplex function.
config PINCTRL_PFC_R8A774C0
bool "Renesas RZ/G2 R8A774C0 pin control driver"
depends on PINCTRL_PFC
help
Support pin multiplexing control on Renesas RZ/G2E R8A774C0 SoCs.
The driver is controlled by a device tree node which contains both
the GPIO definitions and pin control functions for each available
multiplex function.
config PINCTRL_PFC_R8A774E1
bool "Renesas RZ/G2 R8A774E1 pin control driver"
depends on PINCTRL_PFC

1
drivers/pinctrl/renesas/Makefile
View File

@ -1,6 +1,7 @@
obj-$(CONFIG_PINCTRL_PFC) += pfc.o
obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
obj-$(CONFIG_PINCTRL_PFC_R8A774B1) += pfc-r8a77965.o
obj-$(CONFIG_PINCTRL_PFC_R8A774C0) += pfc-r8a77990.o
obj-$(CONFIG_PINCTRL_PFC_R8A774E1) += pfc-r8a7795.o
obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o

11
drivers/pinctrl/renesas/pfc.c
View File

@ -34,6 +34,7 @@ enum sh_pfc_model {
SH_PFC_R8A7796,
SH_PFC_R8A774A1,
SH_PFC_R8A774B1,
SH_PFC_R8A774C0,
SH_PFC_R8A774E1,
SH_PFC_R8A77965,
SH_PFC_R8A77970,
@ -927,6 +928,10 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev)
if (model == SH_PFC_R8A774B1)
priv->pfc.info = &r8a774b1_pinmux_info;
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A774C0
if (model == SH_PFC_R8A774C0)
priv->pfc.info = &r8a774c0_pinmux_info;
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A774E1
if (model == SH_PFC_R8A774E1)
priv->pfc.info = &r8a774e1_pinmux_info;
@ -1014,6 +1019,12 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = {
.data = SH_PFC_R8A774B1,
},
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A774C0
{
.compatible = "renesas,pfc-r8a774c0",
.data = SH_PFC_R8A774C0,
},
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A774E1
{
.compatible = "renesas,pfc-r8a774e1",

1
drivers/pinctrl/renesas/sh_pfc.h
View File

@ -295,6 +295,7 @@ sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
extern const struct sh_pfc_soc_info r8a774b1_pinmux_info;
extern const struct sh_pfc_soc_info r8a774c0_pinmux_info;
extern const struct sh_pfc_soc_info r8a774e1_pinmux_info;
extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
extern const struct sh_pfc_soc_info r8a7791_pinmux_info;