u-boot-brain/arch/arm/dts/r8a774c0-cat874.dts
Lad Prabhakar 07148c1899 arm: rmobile: Add Silicon Linux EK874 board support
The EK874 development kit from Silicon Linux is made of CAT874 (the main
board) and CAT875 (the sub board that goes on top of CAT874).

This patch adds the required board support to boot Si-Linux EK874 board
based on R8A774C0 SoC.

DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi
have been imported from Linux kernel 5.11 commit f40ddce88593
("Linux 5.11").

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00

454 lines
7.6 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
/dts-v1/;
#include "r8a774c0.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/display/tda998x.h>
/ {
model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
compatible = "si-linux,cat874", "renesas,r8a774c0";
aliases {
serial0 = &scif2;
serial1 = &hscif2;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial0:115200n8";
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_out: endpoint {
remote-endpoint = <&tda19988_out>;
};
};
};
leds {
compatible = "gpio-leds";
led0 {
gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
label = "LED0";
};
led1 {
gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
label = "LED1";
};
led2 {
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
label = "LED2";
};
led3 {
gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;
label = "LED3";
};
};
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
reg_12p0v: regulator-12p0v {
compatible = "regulator-fixed";
regulator-name = "D12.0V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-boot-on;
regulator-always-on;
};
sound: sound {
compatible = "simple-audio-card";
simple-audio-card,name = "CAT874 HDMI sound";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sndcpu>;
simple-audio-card,frame-master = <&sndcpu>;
sndcodec: simple-audio-card,codec {
sound-dai = <&tda19988>;
};
sndcpu: simple-audio-card,cpu {
sound-dai = <&rcar_sound>;
};
};
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1>, <1800000 0>;
};
wlan_en_reg: fixedregulator {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us = <70000>;
gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
x13_clk: x13 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <74250000>;
};
connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hs_ep: endpoint {
remote-endpoint = <&usb3_hs_ep>;
};
};
port@1 {
reg = <1>;
ss_ep: endpoint {
remote-endpoint = <&hd3ss3220_in_ep>;
};
};
};
};
};
&audio_clk_a {
clock-frequency = <22579200>;
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&x13_clk>;
clock-names = "du.0", "du.1", "dclkin.0";
ports {
port@0 {
endpoint {
remote-endpoint = <&tda19988_in>;
};
};
};
};
&ehci0 {
dr_mode = "host";
status = "okay";
};
&extal_clk {
clock-frequency = <48000000>;
};
&hscif2 {
pinctrl-0 = <&hscif2_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "ti,wl1837-st";
enable-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
};
};
&i2c0 {
status = "okay";
clock-frequency = <100000>;
hd3ss3220@47 {
compatible = "ti,hd3ss3220";
reg = <0x47>;
interrupt-parent = <&gpio6>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hd3ss3220_in_ep: endpoint {
remote-endpoint = <&ss_ep>;
};
};
port@1 {
reg = <1>;
hd3ss3220_out_ep: endpoint {
remote-endpoint = <&usb3_role_switch>;
};
};
};
};
tda19988: tda19988@70 {
compatible = "nxp,tda998x";
reg = <0x70>;
interrupt-parent = <&gpio1>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
video-ports = <0x234501>;
#sound-dai-cells = <0>;
audio-ports = <TDA998x_I2S 0x03>;
clocks = <&rcar_sound 1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tda19988_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
tda19988_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
};
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
rtc@32 {
compatible = "epson,rx8571";
reg = <0x32>;
};
};
&lvds0 {
status = "okay";
clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
clock-names = "fck", "dclkin.0", "extal";
};
&ohci0 {
dr_mode = "host";
status = "okay";
};
&pcie_bus_clk {
clock-frequency = <100000000>;
};
&pciec0 {
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
};
&pfc {
du_pins: du {
groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp",
"du_clk_in_0";
function = "du";
};
hscif2_pins: hscif2 {
groups = "hscif2_data_a", "hscif2_ctrl_a";
function = "hscif2";
};
i2c1_pins: i2c1 {
groups = "i2c1_b";
function = "i2c1";
};
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <3300>;
};
sdhi0_pins_uhs: sd0_uhs {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <1800>;
};
sdhi3_pins: sd3 {
groups = "sdhi3_data4", "sdhi3_ctrl";
function = "sdhi3";
power-source = <1800>;
};
sound_clk_pins: sound_clk {
groups = "audio_clkout1_a";
function = "audio_clk";
};
sound_pins: sound {
groups = "ssi01239_ctrl", "ssi0_data";
function = "ssi";
};
usb30_pins: usb30 {
groups = "usb30", "usb30_id";
function = "usb30";
};
};
&rcar_sound {
pinctrl-0 = <&sound_pins &sound_clk_pins>;
pinctrl-names = "default";
/* Single DAI */
#sound-dai-cells = <0>;
/* audio_clkout0/1/2/3 */
#clock-cells = <1>;
clock-frequency = <11289600>;
status = "okay";
rcar_sound,dai {
dai0 {
playback = <&ssi0 &src0 &dvc0>;
};
};
};
&rwdt {
timeout-sec = <60>;
status = "okay";
};
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-1 = <&sdhi0_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi0>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
bus-width = <4>;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&sdhi3 {
status = "okay";
pinctrl-0 = <&sdhi3_pins>;
pinctrl-names = "default";
vmmc-supply = <&wlan_en_reg>;
bus-width = <4>;
non-removable;
cap-power-off-card;
keep-power-in-suspend;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1837";
reg = <2>;
interrupt-parent = <&gpio1>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
};
};
&usb2_phy0 {
renesas,no-otg-pins;
status = "okay";
};
&usb3_peri0 {
companion = <&xhci0>;
status = "okay";
usb-role-switch;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb3_hs_ep: endpoint {
remote-endpoint = <&hs_ep>;
};
};
port@1 {
reg = <1>;
usb3_role_switch: endpoint {
remote-endpoint = <&hd3ss3220_out_ep>;
};
};
};
};
&xhci0 {
pinctrl-0 = <&usb30_pins>;
pinctrl-names = "default";
status = "okay";
};