Add documentation for a new clock 'phy_parent'. This clock is optional
and is used to re-parent the PHY related clocks (phy_ref, tx_esc and
rx_esc) to a valid parent. This clock is needed, in order to make the
re-parenting in driver, since the default re-parenting in dts node
(using assigned-clock-parents) may break the LVDS block, which has it's
PHY shared with MIPI-DSI.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit 7ed3b8738e)
QORIQ LS1028A soc used fsl,vf610-edma, but it has a little bit different
from others, so add new compatible to distinguish them.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Link: https://lore.kernel.org/r/20191212033714.4090-3-peng.ma@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
(cherry picked from commit f8dd1f395d)
Add "mem" clock that is required for imx8dxl platform.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add information for i.MX8MP DDRC which reports the single bit errors
that are corrected and the double bit errors that are detected.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Add two parameters which are used to tune USB signal for imx picophy,
picophy is used at imx7d and imx8mm.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
commit a6c4f77cb3b11f81077b53c4a38f21b92d41f21e upstream.
This patch set the correct value for oversampling maxItems. In the
original example, appears 3 items for oversampling while the maxItems
is set to 1, this patch fixes those issues.
Fixes: 416f882c3b ("dt-bindings: iio: adc: Migrate AD7606 documentation to yaml")
Signed-off-by: Beniamin Bia <beniamin.bia@analog.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add devicetree bindings for i.MX8mp LDB controller.
The controller supports two four data lane LVDS channels and supports
single/dual channel mode. The controller connects with LCDIFv3 on
i.MX8mp SoC.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Add devicetree bindings for Freescale i.MX8mp LVDS PHY.
The IP block contains two PHYs, each of which supports
a four data lane LVDS channel.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Add one hsio phandle and compatible ID required by iMX8MP PCIe.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <Fugang.duan@nxp.com>
Add "clock" property (and corresponding "clock-names")
for the CAAM SNVS node.
This property is optional: there are cases when SNVS clock is kept
always on (chips such as i.MX6 SX, UL).
A good guide line is to check whether i.MX clk driver defines the clock.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
[ Upstream commit 0c0ef9ea6f3f0d5979dc7b094b0a184c1a94716b ]
Commit 0ed266d7ae ("clk: ti: omap3: cleanup unnecessary clock aliases")
removed old omap3 clock framework aliases but caused omap3-rom-rng to
stop working with clock not found error.
Based on discussions on the mailing list it was requested by Tero Kristo
that it would be best to fix this issue by probing omap3-rom-rng using
device tree to provide a proper clk property. The other option would be
to add back the missing clock alias, but that does not help moving things
forward with removing old legacy platform_data.
Let's also add a proper device tree binding and keep it together with
the fix.
Cc: devicetree@vger.kernel.org
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Adam Ford <aford173@gmail.com>
Cc: Pali Rohár <pali.rohar@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Fixes: 0ed266d7ae ("clk: ti: omap3: cleanup unnecessary clock aliases")
Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>
commit dbce0b65046d1735d7054c54ec2387dba84ba258 upstream.
DT property definitions must be under a 'properties' keyword. This was
missing for 'snps,tso' in an if/then clause. A meta-schema fix will
catch future errors like this.
Fixes: 7db3545aef ("dt-bindings: net: stmmac: Convert the binding to a schemas")
Cc: "David S. Miller" <davem@davemloft.net>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 392a9f63058f2cdcec8363b849a25532ee40da9f upstream.
The reset controller has a #reset-cells value of 1, so we should see a
phandle plus a register identifier, fix the example.
Fixes: 0807caf647 ("dt-bindings: reset: Add document for Broadcom STB reset controller")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Adds compatible string for "nxp,cbtl04gp", which is also super speed
mux switch for type-c orientation, controlled by one GPIO.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
imx8mp SoC has the similar USB3 PHY with different version than
imx8mq, add compatible string "fsl,imx8mp-usb-phy", which has
the same properties.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
iMX8MP USB3 integrate Synopsys DesignWare Cores SuperSpeed
USB 3.0 Controller 3.30b IP, the glue layer is added to support
wakeup from low power mode.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
[ Upstream commit 93512dad334deb444619505f1fbb761156f7471b ]
Schema errors can cause make to exit before useful information is
printed. This leaves developers wondering what's wrong. It can be
overcome passing '-k' to make, but that's not an obvious solution.
There's 2 scenarios where this happens.
When using DT_SCHEMA_FILES to validate with a single schema, any error
in the schema results in processed-schema.yaml being empty causing a
make error. The result is the specific errors in the schema are never
shown because processed-schema.yaml is the first target built. Simply
making processed-schema.yaml last in extra-y ensures the full schema
validation with detailed error messages happen first.
The 2nd problem is while schema errors are ignored for
processed-schema.yaml, full validation of the schema still runs in
parallel and any schema validation errors will still stop the build when
running validation of dts files. The fix is to not add the schema
examples to extra-y in this case. This means 'dtbs_check' is no longer a
superset of 'dt_binding_check'. Update the documentation to make this
clear.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Jeffrey Hugo <jhugo@codeaurora.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Some registers on pfuze3000 will lost after exit from LPSR, need restore them,
otherwise system may reboot with below command after system enter LPSR one time:
root@imx7d_all:~# echo enabled > /sys/class/tty/ttymxc0/power/wakeup
root@imx7d_all:~# echo mem > /sys/power/state
because LDOGCTL not recover as 1. Add 'fsl,lpsr-mode' property to this case,
please add this property if your board support LPSR mode as imx7d-12x12-lpddr3-arm2
board.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit 4aa2a2a928)
Some Layerscape paltforms (such as LS1088A, LS2088A, etc) require update HW
default cache type configuration to fix DWC3 init failure when applying
property dma-coherent.
Note that the cache type configuration is actually native feature of DWC3,
not additional desgin coming from SoC, so add this support here.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
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Merge linux-5.4.y tag 'v5.4.3' into lf-5.4.y
This is the 5.4.3 stable release
Conflicts:
drivers/cpufreq/imx-cpufreq-dt.c
drivers/spi/spi-fsl-qspi.c
The conflict is very minor, fixed it when do the merge. The imx-cpufreq-dt.c
is just one line code-style change, using upstream one, no any function change.
The spi-fsl-qspi.c has minor conflicts when merge upstream fixes: c69b17da53
spi: spi-fsl-qspi: Clear TDH bits in FLSHCR register
After merge, basic boot sanity test and basic qspi test been done on i.mx
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata A-008646
on LS1021A
Reviewed-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
* wifi/next: (51 commits)
MLK-22949 brcmfmac: add chip id check for clm_blob firmware load
MLK-22948 brcmfmac: avoid to send mailbox interrupt twice for core version 0xb
MLK-22946 brcmfmac: freeing wiphy after brcmf attach failed
dt-bindings: add new property to enable board_type
brcmfmac: let board_type is optional
...
* thermal/next: (12 commits)
MLK-23010 thermal: imx_sc_thermal: Correct message format to avoid stack corruption
thermal: imx_sc_thermal: Add system-wide device cooling to all thermal zones
thermal: qoriq: add thermal monitor unit version 2 support
thermal: imx: Add device cooling support
thermal: imx8mm: Add device cooling support
...
* rpmsg/next: (8 commits)
LF-44 rpmsg: imx: add the rpmsg tty demo
rpmsg: imx: enable the tx_block mechanism in the flow
rpmsg: imx_rpmsg: add partition reset notify
rpmsg: imx: bug fix and clean up the codes
rpmsg: imx: extend the rpmsg support for imx8qm and so on
...
* reset/next: (12 commits)
reset: Kconfig: use 'ARCH_MXC' for reset dispmix
reset: imx8m: Correct clock name for dispmix driver
reset: gpio-reset: add pinctrl comsuer header file
reset: imx7: add the clkreq reset for imx8m
dt-bindings: reset: imx7: add clkreq reset used by the l1ss on imx8m
...
* pcie/next: (40 commits)
LF-128 PCI: imx: turn off the clocks and regulators when link is down
PCI: imx: add the imx pcie ep verification solution
misc: pci_endpoint_test: Add the layerscape PCIe GEN4 EP device support
PCI: mobiveil: Add workaround for unsupported request error
PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
...
Use commonly used phy-handle property and mdio subnode to handle
phy properties.
Deprecate bindings fsl,gemac-phy-id & fsl,pfe-phy-if-flags.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Currently, of_get_mac_address supports NVMEM, some platforms
MAC address that read from NVMEM efuse requires to swap bytes
order, so add new property "nvmem_macaddr_swap" to specify the
behavior. If the MAC address is valid from NVMEM, add new property
"nvmem-mac-address" in ethernet node.
Update these two properties in the binding documentation.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
[ Aisheng: update to yaml format ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
* mailbox/next: (6 commits)
mailbox: imx: add support for imx v1 mu
dt-bindings: mailbox: imx-mu: add imx7ulp MU support
mailbox: imx: Clear the right interrupts at shutdown
mailbox: imx: Fix Tx doorbell shutdown path
mailbox: imx: change to arch_init()
...
* gpio/next: (12 commits)
gpio : mpc8xxx : ls1088a/ls1028a edge detection mode bug fixs.
gpio: mpc8xxx: Don't overwrite default irq_set_type callback
gpio/mpc8xxx: change irq handler from chained to normal
MLK-22733 gpio: mxc: use platform_get_irq_optional() to avoid error message
gpio: pca953x: no need to do regcache sync without vcc regulator
...
* dts/next: (765 commits)
arm64: dts: fsl: ls1028a: Disable eno3 and make swp5 the Felix CPU port
arm64: dts: fsl: ls1028a: Specify that the Felix port 4 runs at 2.5Gbps
arm64: dts: fsl: Drop "compatible" string from Felix switch
arm64: dts: fsl: Specify phy-mode for CPU ports
LF-261: arm64: dts: imx8mq: Set parent clock for IMX8MQ_CLK_AUDIO_AHB
...
* audio/next: (528 commits)
LF-276: ASoC: fsl_easi: constrain period size for edma case
LF-215: ASoC: fsl_rpmsg_i2s: Enable WQ_FREEZABLE for workqueue
ASoC: SOF: Read tplg filename from board descriptor
ASoC: SOF: Update fw_filename from board description
ASoC: SOF: Allow probe to continue when we have an actual codec
...
* origin/spi/qspi:
spi: spi-fsl-qspi: Introduce variable to fix different invalid master Id
dt-bindings: spi: spi-fsl-qspi: Add bindings of ls1088a and ls1012a
spi: spi-fsl-qspi: dynamically alloc AHB memory for QSPI
* origin/pcie/mobiveil: (14 commits)
misc: pci_endpoint_test: Add the layerscape PCIe GEN4 EP device support
PCI: mobiveil: Add workaround for unsupported request error
PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
dt-bindings: Add DT binding for PCIE GEN4 EP of the layerscape
PCI: mobiveil: Add the EP driver support
...
* origin/pcie/dwc: (22 commits)
LF-128 PCI: imx: turn off the clocks and regulators when link is down
PCI: imx: add the imx pcie ep verification solution
MLK-22995: pci: controller: dwc: pci-imx6: fix regulator warning complains on i.mx6sx-sdb
PCI: dwc: fix the msi failure after pm operations
Revert "MLK-11484-3 PCI: designware: Refine setup_rc and add msi data restore"
...
* origin/dts/qoriq: (105 commits)
arm64: dts: fsl: ls1028a: Disable eno3 and make swp5 the Felix CPU port
arm64: dts: fsl: ls1028a: Specify that the Felix port 4 runs at 2.5Gbps
arm64: dts: fsl: Drop "compatible" string from Felix switch
arm64: dts: fsl: Specify phy-mode for CPU ports
arm64: dts: ls1028a: Add DP DT nodes
...
* origin/display/nwl-dsi: (14 commits)
drm/bridge: nwl-dsi Correct the DSI init sequence
drm/bridge: nwl-dsi: Fix find_panel_or_bridge
drm/bridge: nwl-dsi: Add support for 8QM and 8QXP
drm/bridge: nwl-dsi: Add support for component framework
phy: imx8-mipi-dphy: Add support for 8QM and 8QXP
...
* origin/display/mxsfb: (14 commits)
drm/mxsfb: Add support for live pixel format change
drm/mxsfb: Add support for horizontal stride
drm/mxsfb: Clear OUTSTANDING_REQS bits
drm/mxsfb: Improve the axi clock usage
drm/mxsfb: Update mxsfb to support LCD reset
...
* origin/capture/pi:
LF-101: staging: media: imx: fix XR24 format R and B are opposite issue
staging: media: imx: add video ops for imx8 parallel subdev
staging: media: imx: add parallel capture interface driver for imx8qxp
media: dt-bindings: add bindings for i.MX8QXP parallel interface
imx busfreq: Add API header file
* origin/capture/media-dev:
media: staging: imx: add media device driver support for IMX8
media: dt-bindings: add bindings for i.MX8QXP/QM virtual media device
* origin/capture/jpeg: (9 commits)
MLK-22835: mxc-jpeg: jpeg decoder stuck due to race condition
mxc-jpeg: Fix warning at build, for EXPORT_SYMBOL on static variable
media: mxc-jpeg: jpeg: Replace stracpy with strscpy
mxc-jpeg: Build mxc-jpeg as module, by default
mxc-jpeg: Add support for multi power domain
...
* origin/audio/fm: (8 commits)
MLK-11429-21: ASoC: fsl: port si476x machine driver from imx_3.10.y
MLK-11305 radio-si476x: support set V4L2_CID_AUDIO_MUTE CTRL
MLK-22355: mfd: si476x: Use system_freezable_wq instead of system_wq
MLK-10055-2: mfd: si476x-i2c: sound is registered when no FM module attached
MLK-10038-1: mfd: si476x-i2c: Add support of si476x-rev4.0 board
...
commit 7165ef890a4c44cf16db66b82fd78448f4bde6ba upstream.
The introduction of 768ec4c012 ("ath10k: update HOST capability QMI
message") served the purpose of supporting the new and extended HOST
capability QMI message.
But while the new message adds a slew of optional members it changes the
data type of the "daemon_support" member, which means that older
versions of the firmware will fail to decode the incoming request
message.
There is no way to detect this breakage from Linux and there's no way to
recover from sending the wrong message (i.e. we can't just try one
format and then fallback to the other), so a quirk is introduced in
DeviceTree to indicate to the driver that the firmware requires the 8bit
version of this message.
Cc: stable@vger.kernel.org
Fixes: 768ec4c012 ("ath10k: update HOST capability qmi message")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add new pmic pca9450 driver for i.mx8mn-evk board.
Signed-off-by: John Lee <john.lee@nxp.com>
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
(cherry picked from commit 2189979539)
Some Layerscape paltforms (such as LS1088A, LS2088A, etc) require update HW
default cache type configuration to fix DWC3 init failure when applying
property dma-coherent.
Note that the cache type configuration is actually native feature of DWC3,
not additional desgin coming from SoC, so add this support here.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
This is a rework of the following i.MX BSP commit
(rel_imx_4.19.35_1.1.0_rc2):
9b63038a58cc ("MLK-21453: crypto: caam - fix Mentor's port, merge conflict resolutions")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
LS1028A has a clock domain PXLCLK0 used for provide pixel clocks to Display
output interface. Add a YAML schema for this.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
