Removed stdio structure ops support on arm_dcc
driver, and need to register with serial core
so-that it can access like remianing serial drivers.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fix the license header introduced by the following patches
Add TWR-P10xx board support
Add T4240EMU target
IDT8T49N222A configuration code
Add C29x SoC support
Add support for C29XPCIE board
Signed-off-by: York Sun <yorksun@freescale.com>
Without this change EDID_DETAILED_TIMING_VSYNC_OFFSET
and EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH macros can
not be used (compile error).
The fix is quite trivial: rename struct member to the
expected name.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This font is based on Linux drivers/video/console/font_mini_4x6.c as of commit:
commit bcfbeecea11c15e243f076d37d637c2598aff4fe
Author: Bjarni Ingi Gislason <bjarniig@rhi.hi.is>
Date: Sun Aug 12 15:05:10 2012 +0000
drivers: console: font_: Change a glyph from "broken bar" to "vertical line"
I removed these lines as they are useless in U-Boot:
#include <linux/font.h>
#define FONTDATAMAX 1536
Whole "const struct font_desc font_mini_4x6" block
This patch also adds a new configuration option to select this smaller font,
CONFIG_VIDEO_FONT_4X6 , but this is disabled by default. The default setting
is the regular "large" font.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
This patch moves all the font configuration values into video_font_data.h
so they are all in the right place with the font. The video_font.h now only
includes video_font_data.h and will allow us to select and include different
font once more fonts are added.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
[agust: fixed build warning for mcc200]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This patch changes some features of the a3m071/a4m2k board support:
- Add bootcounter support
- Update MTD env default to correct values
- Add mtdparts to bootargs for mtd partitioning via kernel cmdline
- Added some default env variables for easy updating (kernel, dtb)
- Change README to the updated flash locations
Signed-off-by: Stefan Roese <sr@denx.de>
- Add support for zc7100 device.
- FPGA programming on few of the SOC(zc7100) takes more
than 1sec, hence increased the program time by 4sec to
sync' all soc's.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
C29XPCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module. It
includes C293PCIE board, C293PCIE board and C291PCIE board.
- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
- 512MB soldered DDR3 32bit memory
- CPLD System Logic
- 64MB x16 NOR flash and 4GB x8 NAND flash
- 16MB SPI flash
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Singed-off-by: Po Liu <Po.Liu@freescale.com>
[yorksun: Fixup include/configs/C29XPCIE.h]
Signed-off-by: York Sun <yorksun@freescale.com>
T4240 PCIe IP is version 3.0 and has some update comparing previous
QorIQ products.
1. Move Freescale specific register define
to
arch/powerpc/include/asm/fsl_pci.h
and update the register offset define for T4240.
2. add the status/control register define
use status/control register to judge the link status
3. The original code uses 'Programming Interface' field to judge if PCIE is
EP or RC mode, however, T4240 does not support this functionality.
According to PCIE specification, 'Header Type' offset 0x0e is used to
indicate header type, so for PCIE controller, the patch changes code to
use 'Header Type' field to identify if the PCIE is RC or EP mode.
This patch fixes the PCIe card link up issue on T4240QDS.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
1. Add CONFIG_SYS_DPAA_RMAN macro to t4240 and b4860.
2. Decrease RMan liodn offset number.
SET_RMAN_LIODN() is used to set liodn offset of RMan blocks 0-3.
For t4240 and b4860, RMan liodn base is assigned to 922, the original
offset number is too large that the liodn (base+offset 922+678 = 1600)
is greater than 0x500 the maximum liodn number.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
1) Add support in B4860 board files for using IDT driver where
IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer
that generate different refclks for SerDes modules, used this driver
for reconfiguring SerDes1 Refclks(based on SerDes1 protocols)
for CPRI to work. CPRI works on 122.88MHz and default refclks coming
on board are not suitable for it
2) Move SerDes1 refclk1 source selection from eth_b4860qds.c file
to b4860qds board file, as SerDes1 Refclk1 would come from
PHY MUX in case of certain protocols, that have been checked here.
This change would make on board SGMIIs to work
3) Add I2C addresses for IDT8T49N222A devices in board/include file
4) Add define for PCA-I2C bus multiplexer, on which IDT devices exist
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
BSC9132QDS is a Freescale Reference Design Board for BSC9132 SoC which is a
integrated device that contains two powerpc e500v2 cores and two DSP
starcores.
To support DSP starcore
-Creating LAW and TLB for DSP-CCSR space.
-Creating LAW for DSP-core subsystem M2 and M3 memory
-Creating LAW for 1GB DDR which is connected exclusively to DSP-cores
Signed-off-by: Manish Jaggi <manish.jaggi@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Add new board p1020RDB-PD. P1020RDB-PD board was update from P1020RDB.
DDR changed from DDR2 1G to DDR3 2G.
NAND: 128 MiB
Flash: 64 MiB
Also change P1020RDB to P1020RDB-PC to distinguish from P1020RDB board.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
JEDEC spec requires the clocks to be stable before deasserting reset
signal for RDIMMs. Clocks start when any chip select is enabled and
clock control register is set. This patch also adds the interface to
toggle memory reset signal if needed by the boards.
Signed-off-by: York Sun <yorksun@freescale.com>
Add emulator support for T4240. Emulator has limited peripherals and
interfaces. Difference between emulator and T4240QDS includes:
ECC for DDR is disabled due the procedure to load images
No board FPGA (QIXIS)
NOR flash has 32-bit port for higher loading speed
IFC and I2C timing don't really matter, so set them fast
No ethernet
Signed-off-by: York Sun <yorksun@freescale.com>
Move CONFIG_FSL_CORENET define to config_mpc85xx.h. It is not board
specific feature and belongs to SoC header.
Signed-off-by: York Sun <yorksun@freescale.com>
TWR-P1025 Specification:
-----------------------
Memory subsystem:
512MB DDR3 (on board DDR)
64Mbyte 16bit NOR flash
One microSD Card slot
Ethernet:
eTSEC1: Connected to Atheros AR8035 GETH PHY
eTSEC3: Connected to Atheros AR8035 GETH PHY
UART:
Two UARTs are routed to the FDTI dual USB to RS232 convertor
USB: Two USB2.0 Type A ports
I2C:
AT24C01B 1K Board EEPROM (8 bit address)
QUICC Engine:
Connected to DP83849i PHY supply two 10/100M ethernet ports
QE UART for RS485 or RS232
PCIE:
One mini-PCIE slot
Signed-off-by: Michael Johnston <michael.johnston@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
[yorksun: Fixup include/configs/p1_twr.h]
Signed-off-by: York Sun <yorksun@freescale.com>
In case only the CONFIG_SYS_I2C_SPEED is set in configuration file,
the CONFIG_SYS_I2C_SOFT_SPEED is defined as CONFIG_SYS_I2C_SPEED.
The CONFIG_SYS_I2C_SOFT_SPEED is then used throughout the driver.
Unfortunatelly, due to a typo in the driver, instead of defining
CONFIG_SYS_I2C_SOFT_SPEED, an CONFIG_SYS_SOFT_I2C_SPEED was defined
and therefore the driver failed to compile. The same applies for
CONFIG_SYS_I2C_SOFT_SLAVE , where the swap happens as well.
This patch fixes the issue.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Now that nothing uses CONFIG_ARCH_DEVICE_TREE, stop defining it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Aside from microblaze, all other SoCs/boards/vendors store their DT files
in board/$vendor/dts/$soc-$board.dts. Move microblaze-generic.dts to this
location for consistency.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <monstr@monstr.eu>
Some boards, such as the BeagleBone Black, have an eMMC chip intstead
of NAND. We can use the eMMC boot partition to store the environment,
since it isn't used for anything else. This allows us to have a
configurable environment on those boards.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
The BeagleBone Black can boot from either the MMC card
or eMMC chip on board. We should try both interfaces.
This modification also allows a graceful fallback if
a device exists but boot images are not present on it.
Changes for v2:
* Fix boot partition - it should always show up as mmcblk0p2
* Fix missing FDT load
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Many modern U-Boot ports enable command line editing and
a history buffer. The am335x_evm configuration is fairly
comprehensive as it is, so a few extra kb should not be
noticable, and it adds a very convenient feature.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Give the user the ability to disable NAND support by defining
CONFIG_NO_NAND. This will allow custom hardware to easily support
this configuration.
Signed-off-by: Justin Waters <justin.waters@timesys.com>
[trini: Make apply on top of other series]
Signed-off-by: Tom Rini <trini@ti.com>
NOR requires that s_init be within the first 4KiB of the image so that
we can perform the rest of the required pinmuxing to talk with the rest
of NOR that we are found on. When NOR_BOOT is set we save our
environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid
using SPL for this case and u-boot.bin is written directly to the start
of NOR.
We enclose the DMM-related parts of arch/arm/cpu/armv7/am33xx/emif4.c
with TI81xx checks as at this time U-Boot does not discard unused
sections in the main build and this code relies on functions specific to
(and only provided in) ti81xx-related code.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
This patch adds support for the NOR module that attaches
to the memory cape for a Beaglebone board. This does not
add booting support; only support so that you can boot from
SD/MMC and see the NOR module so that it can be programmed.
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Clean up config changes slightly]
Signed-off-by: Tom Rini <trini@ti.com>
- Style cleanup (# define -> #define)
- Due to ROM issues, redudant loading isn't feasible, so drop.
- Given extra space, increase max size of U-Boot to 512KiB
- Correct env size to match usage (we had not re-defined ENV_SIZE).
- Given extra space, keep env size as 128KiB, add redundant environment.
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
We always set a CONFIG_ENV_IS_...somewhere... so drop the initial define
of NOWHERE.
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
This commit adds some prototypes into include/mtd/cfi_flash.h.
These functions are defined with a weak attribute in
drivers/mtd/cfi_flash.c.
This means they can be overrided by board-specific ones
if necessary.
When defining such functions under board/ directory or
somewhere, cfi_flash.h should be included.
This makes sure that board-specfic cfi functions
are defined in a correct prototype.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch extends dfu code to support transmission with -R switch
specified at dfu-util.
When -R is specified, the extra USB_REQ_DFU_DETACH request is sent after
successful data transmission. Then dfu resources are released and reset
command is issued.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
The requests sent to the controller are not properly cache aligned
most of the time, thus implement a simple bounce buffer to avoid
problem with cache.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Allocate the qTD items all at once instead of allocating them
separately. Moreover, make sure each qTD is properly aligned
to 32-bytes boundary and that cache can be safely flushed over
each qTD touple.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Both the endpoint queue head and the endpoint item list is a controller
specific thing. Move them both into controller private data.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
The usb_lowlevel_init() call already fills and passes back struct
ehci_ctrl , which readily contains correctly determined address of
the port register block address computed from values from controller
configuration registers. Leverage this and make use of this value
as this makes the code mode universal, but also gets us rid of the
CONFIG_USB_REG_BASE configuration option.
Moreover, this patch cleans up the usb_gadget_register_driver() call
a little by correcting the error handling. Note the usb_lowlevel_init()
and mvudc_probe() are now called in reversed order, but this has no
impact on the code.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Move the constant values that are programmed into mv_ep.ep into
separate static const structure so they can be memcpy()'d when
the initialization happens.
Moveover, we only every init NUM_ENDPOINTS, not 2 * NUM_ENDPOINTS,
so fix this bug as well.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
The endpoints are operated on a per-controller basis, move the
endpoint array into controller's private data. Also shuffle the
struct mv_ep structure definition just above the definition of
the struct mv_drv so they're well grouped together.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Do a coding-style cleanup of this file and throw away useless
defined values. These values were likely a result of a copy-paste
job.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Instead of duplicating HDMI setup code for every mx6 board, factor out the common code
Signed-off-by: Pardeep Kumar Singla <b45784@freescale.com>
Acked-By: Eric Nelson <eric.nelson@boundarydevices.com>
If no other bootoption works, try loading up device tree and zImage.
This is selected as the last option to allow backward compatibility as
well as support the recent trend in moving kernel boot to using zImage
and device tree.
NOTE: if uImage is present in bootpart, it will try this first and
will assume this is to be booted with bootm (so may be concatenated
image or plain vanilla ATAG MACHINE_ID based image)
Signed-off-by: Nishanth Menon <nm@ti.com>
For folks not using concatenated device tree with uImage, having
an handy function to find and load device tree is very handy.
So introduce findfdt and loadfdt and run findfdt by default to make
it easier on user scripts.
Signed-off-by: Nishanth Menon <nm@ti.com>
CMD_FS_GENERIC allows us to simplify where we load up our image from
either from ext2/fat etc. So, lets use that instead of cumbersome
options we currently use. Sticking with existing conventions,
defaults will be:
ramdisk=ramdisk.gz
bootpart=0:2 (second partition)
bootdir=/boot (/boot in second partition)
This matches with the default behavior, these can be overriden by
env files as needed.
Signed-off-by: Nishanth Menon <nm@ti.com>
e682930867
(BeagleBoard: config: use uImage.beagle for tftp)
Introduced uImage.beagle which does not happen to be default output
file of Linux kernel build make uImage (output is uImage).
So, replace uImage.beagle with uImage
Signed-off-by: Nishanth Menon <nm@ti.com>
We do not use JFFS2 by default and it conflicts with
CONFIG_CMD_FS_GENERIC (ls command is the same). Since most of our
BOOTCMD can be simplified by using the FS_GENERIC, dropping JFFS2
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Joel Fernandes <joelf@ti.com>
BD ram address may vary in various SOC, so removing the hardcoding and
passing the same information through platform data
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
We use CONFIG_CMD_SPL_WRITE_SIZE when reading/writing the args portion
of falcon mode to NAND. Previously it was half the size of the
eraseblock which is too small, increase to eraseblock size.
Signed-off-by: Tom Rini <trini@ti.com>
The previous location used for the "args" portion of falcon mode was too
small to allow for a device tree to be saved there, so move the location
slightly and increase the size. In addition, our previous kernel
location was part of the area we set aside for U-Boot itself, so move it
up a bit higher.
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Now that we have falcon mode enabled, the partiton numbers for NAND have
changed, and we need to list entries for updating these parts of the
system. While adding falcon mode entires for eMMC (raw), we round up
the limit on U-Boot for ease of math later.
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
mx6qsabrelite and nitrogen6q boards are hardware compatible, so let's avoid the
code duplication and only use the nitrogen6x source code to make board code
maintainance easier.
Tested booting a mainline device tree kernel on a mx6qsabrelite board.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
CONFIG_SYS_FLASH_PROTECTION was active on most gdsys boards by default,
while hardware flash protection was not implemented.
Hardware support was added recently and we get into trouble because backward
compatibility is broken (u-boot can't unprotect the protected flash after a
downgrade). So we decided to disable hardware flash protection for all our boards.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
A set of accessor functions was added to be able to access not only
memory mapped FPGA in a generic way.
Thanks to Wolfgang Denk for getting this sorted properly.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Conflict over SPDX changes means that one change was effectively dropped
as it was fixing typos in a removed hunk of text.
Conflicts:
arch/mips/cpu/mips64/start.S
Signed-off-by: Tom Rini <trini@ti.com>
Restrict autoboot interruption to "s" or "d" keys. This will prevent some
unwanted stopping and also allow disabling the reset on command timeout.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Accessing powered down peripherals will hang the bus, so check power
domain status before initializing SATA and fixup the FDT to disable
unused peripherals.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Various changes to highbank config:
Enable EFI partitions
Enable ext4 and FAT filesystems
Enable bootz command and raw initrd
Increase cmd and print buffer size to 1K
Change serial baudrate to 115200
Enable hush shell
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Qemu emulates a PCNET PCI card for the Malta CoreLV board.
Enable the pcnet driver and add board specific ethernet
initialization function to bring it up. Also enable the
CONFIG_CMD_NET and CONFIG_CMD_PING options.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Qemu emulates the Galileo GT64120 System Controller
which provides a CPU bus to PCI bus bridge.
The patch adds driver for this bridge and enables
PCI support for the emulated Malta board.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Add minimal support for the MIPS Malta CoreLV board
emulated by Qemu. The only supported peripherial is
the UART.
This is enough to boot U-Boot to the command prompt
both in little and big endian mode.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
The Linux specific register access macros, the
extern function declarations and the UL suffixes
has been removed.
The header file will be used for the qemu-malta
board.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.
Conflicts:
board/sandburst/common/ppc440gx_i2c.c
board/sandburst/common/ppc440gx_i2c.h
Signed-off-by: Tom Rini <trini@ti.com>
Pull all the duplicate configuration options into configs/mxs.h
from the board configuration files. This reduces the files greatly
and makes them somewhat more readable. Besides, we do no longer
have such a horrible duplication of code.
Note that the mx23evk grew in size slightly. This is due to the
CONFIG_SYS_CBSIZE now being set to 1024 as it is on the rest of
MXS systems.
This patch also fixes the OCRAM size for i.MX23. The i.MX23 has
only 32kB of OCRAM, while i.MX28 has 128kB of OCRAM.
I verified the configuration didn't change for each of the boards,
but I didn't boot-test it on the boards I do not have. I configured
U-Boot for each board using the "make ... <board>_config" command
and then ran "cpp -I include -dM include/config.h" , which dumped
all the configuration options. I did this both before and after this
patch and finally compared the results for each MXS board. Actually,
the results do differ slightly, since the configs/mxs.h file now
properly includes the correct iomux-mx23.h or iomux-mx28.h , so
while comparing, I had to ignore these new defines. These have no
impact on U-Boot configuration though.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Add a header file, setup.h, which copy from Linux source code,
this file contain structures are used to pass initialisation parameters
to Linux. Enable this function on adp-ag101/adp-ag101p target
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
The original adp-ag101/adp-ag101p initialize only one bank(64MB)
by default at boot time, but it is not enough for some application,
so increasing to two banks(128M).
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
Even though the header files is used only by the
pci_ftpci100 driver, it contains declaration for
a function which is used by external code.
Move the header file to a common location which
lets external code use it.
Compile tested only.
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Add a const keyword to the sect_buf argument of
ide_write_data to fix the following warning:
cmd_ide.c: In function '__ide_output_data':
cmd_ide.c:548: warning: passing argument 2 of 'ide_write_data' discards qualifiers from pointer target type
/devel/u-boot.git/include/ide.h:76: note: expected 'ulong *' but argument is of type 'const ulong *'
Also modify the driver-model documentation to
match with the new prototype.
Compile tested only.
Cc: Macpaul Lin <macpaul@andestech.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller
available on exynos5 SoCs from Samsung.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Due to the new I2C framework we need to adapt the u-boot update
function. Due to the new framework all i2c leafs behind a mux are
present in the system and not only those who are defined and used. So it
is bus number 5 after the rework.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Heiko Schocher <hs@denx.de>
cc: Prafulla Wadaskar <prafulla@marvell.com>
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra
i2c driver to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
as the keymile boards use now the new i2c multibus/multiadapter
framework, remove the EEprom_ivm Environmentvar, as not longer
needed.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-By: Holger Brunck <holger.brunck@keymile.com>
CONFIG_I2C_MUX is replaced through the new i2c multibus/multiadapter
framework, configured through CONFIG_SYS_I2C. As CONFIG_I2C_MUX
is only used on the keymile boards, and they are now completely
moved to the new framework, remove CONFIG_I2C_MUX.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-By: Holger Brunck <holger.brunck@keymile.com>
- added to fsl_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
- added to soft_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
This Patch introduce the new i2c_core file, which holds
the I2C core functions, for the rework of the multibus/
multiadapter support.
Also adds changes in i2c.h for the new I2C multibus/multiadapter
support. This new support can be activated with the
CONFIG_SYS_I2C define.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Missing space for loaddtb command has been added. When missing, ext4load
fails with wrong number of passed parameters.
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
The gdsys ControlCenter Digital board is based on a Freescale P1022 QorIQ SOC.
It boots from SPI-Flash but can be configured to boot from SD-card for
factory programming and testing.
On board peripherals include:
- 2x GbE
- Lattice ECP3 FPGA connected via PCIe
- mSATA RAID1
- USB host
- DisplayPort video output
- Atmel TPM
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Extend the tpm library with support for single authorized (AUTH1) commands
as specified in the TCG Main Specification 1.2. (The internally used helper
functions are implemented in a way that they could also be used for double
authorized commands if someone needs it.)
Provide enums with the return codes from the TCG Main specification.
For now only a single OIAP session is supported.
OIAP authorized version of the commands TPM_LoadKey2 and TPM_GetPubKey are
provided. Both features are available using the 'tpm' command, too.
Authorized commands are enabled with CONFIG_TPM_AUTH_SESSIONS. (Note that
this also requires CONFIG_SHA1 to be enabled.)
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
With CONFIG_SYS_64BIT_LBA, lbaint_t gets defined as a 64-bit type,
which is required to represent block numbers for storage devices that
exceed 2TiB (the block size usually is 512B), e.g. recent hard drives
We now use lbaint_t for partition offset to reflect the lbaint_t change,
and access partitions beyond or crossing the 2.1TiB limit.
This required changes to signature of ext4fs_devread(), and type of all
variables relatives to block sector.
ext2/ext4 fs uses logical block represented by a 32 bit value. Logical
block is a multiple of device block sector. To avoid overflow problem
when calling ext4fs_devread(), we need to cast the sector parameter.
Signed-off-by: Frédéric Leroy <fredo@starox.org>
The files board/qi/qi_lb60/qi_lb60.c and include/configs/qi_lb60.h were
licensed under the GPL v3 or later, and not v2 or later. As this is
incompatible with the project, revert this board support until the
responsible parties are available to re-license (if so desired) under
GPL v2.
Signed-off-by: Tom Rini <trini@ti.com>
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.
Conflicts:
arch/arm/dts/exynos5250.dtsi
Signed-off-by: Tom Rini <trini@ti.com>
If a specific configuraion is selected by the bootm command, e.g. with
'bootm 84000000#recoveryconf' we must honour this for not just the kernel,
but also the ramdisk and FDT.
In the conversion to using a common fit_image_load() function for loading
images from FITs (commits a51ec63 and 53f375f) this feature was lost.
Reinstate it by passing the selected configuration back from
fit_image_load() to boot_get_kernel(), then use this configuration
(which is stored in images->fit_uname_cfg) in both boot_get_ramdisk()
and boot_get_fdt().
Signed-off-by: Simon Glass <sjg@chromium.org>
OpenEmbedded has change partitioning layout of generated image so it
does not raise warnings during the boot regarding unkown partition
being used for U-Boot.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
OpenEmbedded has change partitioning layout of generated image so it
does not raise warnings during the boot regarding unkown partition
being used for U-Boot.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
OpenEmbedded has change partitioning layout of generated image so it
does not raise warnings during the boot regarding unkown partition
being used for U-Boot.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
OpenEmbedded has change partitioning layout of generated image so it
does not raise warnings during the boot regarding unkown partition
being used for U-Boot.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
OpenEmbedded has change partitioning layout of generated image so it
does not raise warnings during the boot regarding unkown partition
being used for U-Boot.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
OpenEmbedded has change partitioning layout of generated image so it
does not raise warnings during the boot regarding unkown partition
being used for U-Boot.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Jason Liu <r64343@freescale.com>
this is usefull when writing an UBI image which contains
and UBIFS volume (check README.nand and UBI FAQ for more
details)
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Add USB EHCI, storage and network support.
Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.
Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tegra30 and Tegra114 are compatible except PLL parameters.
Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.
Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This function has no prototype in the headers and passes void * around, thus
requiring several casts. Tidy this up.
- Add new patch to clean up bootz_setup() function
Signed-off-by: Simon Glass <sjg@chromium.org>
Code for checking "splashpos" environment variable is
duplicated in drivers, move it to the common function.
Call this function also in the bmp display command to
consider "splashpos" settings.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Commit:
dfu: make data buffer size configurable
SHA1: 89a72b2e0e141042c9109185e02d39b2107ffc62
replaced statically allocated buffers with one allocated with memalign.
Malloc pool size of 1MiB was too small, since we needed bigger buffer to
transfer for example uImage.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch performs the following:
1) Convert the assembly code for memory and clock initialization to C code.
2) Move the memory and clock init codes from board/samsung to arch/arm
3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted
the common lowlevel_init from assembly to C-code
4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5.
5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already
done in _main.
6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250.
TEST: Tested SD-MMC boot on SMDK5250 and Origen.
Tested USB and SPI boot on SMDK5250
Compile tested for SMDKV310.
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch configures the gpio values for UART
on Origen and SMDKV310 using pinmux
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
smdk5250-uboot-spl.lds is moved to common folder, so that it can be reused.
It is renamed to exynos-uboot-spl.lds
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Create splash.c/h to put the function and any future common splash
screen code in.
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
When compressed image is loaded, it must be decompressed
to an aligned address + 2 to avoid unaligned access exception
on some ARM platforms.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Anatolij Gustschin <agust@denx.de>
CC: Wolfgang Denk <wd@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
while playing with dfu, I tapped in an unaligned access
when doing on the host side a "lsusb -d [vendornr]: -v"
I get on the board:
GADGET DRIVER: usb_dnl_dfu
data abort
MAYBE you should read doc/README.arm-unaligned-accesses
pc : [<8ff71db8>] lr : [<8ff75aec>]
sp : 8ef40d18 ip : 00000005 fp : 00000000
r10: 00000000 r9 : 47401410 r8 : 8ef40f38
r7 : 8ef4aae8 r6 : 0000000a r5 : 8ef4ab28 r4 : 8ef4ab80
r3 : 0000000a r2 : 00000006 r1 : 00000006 r0 : 8ef4aae8
Flags: Nzcv IRQs off FIQs on Mode SVC_32
Resetting CPU ...
reason is that in the "struct usb_composite_dev" the
"struct usb_device_descriptor desc;" is on an odd address,
and this struct gets accessed in
drivers/usb/gadget/composite.c device_qual()
Fix it, by align this var "struct desc" fix to an aligned
address.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Samuel Egli <samuel.egli@siemens.com>
add a weak dummy function g_dnl_fixup to add the possibility to update
the device_desc board specific. Used on the upcoming siemens board
support, where idVendor and idProduct is stored in an eeprom.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Dfu transfer uses a buffer before writing data to the
raw storage device. Make the size (in bytes) of this buffer
configurable through environment variable "dfu_bufsiz".
Defaut value is configurable through CONFIG_SYS_DFU_DATA_BUF_SIZE
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@ti.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Tom Rini <trini@ti.com>
At present mkimage is set up to always build with image signing support.
This means that the SSL libraries (e.g. libssl-dev) are always required.
Adjust things so that mkimage can be built with and without image signing,
controlled by the presence of CONFIG_FIT_SIGNATURE in the board config file.
If CONFIG_FIT_SIGNATURE is not enabled, then mkimage will report a warning
that signing is not supported. If the option is enabled, but libraries are
not available, then a build error similar to this will be shown:
lib/rsa/rsa-sign.c:26:25: fatal error: openssl/rsa.h: No such file or directory
Signed-off-by: Simon Glass <sjg@chromium.org>
We've been dropping SoC name from U-Boot prompt as it increase
complexity for automatic testing and makes line longer for no good
reason.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Andy Voltz <andy.voltz@timesys.com>
This adds a default environment which should be able to support both
3.0.15 from Timesys and upcoming 3.11.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Andy Voltz <andy.voltz@timesys.com>
In a714321 we add a check at the end of findfdt to make sure we have
updated it from undefined and if not, warn the user. This however
forgot a ';' on the end of the previous last test.
Signed-off-by: Tom Rini <trini@ti.com>
The SabreSD platform is available with i.MX6Q or i.MX6DL. This patch adds the
support of the i.MX6DL. The config file and the board directory are renamed
to remove the reference to the MX6Q.
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
CC: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
With CONFIG_SYS_64BIT_LBA, lbaint_t gets defined as a 64-bit type,
which is required to represent block numbers for storage devices that
exceed 2TiB (the block size usually is 512B), e.g. recent hard drives.
For some obscure reason, the current U-Boot code uses lbaint_t for the
number of blocks to read (a rather optimistic estimation of how RAM
sizes will evolve), but not for the starting address. Trying to access
blocks beyond the 2TiB boundary will simply wrap around and read a
block within the 0..2TiB range.
We now use lbaint_t for block start addresses, too. This required
changes to all block drivers as the signature of block_read(),
block_write() and block_erase() in block_dev_desc_t changed.
Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
While signing images is useful, it does not provide complete protection
against several types of attack. For example, it it possible to create a
FIT with the same signed images, but with the configuration changed such
that a different one is selected (mix and match attack). It is also possible
to substitute a signed image from an older FIT version into a newer FIT
(roll-back attack).
Add support for signing of FIT configurations using the libfdt's region
support.
Please see doc/uImage.FIT/signature.txt for more information.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function to find regions in device tree given a list of nodes to
include and properties to exclude.
See the header file for full documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
RSA provides a public key encryption facility which is ideal for image
signing and verification.
Images are signed using a private key by mkimage. Then at run-time, the
images are verified using a private key.
This implementation uses openssl for the host part (mkimage). To avoid
bringing large libraries into the U-Boot binary, the RSA public key
is encoded using a simple numeric representation in the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for signing images using a new signature node. The process
is handled by fdt_add_verification_data() which now takes parameters to
provide the keys and related information.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add tracing to Exynos5 boards, so that tracing can be enabled when building
with 'make FTRACE=1'. We use a 16MB trace buffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
For tracing it is useful to run as much of U-Boot as possible so as to get
a complete picture. Quite a bit of work happens in bootm, and we don't want
to have to stop tracing before bootm starts.
Add a way of doing a 'fake' boot of the OS - which does everything up to
the point where U-Boot is about to jump to the OS image. This allows
tracing to record right until the end.
This requires arch support to work.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the bootm code is mostly duplicated for the plain 'bootm'
command and its sub-command variant. This makes the code harder to
maintain and means that changes must be made to several places.
Introduce do_bootm_states() which performs selected portions of the bootm
work, so that both plain 'bootm' and 'bootm <sub_command>' can use the
same code.
Additional duplication exists in bootz, so tidy that up as well. This
is not intended to change behaviour, apart from minor fixes where the
previously-duplicated code missed some chunks of code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Support tracing on sandbox by adding suitable CONFIG options. To enable it,
compile U-Boot with FTRACE=1.
The timer functions are marked to skip tracing, since these are called from
the tracing code itself, and we want to avoid an infinite loop.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add hooks for tracing to generic board, including:
- allow early tracing to start early as possible in U-Boot
- reserve memory for trace buffer
- copy early trace buffer to main trace buffer after relocation
- setup full tracing support after relocation
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a library which supports tracing of execution using built-in gcc
features and a microsecond timer. This can be used to record a list of
function which are executed, along with a timestamp for each. Later
this information can be sent to the host for processing.
Signed-off-by: Simon Glass <sjg@chromium.org>
I am not sure of the meaning of extern inline, but this gives errors
when building with function instrumenting enabled. Change these functions
to static inline.
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch initiates cros-ec in board_init() to enable it for smdk5250.
This patch depends on the patch in the MMC series that brings in exynos5-dt.c.
Refer to http://patchwork.ozlabs.org/patch/240084.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Add support for the Quad version of Wandboard; fix compile warning resulting
from having 2G of memory.
Signed-off-by: Tapani Utriainen <tapani@technexion.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
This patch adds the driver for keyboard that's controlled by ChromeOS EC.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
This patch adds SPI support for carrying out the cros_ec protocol.
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
This patch adds the cros_ec driver that implements the protocol for
communicating with Google's ChromeOS embedded controller.
Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
add network support with ksz8851_16mll on at91sam9n12ek board
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
The device interface is 16 bits wide.
All the available packets are read from the incoming fifo.
Signed-off-by: Roberto Cerati <roberto.cerati@bticino.it>
Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
[voice.shen@atmel.com: address comments from review results]
[voice.shen@atmel.com: clean up for submit]
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
commit 39695029bc15041c809df3db4ba19bd729c447fa
Author: Charles Coldwell <coldwell@ll.mit.edu>
Date: Tue Feb 19 08:27:33 2013 -0500
Changes to support the Xilinx 1000BASE-X phy (GTX/MGT)
Signed-off-by: Charles Coldwell <coldwell@ll.mit.edu>
This patch adds support for the WEMAC, the ethernet controller included
in the Allwinner A10 SoC. It will get used in the upcoming A10 board
support.
From: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
before writing the received buffer to nand, erase the nand
sectors. If not doing this, nand write fails. See for
more info here:
http://lists.denx.de/pipermail/u-boot/2013-June/156361.html
Using the nand erase option "spread", maybe overwrite
blocks on, for example another mtd partition, if the
erasing range contains bad blocks.
So a limit option is added to nand_erase_opts()
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
- remove the builtin 'rootpath' spec (according to U-Boot project
policy) and require user provided environments to contain these
- rephrase the evaluation of the 'muster_nr' approach which allows to
quickly switch among several network boot setups (make the setting
transparent when empty, resulting in default DULG behaviour)
- reduce the ARP timeout for faster network boot
Signed-off-by: Gerhard Sittig <gsi@denx.de>
- use the default baudrate table for serial communication
- remove hostname/boofile/rootpath defines which were not referenced elsewhere
Signed-off-by: Gerhard Sittig <gsi@denx.de>
This patch enables CONFIG_SILENT_CONSOLE for EXYNOS5.
This patch also removes the hardcoding of UART port from
exynos5250 config.
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add required compatible information for s5p serial driver
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Some Exynos5250 silicon may require 1.05v on the MIF to be stable, so to be
safe we can default to 1.05v instead of 1.00v. This can be set optimally later
in the boot process by the kernel.
The 0x6 value for 1.05v comes from the MAX77686 datasheet.
Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Flag status register polling is required for micron 512Mb flash
devices onwards, for performing erase/program operations.
Like polling for WIP(Write-In-Progress) bit in read status register,
spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control)
bit in flag status register.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the
size for existing boards which has < 16Mbytes SPI flashes.
It's upto user which has provision to use the bank addr code for
flashes which has > 16Mbytes.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Read the flash bank addr register to get the state of bank in
a perticular flash. and also bank write happens only when there is
a change in bank selection from user.
bank read only valid for flashes which has > 16Mbytes those are
opearted in 3-byte addr mode, each bank occupies 16Mytes.
Suppose if the flash has 64Mbytes size consists of 4 banks like
bank0, bank1, bank2 and bank3.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bank/Extended addr commands are specific to particular
flash vendor so discover them based on the idocode0.
Assign the discovered bank commands to spi_flash members
so-that the bank read/write will use their specific operations.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
This patch adds support for the Palm Treo 680 smartphone. A quick overview of
u-boot implementation on the treo 680...
The treo 680 has a Diskonchip G4 nand flash chip. This device has a 2k region
that maps to the system bus at the reset vector in a NOR-like fashion so that it
can be used as the boot device. The phone is shipped with this 2k region
configured as write-protected (can't be modified) and programmed with an initial
program loader (IPL). At power-up, this IPL loads the contents of two flash
blocks to SDRAM and jumps to it. The capacity of the two blocks is not large
enough to hold all of u-boot, so a u-boot SPL is used. To conserve flash space,
these two blocks and the necessary number of subsequent blocks are programmed
with a concatenated spl + u-boot image. That way, the IPL will also load a
portion of u-boot proper, and when the spl runs, it relocates the portion of
u-boot that the IPL has already loaded, and then resumes loading the remaining
part of u-boot before jumping to it.
The default_environment is used (CONFIG_ENV_IS_NOWHERE) because I didn't think
that having a writable environment was worth the cost of a flash block, although
adding it would be straightforward. I abuse the CONFIG_EXTRA_ENV_SETTINGS
option to specify the usbtty for the console (CONFIG_SYS_CONSOLE_IS_IN_ENV).
Support for the LCD is included, but currently it is only useful for displaying
the u-boot splash screen. But if u-boot is built without the usbtty console, it
does display the auto-boot progress nicely.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Discard all .dynsym sections from linker scripts
Remove all __dynsym_start definitions from linker scripts
Remove all __dynsym_start references from the codebase
Note: this touches include/asm-generic/sections.h, which
is not ARM-specific, but actual uses of __dynsym_start
are only in ARM, so this patch can safely go through
the ARM repository.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Tested-by: Lubomir Popov <lpopov@mm-sol.com>
Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
There will need the environment in SPL for reasons other than network
support (in particular, hwconfig contains info for how to set up DDR).
Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT
for environment in common/Makefile.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: Tom Rini <trini@ti.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Relax parameters to give address latching more time to setup.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
When a T4 board boots from SRIO or PCIE, it needs to finish these processes:
1. Set all the cores in holdoff status.
2. Set the boot location to one PCIE or SRIO interface by RCW.
3. Set a specific TLB entry for the boot process.
4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot.
5. Set a specific TLB entry in order to fetch ucode and ENV from
master.
6. Set a LAW entry with the TargetID one of the PCIE ports for
ucode and ENV.
7. Slave's u-boot image should be generated specifically by
make xxxx_SRIO_PCIE_BOOT_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
For more information about the feature of Boot from SRIO/PCIE, please
refer to the document doc/README.srio-pcie-boot-corenet.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
T4 can support the feature of Boot from SRIO/PCIE, and the macro
"CONFIG_SRIO_PCIE_BOOT_MASTER" will enable the master module of this feature
when building the u-boot image.
You can get some description about this macro in README file, and for more
information about the feature of Boot from SRIO/PCIE, please refer to the
document doc/README.srio-pcie-boot-corenet.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
When a b4860qds board boots from SRIO or PCIE, it needs to finish these
processes:
1. Set all the cores in holdoff status.
2. Set the boot location to one PCIE or SRIO interface by RCW.
3. Set a specific TLB entry for the boot process.
4. Set a LAW entry with the TargetID of one PCIE or SRIO for the boot.
5. Set a specific TLB entry in order to fetch ucode and ENV from
master.
6. Set a LAW entry with the TargetID one of the PCIE ports for
ucode and ENV.
7. Slave's u-boot image should be generated specifically by
make xxxx_SRIO_PCIE_BOOT_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
For more information about the feature of Boot from SRIO/PCIE, please
refer to the document doc/README.srio-pcie-boot-corenet.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
B4860QDS can support the feature of Boot from SRIO/PCIE, and the macro
"CONFIG_SRIO_PCIE_BOOT_MASTER" will enable the master module of this feature
when building the u-boot image.
You can get some description about this macro in README file, and for more
information about the feature of Boot from SRIO/PCIE, please refer to the
document doc/README.srio-pcie-boot-corenet.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Currently, the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" can enable
the master module of Boot from SRIO and PCIE on a platform. But this
is not a silicon feature, it's just a specific booting mode based on
the SRIO and PCIE interfaces. So it's inappropriate to put the macro
into the file arch/powerpc/include/asm/config_mpc85xx.h.
Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to
"CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from
arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros
in configuration header file of each board which can support the
master module of Boot from SRIO and PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
BSC9131RDB has 1GB DDR.
Out of this, only 880MB is passed on to Linux via bootm_size.
Remaining
-16MB is reserved for PowerPC-DSP shared control area
-128MB is reserved for DSP private area.
Also 256MB, out of this 880MB is required for data communication between
PowerPC and DSP core.
For this bootargs are modified to pass parameter to create 1 hugetlb
page of 256MB via default_hugepagesz, hugepagesz and hugepages
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
BSC9131RDB is a Freescale Reference Design Board for
BSC9131 SoC which is a integrated device that contains
one powerpc e500v2 core and one DSP starcore.
To support DSP starcore
-Creating LAW and TLB for DSP-CCSR space.
-Creating LAW for DSP-core subsystem M2 memory
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
BSC9131RDB supports Sysclk
-66MHz if jumper J16 is close (default state)
-100MHz if jumper J16 is open
Add targets
-BSC9131RDB_NAND_SYSCLK100 : for NAND boot at Sysclk 100MHz
-BSC9131RDB_SPIFLASH_SYSCLK100: for SPI boot at Sysclk 100MHz
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
IFC errata A003399 is valid for IFC NOR boot i.e.if no on-board NOR flash or
no NOR boot, do not compile its workaround.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch ensures minimal cooling for the net2big_v2 by automatically
starting the I2C fan (GMT G762) at low speed (2800 RPM).
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Detect if we are running on a panda revision A1-A6,
or an ES panda board. This can be done by reading
the level of GPIOs and checking the processor revisions.
This should result in:
Panda 4430:
GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5
GPIO171, GPIO101, GPIO182: 1 0 1 => A6
Panda ES:
GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2
GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3
Set the board name appropriately for the board revision that
is detected.
Update the findfdt macro to load the a4 device tree binary.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
[trini: %s/CONTROL_PADCONF_CORE/(*ctrl)->control_padconf_core_base/ and
formatting for that]
Signed-off-by: Tom Rini <trini@ti.com>
Update the EXTRA_ENV_SETTING for the dra7xx.
The console needs to be set to ttyO0 and the
findfdt needs to be updated to load the
dra7xx-evm.dtb file.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Correct the console sys prompt to display the correct processor
and the corrent board
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reported-by: Lubomir Popov <lpopov@mm-sol.com>
Reviewed-by: Tom Rini <trini@ti.com>
In the omap4, omap5 and am335x common files add a check to ensure that the fdtfile is
defined after the findfdt macro has run. If the file is not defined then warn the user that the
dtb file is not defined.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Use a negative value of CONFIG_ENV_OFFSET for all NVIDIA reference boards
that store the U-Boot environment in the 2nd eMMC boot partition. This
makes U-Boot agnostic to the size of the eMMC boot partition, which can
vary depending on which eMMC device was actually stuffed into the board.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Enhance the MMC core to calculate the size of each MMC partition, and
update mmc->capacity whenever a partition is selected. This causes:
mmc dev 0 1 ; mmcinfo
... to report the size of the currently selected partition, rather than
always reporting the size of the user partition.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The commit d196bd8 (env_mmc: add support for redundant environment)
introduce the following compile error when enable redundant
environment support with MMC
---8<---
env_mmc.c:149: error: 'env_t' has no member named 'flags'
env_mmc.c:248: error: 'env_t' has no member named 'flags'
env_mmc.c:248: error: 'env_t' has no member named 'flags'
env_mmc.c:250: error: 'env_t' has no member named 'flags'
env_mmc.c:250: error: 'env_t' has no member named 'flags'
env_mmc.c:252: error: 'env_t' has no member named 'flags'
env_mmc.c:252: error: 'env_t' has no member named 'flags'
env_mmc.c:254: error: 'env_t' has no member named 'flags'
env_mmc.c:254: error: 'env_t' has no member named 'flags'
env_mmc.c:267: error: 'env_t' has no member named 'flags'
make[1]: *** [env_mmc.o] Error 1
--->8---
Add this patch to fix it
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Michael Heimpold <mhei@heimpold.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Small conflict over DRA7XX updates and adding SRAM_SCRATCH_SPACE_ADDR
Conflicts:
arch/arm/include/asm/arch-omap5/omap.h
Signed-off-by: Tom Rini <trini@ti.com>
This patch adds APIs to access(open / close) and to resize boot partiton of EMMC.
Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch enables and initialises DWMMC for SMDK5250.
Supports both FDT and non-FDT. This patch creates a new file
'exynos5-dt.c' meant for FDT support.
exynos5-dt.c: This file shall contain all code which supports FDT.
Any addition of FDT support for any module needs to be
added in this file.
smdk5250.c: This file shall contain the code which supports non-FDT.
version. Any addition of non-FDT support for any module
needs to be added in this file.
May be, the file smdk5250.c can be removed in near future
when non-FDT is not required.
The Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration.
NOTE:
Please note that all additions corresponding to FDT need to be added into the
file exynos5-dt.c.
At same time if non-FDT support is required then add the corresponding
updations into smdk5250.c.
Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
LP-8x4x is a programmable automation controller by ICP DAS. It is
shipped with outdated U-Boot v1.3.0
This patch adds enough supports to boot the board:
- 128M of 128M SDRAM
- 32M of 48M NOR Flash memory
- 1 of 4 Serial consoles (PXA FFUART)
- 2 of 2 Ethernet controllers (DM9000)
Signed-off-by: Sergey Yanovich <ynvich@gmail.com>
Series-to: u-boot
Series-cc: marex
This patch adds support to both Faraday FUSBH200 and FOTG210,
the differences between Faraday EHCI and standard EHCI are
listed bellow:
1. The PORTSC starts at 0x30 instead of 0x44.
2. The CONFIGFLAG(0x40) is not only un-implemented, and
also has its address space removed.
3. Faraday EHCI is a TDI design, but it doesn't
compatible with the general TDI implementation
found at both U-Boot and Linux.
4. The ISOC descriptors differ from standard EHCI in
several ways. But since U-boot doesn't support ISOC,
we don't have to worry about that.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
The flash_info_t->start[] field is limited in size by CONFIG_SYS_MAX_FLASH_SECT
macro, which is set to 19 for this board in the board config file. If we inspect
the board/ppmc7xx/flash.c closely, especially the flash_get_size() function, we
can notice the "switch ((long)flashtest)" at around line 80 having a few results
which will set flash_info_t->sector_count to value higher than 19, for example
"case AMD_ID_LV640U" will set it to 128. Notice that right underneath, iteration
over flash_info_t->start[] happens and the upper bound for the interation is
flash_info_t->sector_count. Now if the sector_count is 128 as it is for the
AMD_ID_LV640U case, but the CONFIG_SYS_MAX_FLASH_SECT limiting the start[] is
only 19, an access past the start[] array much happen. Moreover, during this
iteration, the field is written to, so memory corruption is inevitable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Richard Danter <richard.danter@windriver.com>
C99's strict aliasing rules are insane to use in low-level code such as a
bootloader, but as Wolfgang has rejected -fno-strict-aliasing in the
past, add a union so that 16-bit accesses can be performed.
Compile-tested only.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Move pinmux configurations for the DA830 SoCs from board file
to the arch tree so that it can be used for all da830 based devices.
Also, avoids duplicate pinmuxing in case of NAND.
Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
The omap2420H4 was the only mainline omap24xx board. Prior to being
fixed by Jon Hunter in time for v2013.04 it had been functionally broken
for a very long time. Remove this board as there's not been interest in
it in U-Boot for quite a long time.
Signed-off-by: Tom Rini <trini@ti.com>
Add MMC support for da830 boards in order to perform
mmc operations(read,write and erase).
Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
Add some useful functions, and the corresponding definitions.
Add support for powering on the dra7xx_evm SD/MMC LDO
(courtesy Lokesh Vutla <lokeshvutla@ti.com>).
Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
Reviewed-by: Tom Rini <trini@ti.com>
Update PLL values.
SYS_CLKSEL value for 20MHz is changed to 2. In other platforms
SYS_CLKSEL value 2 represents reserved. But in sys_clk array
ind 1 is used for 13Mhz. Since other platforms are not using
13Mhz, reusing index 1 for 20MHz.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
And also moving V_SCLK, V_OSCK defines to
arch/clock.h for OMAP4+ boards.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The registers that are used for device identification
are changed from OMAP5 to DRA7xx.
Using the correct registers for DRA7xx.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The pci_indirect.c file is always compiled when
CONFIG_PCI is defined although the indirect PCI
bridge support is not needed by every board.
Introduce a new CONFIG_PCI_INDIRECT_BRIDGE
config option and only compile indirect PCI
bridge support if this options is enabled.
Also add the new option into the configuration
files of the boards which needs that.
Compile tested for powerpc, x86, arm and nds32.
MAKEALL results:
powerpc:
--------------------- SUMMARY ----------------------------
Boards compiled: 641
Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB )
----------------------------------------------------------
Note: the warnings for ELPPC and MPC8323ERDB are present even
without the actual patch.
x86:
--------------------- SUMMARY ----------------------------
Boards compiled: 1
----------------------------------------------------------
arm:
--------------------- SUMMARY ----------------------------
Boards compiled: 311
----------------------------------------------------------
nds32:
--------------------- SUMMARY ----------------------------
Boards compiled: 3
----------------------------------------------------------
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
This commit refactors common/board_f.c and common/board_r.c
in order to delete the dest_addr and dest_addr_sp from
gd_t struct.
As mentioned as follows in include/asm-generic/global_data.h,
/* TODO: is this the same as relocaddr, or something else? */
unsigned long dest_addr; /* Post-relocation address of U-Boot */
dest_addr is the same as relocaddr.
Likewise, dest_addr_sp is the same as start_addr_sp.
It seemed dest_addr/dest_addr_sp was used only as a scratch variable
to calculate relocaddr/start_addr_sp, respectively.
With a little refactoring, we can delete dest_addr and dest_addr_sp.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Jump into full u-boot mode if a 'c' character is received on the uart.
We need to adjust the spl bss/malloc area to not overlap with the
loadaddr of the kernel (sdram + 32k), so move it past u-boot instead.
For raw mmc, we store the kernel parameter area in the free space after
the MBR (if used). For nand, we use the last sector of the partition
reserved for u-boot.
This also enables the spl command in the full u-boot so the kernel
parameter area snapshot can be created.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
When running the "save" command several times on a mx6qsabresd we see:
U-Boot > save
Saving Environment to MMC...
Writing to MMC(1)... done
U-Boot > save
Saving Environment to MMC...
MMC partition switch failed
U-Boot > save
Saving Environment to MMC...
Writing to MMC(1)... done
U-Boot > save
Saving Environment to MMC...
MMC partition switch failed
U-Boot > save
Saving Environment to MMC...
Writing to MMC(1)... done
U-Boot > save
Saving Environment to MMC...
MMC partition switch failed
This issue is caused by the incorrect usage of CONFIG_SYS_MMC_ENV_PART.
CONFIG_SYS_MMC_ENV_PART should be used to specify the mmc partition that stores
the environment variables.
On some imx boards it is been incorrectly used to pass the partition of kernel
and dtb files for the 'mmcpart' script variable.
Remove the CONFIG_SYS_MMC_ENV_PART usage and configure the 'mmcpart' variable
directly.
Reported-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
The location of valid scratch space is dependent on SoC, so move that
there. On OMAP4+ we continue to use SRAM_SCRATCH_SPACE_ADDR. On
am33xx/ti814x we want to use what the ROM defines as "public stack"
which is the area after our defined download image space. Correct the
comment about and location of CONFIG_SPL_TEXT_BASE.
Signed-off-by: Tom Rini <trini@ti.com>
Add a DT simple-framebuffer node to DT when booting the Linux kernel.
This will allow the kernel to inherit the framebuffer configuration from
U-Boot, and display a graphical boot console, and even run a full SW-
rendered X server.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
simple-framebuffer is a new device tree binding that describes a pre-
configured frame-buffer memory region and its format. The Linux kernel
contains a driver that supports this binding. Implement functions to
create a DT node (or fill in an existing node) with parameters that
describe the framebuffer format that U-Boot is using.
This will be immediately used by the Raspberry Pi board in U-Boot, and
likely will be used by the Samsung ARM ChromeBook support soon too. It
could well be used by many other boards (e.g. Tegra boards with built-in
LCD panels, which aren't yet supported by the Linux kernel).
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
Prior to Sricharan's cleanup of the boot parameter saving code, we
did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a
problem that the address was pointing to the middle of our running SPL.
Correct to point to the base location of the download image area.
Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being
used. As part of correcting these tests, make use of the fact that
we've always been placing our stack outside of the download image area
(which is fine, once the downloaded image is run, ROM is gone) so
correct the max size test to be the ROM defined top of the download area
to where we link/load at.
Signed-off-by: Tom Rini <trini@ti.com>
---
Changes in v2:
- Fix typo noted by Peter Korsgaard
Now that the code for loading these three images from a FIT is common, we
don't need individual boostage IDs for each of them.
Note: there are some minor changes in the bootstage numbering, particuarly
for kernel loading. I don't believe this matters.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new common code to load a flat device tree. Also fix up a few casts
so that this code works with sandbox. Other than that the functionality
should not change.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present code to load an image from a FIT is duplicated in the three
places where it is needed (kernel, fdt, ramdisk).
The differences between these different code copies is fairly minor.
Create a new function in the fit code which can handle any of the
requirements of those cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
Loading a ramdisk, kernel or FDT goes through similar stages. Create
a block of IDs for each task, and define a consistent numbering within
the block. This will allow use of common code for image loading.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are two implementations of abortboot(). Turn these into two separate
functions, and create a single abortboot() which calls either one or the
other.
Also it seems that nothing uses abortboot() outside main, so make it static.
At this point there is no further use of CONFIG_MENU in main.c.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
This is not currently used, since autoboot is not enabled for this
board, but the string is missing a parameter. Add it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Add minimal support (only boot from mmc device) for the Congatec
Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad
processor) module.
Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
tzpc_init is common for all exynos5 boards, hence move it to
armv7/exynos so that all other boards can use it.
Also update the smdk5250 Makefile and config file.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add i2c2 and 3 to mx6qsabreauto board, i2c3 is multiplexed
use gpio to set steering.
Signed-off-by: Renato Frias <b13784@freescale.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
When the mx6slevk board support was added in U-boot there was no device tree
support for mx6sl, so only a FSL 3.0.35 was tested at that time.
Now that mx6slevk support is available we can boot a device tree kernel, by
adjusting CONFIG_LOADADDR into a proper location, so that a non-dt and a dt
kernels can be booted.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
VF610TWR is a board based on Vybrid VF610 SoC.
This patch adds basic support for Vybrid VF610TWR board.
Signed-off-by: Alison Wang <b18965@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
This patch does a similar code reogranzation from
http://patchwork.ozlabs.org/patch/132179/
which is based on an old version of code (fdt support and bus selection
still not in). It merges this tidy-up on top of the recent code. It does
not make any logical change.
tpm.c implements the interface defined in tpm.h based on underlying
LPC or I2C TPM driver. tpm.c and the underlying driver communicate
throught tpm_private.h.
Note: Merging the LPC driver with tpm.c is left to future patches.
Change-Id: Ie1384f5f9e3935d3bc9a44adf8de80c5a70a5f2b
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs,
which supports clockstretching, combined reads and a bus speed of
up to 400khz. The device also has a new device id.
This is based on the kernel patch provided by Infineon :
https://gerrit.chromium.org/gerrit/42332
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Luigi Semenzato <semenzato@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Tom Wai-Hong Tam <waihong@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
The new name is more aligned with Linux kernel's naming of TPM driver.
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
A SPI slave may take time to react to a request. For SPI flash devices
this time is defined as one bit time, or a whole byte for 'fast read'
mode.
If the SPI slave is another CPU, then the time it takes to react may
vary. It is convenient to allow the slave device to tag the start of
the actual reply so that the host can determine when this 'preamble'
finishes and the actual message starts.
Add a preamble flag to the available SPI flags. If supported by the
driver then it will ignore any received bytes before the preamble
on each transaction. This ensures that reliable communication with
the slave is possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
This patch is essentially an update of u-boot MTD subsystem to
the state of Linux-3.7.1 with exclusion of some bits:
- the update is concentrated on NAND, no onenand or CFI/NOR/SPI
flashes interfaces are updated EXCEPT for API changes.
- new large NAND chips support is there, though some updates
have got in Linux-3.8.-rc1, (which will follow on top of this patch).
To produce this update I used tag v3.7.1 of linux-stable repository.
The update was made using application of relevant patches,
with changes relevant to U-Boot-only stuff sticked together
to keep bisectability. Then all changes were grouped together
to this patch.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
[scottwood@freescale.com: some eccstrength and build fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
Then we can get rid of the #ifdef CONFIG_TEGRA guard in cpu_init_crit.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
B4420 is a subset of B4860. Merge them in config_mpc85xx.h to simplify
the defines.
- Removed #define CONFIG_SYS_FSL_NUM_CLUSTERS as this is used nowhere.
- defined CONFIG_SYS_NUM_FM1_10GEC to 0 for B4420 as it does not have 10G.
Also move CONFIG_E6500 out of B4860QDSds.h into config_mpc85xx.h.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
- Added SERDES2 PRTCLs = 0x98, 0x9E
- Default Phy Addresses for Teranetics PHY on XAUI card
The PHY addresses of Teranetics PHY on XAUI riser card are assigned
based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on
AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1
and slot2
- Configure MDIO for 10Gig Mac
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Provided a default RCW for P5040, then it can use PBL to build
ramboot image.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
T4160 is a subset of T4240. Merge them in config_mpc85xx.h to simplify
the defines. Also move CONFIG_E6500 out of t4qds.h into config_mpc85xx.h.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use
PBL tool to produce the ramboot image.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add Seagate GoFlex Home support
Start with dockstar configuration
define support for RTC, DATE, SATA and EXT4FS
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
This adds support for the Cortex-A15-TC2 core tile for the Versatile
Express board by ARM. This is mostly a copy of the A5 support file,
but will be extended later with A15 specific options.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
This patch creates a new config for the A5 dual core tile that includes the
generic config for the Versatile Express platform.
The generic config has been modified to provide support for the Extended
Memory Map, as used on the A5 core tile. A5 does not support the legacy
memory map.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
The current ca9x4_ct_vxp platform contains support for a Versatile
Express motherboard with a quad core A9 core tile.
This patch separates the Versatile Express motherboard code and the
A9 specific code, to ease supporting more core tiles in the next
patches.
Andre: merged the first two of Ryan's original patches and did some
checkpatch fixes.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-munaligned-access option: flash initialization hangs, probably
due to data error.
Since the structure is supposed to replicate the actual data layout
in CFI Flash chips, the alignment issue can't be fixed in the structure.
So, unaligned fields need using of explicit unaligned access macros.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Add sama5d3xek support with following feature
- boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector
- boot from SPI flash support
- boot from SD card support
- LCD support
- EMAC support
- USB OHCI support
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch enables gigabyte device for SMDK5250.
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Faraday FTSDC010 is a MMC/SD host controller.
Although there is already a driver in current u-boot release,
which is modified from eSHDC and contributed by Andes Tech.
Its performance is too terrible on Faraday A36x SoC platforms,
so I turn to implement this new version of driver which is
10+ times faster than the old one.
It's carefully designed to be compatible with Andes chips,
so it should be safe to replace it.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The Freescale MPC8220 Power Architecture processors have long reached
EOL; Freescale does not even list these any more on their web site.
Remove the code to avoid wasting maitaining efforts on dead stuff.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
Use QSGMII card PHY address as default SGMII card PHY address, QSGMII card
PHY address is variable depends on different slot.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes
interfaces for quad-port dual media capability. This driver supports SGMII
and QSGMII MAC mode. For now SGMII mode is tested.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
1, Implemented board_ft_fman_fixup_port() to fix port for kernel.
2, Implemented fdt_fixup_board_enet() to fix node status of different
slots and interfaces.
3, Adding detection of slot present for XGMII interface.
4, There is no PHY for XFI, so removed related phy address settings.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
T4160QDS shares the same platform as T4240QDS. T4160 is a low power
version of T4240, with eight e6500 cores, two DDR3 controllers, and
slightly different SerDes protocols.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Separate CONFIG_PPC_T4240 from board config file. Prepare to add more SoC
variants supported on the same board.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
T4240 has voltage ID fuse. Read the fuse and configure the voltage
correctly. Core voltage has higher tolerance on over side than below.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
1. fix 10G mac offset by plus 8;
2. add second 10G port info for FM1 & FM2 when init ethernet info;
3. fix 10G lanes name to match lane protocol table;
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This seems to be a common function for several architectures, so create
a common function rather than duplicating the code in each arch.
Also make an attempt to avoid introducing #ifdefs in the new code, partly
by removing useless #ifdefs around function declarations in the image.h
header.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code is very large, and in SPL it isn't always useful to print
out image information (in fact there might not even be a console
active). So disable this feature unless this option is set.
Signed-off-by: Simon Glass <sjg@chromium.org>
Much of the image code uses addresses as ulongs and pointers interchangeably,
casting between the two forms as needed.
This doesn't work with sandbox, which has a U-Boot RAM buffer which is
separate from the host machine's memory.
Adjust the cost so that translating from a U-Boot address to a pointer uses
map_sysmem(). This allows bootm to work correctly on sandbox.
Note that there are no exhaustive tests for this code on sandbox, so it is
possible that some dark corners remain.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de> (v1)
This function will be used to print signatures as well as hashes, so rename
it. Also make it static since it is not used outside this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
We intend to add signatures to FITs also, so rename this function so that
it is not specific to hashing. Also rename fit_image_set_hashes() and
make it static since it is not used outside this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
The existing function is long and most of the code is indented a long
way. Before adding yet more code, split this out into its own function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de> (v1)
This is the main entry point to the FIT image verification code. We will
be using it to handle image verification with signatures, so rename the
function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
This function doesn't need to be exported, and with verification
we want to use it for setting the 'value' property in any node,
so rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
This code is never compiled into U-Boot, so move it into a separate
file in tools/ to avoid the large #ifdef.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
One we split out the FIT code from image.c we will need this function.
Export it in the header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Rather than repeat the line
#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE) || \
defined(USE_HOSTCC)
everywhere, put this in a header file and #define IMAGE_ENABLE_TIMESTAMP
to either 1 or 0. Then we can use a plain if() in most code and avoid
the #ifdefs.
The compiler's dead code elimination ensures that the result is the same.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Iterating through subnodes with libfdt is a little painful to write as we
need something like this:
for (depth = 0, count = 0,
offset = fdt_next_node(fdt, parent_offset, &depth);
(offset >= 0) && (depth > 0);
offset = fdt_next_node(fdt, offset, &depth)) {
if (depth == 1) {
/* code body */
}
}
Using fdt_next_subnode() we can instead write this, which is shorter and
easier to get right:
for (offset = fdt_first_subnode(fdt, parent_offset);
offset >= 0;
offset = fdt_next_subnode(fdt, offset)) {
/* code body */
}
Also, it doesn't require two levels of indentation for the loop body.
Signed-off-by: Simon Glass <sjg@chromium.org>
(Cherry-picked from dtc commit 4e76ec79)
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
We don't measure boot timing on the host, or with SPL, so use both
conditions in the bootstage header. This allows us to avoid using
conditional compilation around bootstage_...() calls. (#ifdef)
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than needing to call one of many hashing algorithms in U-Boot,
provide a function hash_block() which handles this, and can support all
available hash algorithms.
Once we have md5 supported within hashing, we can use this function in
the FIT image code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function which allows a (file, function, line number) to be marked
in bootstage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Any pointers to name strings that were passed to bootstage_mark_name()
pre-relocation should be copied post-relocation so that they don't get
trashed as the original location of U-Boot is re-used for other
purposes.
This change introduces a new API call that should be called from
board_init_r() after malloc has been initted on any board that uses
bootstage.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some functions don't have a stub for when CONFIG_BOOTSTAGE is not defined.
Add one to avoid #ifdefs in the code when this is used in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.
Tidy up some old broken and unneeded implementations at the same time.
To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base timestamp supplied by coreboot
as U-Boot's base time.
Signed-off-by: Simon Glass <sjg@chromium.org>base
Signed-off-by: Simon Glass <sjg@chromium.org>
The gpio spec for bf54x and bf60x differ a lot from the old gpio driver for bf5xx.
A lot of machine macros are used to accomodate both code in one gpio driver.
This patch split the old gpio driver and move new gpio2 support to the generic
gpio driver folder.
- To enable gpio2 driver, macro CONFIG_ADI_GPIO2 should be defined in the board's
config header file.
- The gpio2 driver supports bf54x, bf60x and future ADI processors, while the
older gpio driver supports bf50x, bf51x, bf52x, bf53x and bf561.
- All blackfin specific gpio function names are replaced by the generic gpio APIs.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
- Move blackfin serial driver to the generic driver folder.
- Move blackfin serial headers to blackfin arch head folder.
- Update the include path to blackfin serial header in start up code.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Remove blackfin specific implementation of the generic serial API when
early print macro is defined.
In BFIN_BOOT_BYPASS mode, don't call generic serial_puts, because
early print in bypass mode is running before code binary is relocated
to the link address.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
- Disable NAND driver on bf537-stamp.
- Make MMC_SPI optional.
- Disable LCD driver on bf527-ezkit.
- Enlarge BF609 nor flash reserved size from 256k to 512k bytes.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
Add softswitch_output command for bf609-ezkit to enable softswitches.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Define core 1 L1 code sram start address.
Add function to enable core 1 for BF609 and BF561.
Add config macro to allow customer to run core 1 in uboot init code on core 0.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Enable VIDEO and NAND supports only when the config options is defined.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Using IP version for different setting
- Higher version supports 8bit mode
- Higher version bus width setting is different
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Add support for following features:
- nand boot, with PMECC 2bit ECC for 512 bytes sector
- SPI flash boot
- SD card boot
- LCD support
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix -Wimplicit-function-declaration for at91_lcd_hw_init()]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The define should not have been put in fdt.h originally, libfdt_env.h
is the proper place for target-specific customizations.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
This commit adds a license header to fdt.h and libfdt_env.h
because the license was omitted.
U-Boot note: the u-boot libfdt_env.h header portion was not applied to
the u-boot libfdt_env.h because that file was created by Gerald Van Baren
(with a license header). - gvb
Ref: DTC commit 27cdc1b1
Signed-off-by: Justin Sobota <jsobota@ti.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
This function is useful outside libfdt, so export it.
Ref: DTC commit b7aa300e
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
The boot parameters passed from SPL to UBOOT
must be saved as a part of uboot's gd data
as early as possible, before we will inadvertently
overwrite it. So adding a arch_cpu_init for the required
Socs to save it.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
[trini: Add igep0033 hunk]
Signed-off-by: Tom Rini <trini@ti.com>
The boot parameters are read from individual variables
assigned for each of them. This been corrected and now
they are stored as a part of the global data 'gd'
structure. So read them from 'gd' instead.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
[trini: Add igep0033 hunk]
Signed-off-by: Tom Rini <trini@ti.com>
these variables are curently defined in several config files but the
driver doesn't use them and defaults to hardcoded values in
nand_defs.h
It's interesting to be able to change this hardcoded valude when the
hardware is not using the default adress signals to drive ALE and CLE
and two configuration defines already exist for this purpose so use
them.
Signed-off-by: Eric Bénard <eric@eukrea.com>
Several minor updates to the cm-t35 config file.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Add the flag to allow runtime enviroment variable modifications.
This is being added so that the board-name can be modified at runtime
to indicate either a panda(4430) or a panda-es(4460)
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Fix the device tree loading for panda(4430) and panda-es(4460)
Modify the board name if a 4460 panda or panda-es is detected
at run time.
In the findfdt add a check for the panda-es board name and load
the panda-es device tree blob.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Warm reset on OMAP5 freezes when USB cable is connected.
Fix requires PRM_RSTTIME.RSTTIME1 to be programmed
with the time for which reset should be held low for the
voltages and the oscillator to reach stable state.
There are 3 parameters to be considered for calculating
the time, which are mostly board and PMIC dependent.
-1- Time taken by the Oscillator to shut + restart
-2- PMIC OTP times
-3- Voltage rail ramp times, which inturn depends on the
PMIC slew rate and value of the voltage ramp needed.
In order to keep the code in u-boot simple, have a way
for boards to specify a pre computed time directly using
the 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
option. If boards fail to specify the time, use a default
as specified by 'CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC' instead.
Using the default value translates into some ~22ms and should work in
all cases.
However in order to avoid this large delay hiding other bugs,
its recommended that all boards look at their respective data
sheets and specify a pre computed and optimal value using
'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
In order to help future board additions to compute this
config option value, add a README at doc/README.omap-reset-time
which explains how to compute the value. Also update the toplevel
README with the additional option and pointers to
doc/README.omap-reset-time.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[rnayak@ti.com: Updated changelog and added the README]
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
As part of a review of a recent patch to add a new AM335x board, Tom
found several duplicate and/or unused #defines.
This patch simply removes them.
The two affected configs have been recompiled to check nothing was
broken (from a compilation point of view !!)
Reported-by: Tom Rini <trini@ti.com>
Signed-off-by: Mark Jackson <mpfj-list@mimc.co.uk>
Add 'optargs' variable to be set to additional kernel arguments, similar
to omap3*/am3* usage.
Cc: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
The IGEP COM AQUILA and CYGNUS are industrial processors modules with
following highlights:
o AM3352/AM3354 Texas Instruments processor
o Cortex-A8 ARM CPU
o 3.3 volts Inputs / Outputs use industrial
o 256 MB DDR3 SDRAM / 128 Megabytes FLASH
o MicroSD card reader on-board
o Ethernet controller on-board
o JTAG debug connector available
o Designed for industrial range purposes
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
commit 21144298 (power: twl6035: add palmas PMIC support)
introduced twl6035_i2c_[read|write]_u8
Then, commit dd23e59d (omap5: pbias ldo9 turn on)
introduced palmas_[read|write]_u8 for precisely the same access
function. TWL6035 belongs to the palmas family, so instead of having
an twl6035 API, we could use an generic palmas API instead.
To stay consistent with the function naming of twl4030,6030 accessors,
we use palmas_i2c_[read|write]_u8
Cc: Balaji T K <balajitk@ti.com>
Cc: Sricharan R <r.sricharan@ti.com>
Reported-by: Ruchika Kharwar <ruchika@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Since TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs,
rename twl6035_mmc1_poweron_ldo by a more generic palmas_mmc1_poweron_ldo
function.
Signed-off-by: Nishanth Menon <nm@ti.com>
Since TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs,
rename twl6035_init_settings with an more generic palmas_init_settings
Signed-off-by: Nishanth Menon <nm@ti.com>
TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs
Rename twl6035 to palmas to allow reuse across multiple current and
future platforms
As part of this change, change the CONFIG_TWL6035_POWER to
CONFIG_PALMAS_POWER and update usage of header file accordingly.
Signed-off-by: Nishanth Menon <nm@ti.com>
twl6030_i2c_[read|write]_u8 can be used else where to access
multi-function device such as twl6030, so move the register access
functions to the common twl6030.h header file.
Signed-off-by: Nishanth Menon <nm@ti.com>
u-boot standard i2c read prototype is
i2c_read(addr, reg, 1, &buf, 1)
twl4030_i2c_read_u8(u8 addr, u8 *val, u8 reg)
does not provide consistency, so switch the prototype to be
consistent with rest of u-boot i2c operations:
twl4030_i2c_read_u8(u8 addr, u8 reg, u8 *val)
Signed-off-by: Nishanth Menon <nm@ti.com>
u-boot standard i2c register write prototype is
i2c_reg_write(u8 addr, u8 reg, u8 val)
twl4030_i2c_write_u8(u8 addr, u8 val, u8 reg)
does not provide consistency, so switch the prototype to be
consistent with rest of u-boot i2c operations:
twl4030_i2c_write_u8(u8 addr, u8 reg, u8 val)
Signed-off-by: Nishanth Menon <nm@ti.com>
Adds CPSW support to the TI814X EVM configured with
an ET1011C PHY in GMII mode.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Adds an ET1011C PHY driver which is derived from the
Linux kernel PHY driver (drivers/net/phy/et1011c.c)
from the v3.9-rc2 tag. Note that an errata workaround
config option is implemented to allow for TX_CLK to be
enabled even when gigabit mode is negotiated. This
workaround is used on the PG1.0 TI814X EVM.
Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
The 512 byte block size was hard coded in the ext4 file systems.
Large harddisks today support bigger block sizes typically 4096
bytes.
This patch removes this limitation.
Signed-off-by: Egbert Eich <eich@suse.com>
Microblaze uses gpio which is connected to the system reset.
Currently gpio subsystem wasn't used for it.
Add gpio driver and change Microblaze reset logic to be done
via gpio subsystem.
There are various configurations which Microblaze can have
that's why gpio_alloc/gpio_alloc_dual(for dual channel)
function has been introduced and gpio can be allocated
dynamically.
Adding several gpios IP is also possible and supported.
For listing gpio configuration please use "gpio status" command
This patch also remove one compilation warning:
microblaze-generic.c: In function 'do_reset':
microblaze-generic.c:38:47: warning: operation on '*1073741824u'
may be undefined [-Wsequence-point]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Most of time that MMC driver spends on initializing a device is polling
OCR (operation conditions register). To decouple this polling loop,
device init is split into two parts: The first part fires the OCR query
command, and the second part polls the result. So the caller is now no
longer bound to the OCR-polling delay; he may fire the query, go
somewhere and then come back later for the result.
To use this, call mmc_set_preinit() on any device which needs this.
This can save significant amounts of time on boot (e.g. 200ms) by
hiding the MMC init time behind other init.
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
All these macros are completely unused by any code.
CONFIG_FPGA is not a bitfield anymore.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Ensure that wrong bitstream won't be loaded
to current device.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Devcfg device requires to load bitstream in binary format.
But u-boot also has an option for loading bitstream in bit
format. Let's handle both cases by zynqpl driver.
Also add suport for loading partial bitstreams.
The first driver version was done by:
Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
All fpga functions use devnum as int. Only fpga_loadbitstream
is using it as unsinged long dev.
This patch synchronize it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
In bitstream decoding you can directly check device
which you want to load and in fpga.c are fpga_validate
and fpga_dev_info functions which should be used for it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
We can use a common global method for calculating minimum of
3 numbers. Put the same in 'common header' and let 'ehci'
use it.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Tom Rini <trini@ti.com>
Fix the Port status bit constants and Port feature number
constants as a part of USB 2.0 and USB 3.0 Hub class.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
This adds usb framework support for super-speed usb, which will
further facilitate to add stack support for xHCI.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Some cleanup in usb framework, nothing much on feature side.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
This patch adds a new 'usb test' command, that will set a port to a USB
2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes
on both downstream hub ports and ordinary device's upstream ports. In
addition, it supports EHCI root hub ports.
Signed-off-by: Julius Werner <jwerner@chromium.org>
This patch adds a driver for the diskonchip G4 nand flash device. It is based
on the driver from the linux kernel.
This also includes a separate SPL driver. A separate SPL driver is used because
the device operates in a different mode (reliable mode) when loading a boot
image, and also because the storage format of the boot image is different from
normal data (pages are stored redundantly). The SPL driver basically mimics how
a typical IPL reads data from the device. The special operating mode and
storage format are used to compensate for the fact that the IPL does not contain
the BCH ecc decoding algorithm (due to size constraints). Although the u-boot
SPL *could* use ecc, it operates like an IPL for the sake of simplicity and
uniformity, since the IPL and SPL share the task of loading the u-boot image.
As a side benefit, the SPL driver is very small.
[port from linux kernel 3.4 commit 570469f3bde7f71cc1ece07a18d54a05b6a8775d]
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
This patch adds the bitrev library from the linux kernel. This is a simple
algorithm that uses an 8 bit look-up table to reverse the bits in data types of
8, 16, or 32 bit widths. The docg4 nand flash driver uses it.
[port from linux kernel v3.9 commit 7ee32a6d30d1c8a3b7a07a6269da8f0a08662927]
[originally added: v2.6.20 by commit a5cfc1ec58a07074dacb6aa8c79eff864c966d12]
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Legacy iomux support is no longer needed now that all boards have been converted
to iomux-v3.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add basic support for the DENX M53EVK board. Currently supported is:
MMC (incl. booting)
NAND (incl. booting)
Ethernet, I2C, USB, SATA, RTC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
With the u-boot-with-spl.bin rule calling $(OBJCOPY) with
CONFIG_SPL_PAD_TO, and CONFIG_SPL_PAD_TO defaulting to
CONFIG_SPL_MAX_SIZE we cannot use math here, so set it to 4096 rather
than 4 * 1024.
Signed-off-by: Tom Rini <trini@ti.com>
The Hydra and Superhydra (P3041DS, P5020DS, and P5040DS) boards have a
second USB port that can be configured in either host, peripheral (aka
device), or OTG (on-the-go) mode. When configured in host mode, if
the port is connected to another USB host, damage to the board can
occur.
To avoid this, we change the default setting to peripheral mode. Ideally,
we'd set it to OTG mode, but currently there is no OTG support for
these boards.
Setting the hwconfig variable will also update the device tree, and so
Linux will configure the port for peripheral mode as well.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add defines needed to access NAND, remove second flash bank that is
actually connected to NAND.
Add nand booting support for P1022DS with hardcoded DDR config using
SPL framework from 2011
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The changes to a3m071/a4m2k in summary are:
- Enable CAN1 on I2C in GPS Port Configuration
- Enable SPI on PSC2
- Activate network console
- New flash partitioning
- Fix some typos
- Pass host name to Linux
- Change rootfs to squashfs,jffs2
- Enable UBI/UBIFS support
- Enable FIT support
Signed-off-by: Stefan Roese <sr@denx.de>
The v2013.04 release has this patch set included:
5cb48582 "Add architecture-specific global data"
With this, the global_data struct is now common and new variables
have been added. Resulting in a bigger struct. Unfortunately the
currently allocated 128 bytes are just a bit too small for this
new struct.
This patch now uses the automatically generated struct size instead to
not run into this problem again.
Please note that this problem might hit some other platforms which
currently reserve a tight space of 128 bytes for the global_data
struct!
Signed-off-by: Stefan Roese <sr@denx.de>
The redundancy related defines are only correct for NAND, so guard all
of that area with CONFIG_ENV_IS_IN_NAND
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Tom Rini <trini@ti.com>
In order to use the generic hang() later on pull libgeneric in SPL.
This has no impact on the SPL size.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
In order to use the generic hang() later on pull libgeneric in SPL.
This has no impact on the SPL size.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
log2 of the device block size serves as the shift value used to calculate
the block number to read in file systems when implementing avaiable block
sizes.
It is needed quite often in file systems thus it is pre-calculated and
stored in the block device descriptor.
Signed-off-by: Egbert Eich <eich@suse.com>
For ISO we check the block size of the device if this is != the CD sector
size we assume that the device has no ISO partition.
Signed-off-by: Egbert Eich <eich@suse.com>
Disks beyond 2T in size use blocksizes of 4096 bytes. However a lot of
code in u-boot still assumes a 512 byte blocksize.
This patch fixes the handling of GPTs.
Signed-off-by: Egbert Eich <eich@suse.com>
The number 512 appears quite a bit in the mmc code. Add a constant for this
so that it can be used here and in other parts of the code (e.g. SPL code
which loads from mmc).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
When CONFIG_REGEX is enabled, the new option "-e" becomes available
which causes regular expression matches to be used. This allows for
example things like these:
- print all MAC addresses:
=> env grep -e eth.*addr
eth1addr=00:10:ec:80:c5:15
ethaddr=00:10:ec:00:c5:15
- print all variables that have at least 2 colons in their value:
=> env grep -v -e :.*:
addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off
panic=1
eth1addr=00:10:ec:80:c5:15
ethaddr=00:10:ec:00:c5:15
ver=U-Boot 2013.04-rc1-00289-g497746b-dirty (Mar 22 2013 - 12:50:25)
etc.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Downloaded from http://slre.sourceforge.net/
and adapted for U-Boot environment.
Used to implement regex operations on environment variables.
Code size is ~ 3.5 KiB on PPC.
To enable this code, define the CONFIG_REGEX option in your board
config file.
Note: There are more recent versions of the SLRE library available at
http://slre.googlecode.com ; unfortunately, the new code has a heavily
reorked API which makes it less usable for our purposes:
- the return code is strings, which are more difficult to process
- we don't get any information any more which sub-string of the data
was matched by the given regex
- it is much more cumbersome to work with arbitrary expressions, where
for example the number of substrings for capturing are not known at
compile time
Also, there does not seem to be any real changes or improvements of
the functionality.
Because of this, we deliberately stick with the older code.
Note 2: the test code (built when SLRE_TEST is defined) was modified
to allow for more extensive testing; now we can test the regexp
matching on all lines on a text file (instead of the whole data in the
file as a single block).
Signed-off-by: Wolfgang Denk <wd@denx.de>
The output of "env grep" is unsorted, and printing is done by a
private implementation to parse the hash table. We have all the
needed code in place in hexport_r() alsready, so let's use this
instead. Here we prepare the code for this, without any functional
changes yet.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This allows write of files from the host filesystem in sandbox. There is
currently no concept of overwriting the file and removing its existing
contents - all writing is done on top of what is there. This means that
writing 10 bytes to the start of a 1KB file will only update those 10
bytes, not truncate the file to 10 byte slong.
If the file does not exist it is created.
Signed-off-by: Simon Glass <sjg@chromium.org>
This conversion is required in a number of places in U-Boot. Add a
standard function to provide this feature, so we avoid all the different
variations in the way it is coded.
Signed-off-by: Simon Glass <sjg@chromium.org>
With sandbox it is tricky to add an FDT to the image at build time (or
later) since we build an ELF file, not a plain binary, and the address
space of the whole U-Boot is not accessible in the emulated memory map
of sandbox.
Sandbox can read files directly from the host, though, so add an option
to read an FDT from a host file on start-up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add generic board support for sandbox. and remove the old board init code.
Select CONFIG_SYS_GENERIC_BOARD for sandbox now that this is supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
In many cases, pointers to memory are passed around, and these pointers
refer to U-Boot memory, not host memory. This in itself is not a
problem.
However, in a few places, we cast that pointer back to a ulong (being
a U-Boot memory address). It is possible to convert many of these cases
to avoid this. However there are data structures (e.g. struct
bootm_headers) which use pointers. We could with a lot of effort adjust
the structs and all code that uses them to use ulong instead of pointers.
This seems like an unacceptable cost, since our objective with sandbox
is to minimise the impact on U-Boot code while maximising the features
available to sandbox.
Therefore, create a map_to_sysmem() function which converts from a
pointer to a U-Boot address. This can be used sparingly when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Avoid overwriting GEMx_RCLK_CTRL and GEMx_CLK_CTRL
if the Ethernet interface is connect on EMIO
Do not enable emio for this standard board configuration for now.
Signed-off-by: David Andrey <david.andrey@netmodule.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Pass the PHY address to the driver init to
allow parallel use of both interfaces
Signed-off-by: David Andrey <david.andrey@netmodule.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Add all fixed addresses to hardware.h and change petalinux
configuration to support this.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Move baseaddr to hardware.h to be shared between
configurations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Watchdog can be used on Microblaze, PPC and Zynq hw designs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Setup environment and enable netconsole.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Make all mpc512x code point to the new common fsl_iim driver, and remove the
former mpc512x-specific iim driver.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
This reworks the environment settings to be aligned with the other
i.MX boards. The loadaddr has been changed to allow the Freescale
kernel and mainline kernel to work without environment changes.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
FSL 2.6.35 kernel expects that revision tag is passed by the bootloader.
Select CONFIG_REVISION_TAG so that mx53 boards can work properly with 2.6.35.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Currently mmcrootfstype is set to ext3 type.
It is better not to force it in the env vars, because users may prefer a
different file system type, so let's get rid of 'mmcrootfstype'.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Update the environment as done in other imx boards to allow easy switching
between booting a non-dt kernel and a dt kernel.
Change CONFIG_LOADADDR to 0x92000000, so that we can have the:
- uImage at 0x92000000
- imx51-babbage.dtb at 0x91000000
,which are adequate locations in RAM to avoid overlapping.
Boot tested the following kernels:
- 2.6.35 from FSL (11.09 branch)
- 3.9-rc7 non-dt
- 3.9-rc7 dt
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Adds support for 'bmode' command which let user to choose where to
boot from; this allows U-Boot to load system from another storage
without messing with jumpers.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Allow use of the carrier board MicroSD card available in the
Wandboard; this allow for loading alternative system from the other
card for testing or upgrade proposes.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This makes environment and mmcdev/mmcpart in sync with SYS_MMC_ENV_DEV
and SYS_MMC_ENV_PART settings.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Titanium is a i.MX6 based board from ProjectionDesign / Barco. This
patch adds support for this board with the newly introduced NAND
support for i.MX6.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
This patch adds the fast booting LWMON5 derivat "lcd4_lwmon5".
Its a stripped down version of the full blown lwmon5 support,
without ECC, USB, POST and some other stuff. It used the newly
introduced SPL infrastrucure for SPL from NOR flash booting
on the PPC4xx.
By setting the environment variable "boot_os" to "yes", Linux
will be started from the SPL version. If not, the "normal"
U-Boot will be started.
Signed-off-by: Stefan Roese <sr@denx.de>
Quick manual fixup to merge the USB boot related defines and TPM related
defines.
Conflicts:
include/configs/exynos5250-dt.h
Signed-off-by: Tom Rini <trini@ti.com>
Support to check whether the SD3.0 or not.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Rommel Custodio <sessyargc@gmail.com>
eMMC vesrion is supported up to v4.5.
But bootloader isn't saw the exact eMMC version.
After applied this patch,
if use the mmcinfo command, then can see the exactly mmc version.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Rommel Custodio <sessyargc@gmail.com>
The ARM errata 742230 - "ARM errata: DMB operation may be faulty" is
claimed for Cortex-A9 (r1p0..r2p2). Though i.MX6 uses a newer revision
than r2p2, we are seeing a reboot failure on i.MX6 SMP build that can be
fixed by applying the workaround for this errata. So for safety, let's
define CONFIG_ARM_ERRATA_742230 to enable the workaround on i.MX6.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Exynos5250 supports secondary USB device boot mode. If the iROM fails
to download u-boot from the primary boot device (such as SD or eMMC),
it will try to retrieve from the secondary boot device (such as USB).
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
this is usefull when writing an UBI image which contains
and UBIFS volume (check README.nand and UBI FAQ for more details)
Signed-off-by: Eric Bénard <eric@eukrea.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Since the ICH SPI controller uses PCI, we must ensure that PCI is available
before it is inited.
This fixes the current "ICH SPI: Cannot find device" message on boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu.
Add a Beaver build so it can begin to be differentiated, if need be.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Boot script support brings TEC in line with other Tegra boards. To
enable booting a Linux kernel with initial ramdisk, also include support
for the new FIT image type.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Boot script support brings Plutux in line with other Tegra boards. In
order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Boot script support brings Medcom-Wide in line with other Tegra boards.
In order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Some 3rd-party flash tools use the -v (verify) option of crc32 command.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
This target wants to check full SPL size, BSS included.
Remove CONFIG_SPL_MAX_SIZE definition and instead define
CONFIG_SPL_MAX_FOOTPRINT.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
This target wants to check full SPL size, BSS included.
Remove CONFIG_SPL_MAX_SIZE definition and instead define
CONFIG_SPL_MAX_FOOTPRINT.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
This target wants to check full SPL size, BSS included.
Remove CONFIG_SPL_MAX_SIZE definition and instead define
CONFIG_SPL_MAX_FOOTPRINT.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Remove SPL-related ASSERT() in arch/arm/cpu/u-boot.lds
as this file is never used for SPL builds.
Rewrite the ASSERT() in arch/arm/cpu/u-boot-spl.lds
to separately test image (text,data,rodata...) size,
BSS size, and full footprint each against its own max,
and make Tegra boards check full footprint.
Also, output section mmutable is not used in SPL builds.
Remove it.
Finally, update README regarding the (now homogeneous)
semantics of CONFIG_SPL_[BSS_]MAX_SIZE and add the new
CONFIG_SPL_MAX_FOOTPRINT macro.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reported-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Rework the waiting for transfer completion loop condition
to continue waiting until both Transfer Complete and DMA End
interrupts occur. Checking of DLA bit in Present State register
looks not needed in addition to interrupts status checking,
so it can be removed from the condition. Also, DMA Error
condition is added to the list of data errors, checked in the loop.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
TPM command library implements a subset of TPM commands defined in TCG
Main Specification 1.2 that are useful for implementing secure boot.
More TPM commands could be added out of necessity.
You may exercise these commands through the 'tpm' command. However, the
raw TPM commands are too primitive for writing secure boot in command
interpreter scripts; so the 'tpm' command also provides helper functions
to make scripting easier.
For example, to define a counter in TPM non-volatile storage and
initialize it to zero:
$ tpm init
$ tpm startup TPM_ST_CLEAR
$ tpm nv_define d 0x1001 0x1
$ tpm nv_write d 0x1001 0
And then increment the counter by one:
$ tpm nv_read d 0x1001 i
$ setexpr.l i $i + 1
$ tpm nv_write d 0x1001 $i
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Add a driver for the I2C TPM from Infineon.
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This enables the device tree library on the Integrator platforms
so we can pass a device tree when booting.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As this board has NAND and supports YAFFS2, add CONFIG_MD_NAND_YAFFS
Cc: David Müller <d.mueller@elsoft.ch>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: David Müller <d.mueller@elsoft.ch>
This board is from a u-boot point of view a mixture between kmnusa and
a standard km_kirkwood board. We have our u-boot environment in the spi
NOR flash, but we have a direct connection between the kirkwood and the
piggy. A FPGA is connected via the PCIe interface. So we only have to
select the specific features in the board setup.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
The conversion of mx31pdk to SPL NAND fixed the boot issue, but we start seeing
resets in loop, which prevents us from reaching the U-boot prompt.
Until the proper fix can be identified, disable watchdog, so that mx31pdk
can be functional again.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so
remove associated code. It will still be possible to restore it later from the
Git history if necessary.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
The migration of boards from Makefile to boards.cfg was due for v2012.03, but
smdk6400 did not follow, and it does not build, so move it to scrapyard. It will
still be possible to restore it from the Git history before fixing it.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Commit e05e5de7fa made the 2 1st parameters of
ARM's relocate_code() useless since it moved the code handling them to crt0.S.
So, drop these parameters.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
This also fixes support for mx31pdk and tx25, which had been broken by commit
e05e5de7fa.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Change CONFIG_SPL_PAD_TO from a link address to an image offset since this is
more handy and closer to the purpose of this config.
Automatically define CONFIG_SPL_PAD_TO to CONFIG_SPL_MAX_SIZE (or 0 without
CONFIG_SPL_MAX_SIZE).
Test that CONFIG_SPL_PAD_TO >= CONFIG_SPL_MAX_SIZE if CONFIG_SPL_PAD_TO is
non-zero.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Commit e05e5de7fa made ARM's relocate_code()
return to its caller, but it did not update its declaration accordingly.
Fixing this function declaration fixes dropped C code following calls to
relocate_code().
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Add support for the Samsung K9LAG08U0M NAND Flash (2-GiB MLC NAND Flash, 2-kiB
pages, 256-kiB blocks, 30-ns R/W cycles, 1 CS) on mx53ard.
eNFC_CLK_ROOT is set up with a cycle time of 37.5 ns (400 MHz / 3 / 5) for this
board, which satisfies the 30-ns NF R/W cycle requirement.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Add some abstraction to NFC definitions so that some parts of the current code
can also be used for future i.MX5 code.
Clean up a few things by the way.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
UBI is a better place for the environment on NAND devices because it
handles wear-leveling and bad blocks.
Gluebi is needed in Linux to access the env as an MTD partition.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
