mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-10-02 09:30:43 +09:00
m28evk: white space cleanup
Change all "#define<TAB>" sequences into "#define<SPACE>" Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Wolfgang Denk
Tom Rini
parent
855f18ea0e
commit
5f71bca74b
@ -23,71 +23,71 @@
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/*
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* SoC configurations
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*/
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#define CONFIG_MX28 /* i.MX28 SoC */
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#define CONFIG_MXS_GPIO /* GPIO control */
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#define CONFIG_SYS_HZ 1000 /* Ticks per second */
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#define CONFIG_MX28 /* i.MX28 SoC */
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#define CONFIG_MXS_GPIO /* GPIO control */
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#define CONFIG_SYS_HZ 1000 /* Ticks per second */
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/*
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* Define M28EVK machine type by hand until it lands in mach-types
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*/
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#define MACH_TYPE_M28EVK 3613
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#define MACH_TYPE_M28EVK 3613
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#define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
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#define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
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#include <asm/arch/regs-base.h>
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_ARCH_MISC_INIT
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/*
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* SPL
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*/
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#define CONFIG_SPL
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#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
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#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
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#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL
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#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
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#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
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#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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/*
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* U-Boot Commands
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*/
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#include <config_cmd_default.h>
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DOS_PARTITION
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_GPIO
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SETEXPR
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_SPI
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_GPIO
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_NFS
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SETEXPR
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_SPI
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#define CONFIG_CMD_USB
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/*
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* Memory configurations
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x40000000 /* Base address */
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#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
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#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
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#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
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#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x40000000 /* Base address */
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#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
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#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
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#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
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#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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/* Point initial SP in SRAM so SPL can use it too. */
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#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
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@ -102,42 +102,42 @@
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* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
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* binary. In case there was more of this mess, 0x100 bytes are skipped.
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*/
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#define CONFIG_SYS_TEXT_BASE 0x40000100
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#define CONFIG_SYS_TEXT_BASE 0x40000100
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/*
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* U-Boot general configurations
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*/
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_PROMPT "=> "
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
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#define CONFIG_SYS_PBSIZE \
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_PROMPT "=> "
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Print buffer size */
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#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/* Boot argument buffer size */
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#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
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#define CONFIG_AUTO_COMPLETE /* Command auto complete */
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#define CONFIG_CMDLINE_EDITING /* Command history etc */
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
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#define CONFIG_AUTO_COMPLETE /* Command auto complete */
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#define CONFIG_CMDLINE_EDITING /* Command history etc */
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#define CONFIG_SYS_HUSH_PARSER
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/*
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* Serial Driver
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*/
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#define CONFIG_PL011_SERIAL
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#define CONFIG_PL011_CLOCK 24000000
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#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
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#define CONFIG_CONS_INDEX 0
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#define CONFIG_BAUDRATE 115200 /* Default baud rate */
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#define CONFIG_PL011_SERIAL
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#define CONFIG_PL011_CLOCK 24000000
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#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
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#define CONFIG_CONS_INDEX 0
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#define CONFIG_BAUDRATE 115200 /* Default baud rate */
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/*
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* MMC Driver
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*/
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_MMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_GENERIC_MMC
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#define CONFIG_MXS_MMC
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#define CONFIG_MMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_GENERIC_MMC
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#define CONFIG_MXS_MMC
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#endif
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/*
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@ -148,31 +148,31 @@
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/*
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* NAND
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*/
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#define CONFIG_ENV_SIZE (16 * 1024)
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#define CONFIG_ENV_SIZE (16 * 1024)
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_MXS
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x60000000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_NAND_MXS
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x60000000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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/* Environment is in NAND */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_ENV_RANGE (512 * 1024)
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#define CONFIG_ENV_OFFSET 0x300000
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#define CONFIG_ENV_OFFSET_REDUND \
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_ENV_RANGE (512 * 1024)
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#define CONFIG_ENV_OFFSET 0x300000
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#define CONFIG_ENV_OFFSET_REDUND \
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(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define MTDIDS_DEFAULT "nand0=gpmi-nand"
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#define MTDPARTS_DEFAULT \
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define MTDIDS_DEFAULT "nand0=gpmi-nand"
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#define MTDPARTS_DEFAULT \
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"mtdparts=gpmi-nand:" \
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"3m(bootloader)ro," \
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"512k(environment)," \
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@ -182,34 +182,34 @@
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"8m(ramdisk)," \
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"-(filesystem)"
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#else
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#define CONFIG_ENV_IS_NOWHERE
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#define CONFIG_ENV_IS_NOWHERE
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#endif
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/*
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* Ethernet on SOC (FEC)
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*/
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#ifdef CONFIG_CMD_NET
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#define CONFIG_ETHPRIME "FEC0"
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_ETHPRIME "FEC0"
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define CONFIG_FEC_XCV_TYPE RMII
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#endif
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/*
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* I2C
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*/
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_I2C_MXS
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 400000
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#define CONFIG_I2C_MXS
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 400000
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#endif
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/*
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* EEPROM
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*/
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#ifdef CONFIG_CMD_EEPROM
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#define CONFIG_SYS_I2C_MULTI_EEPROMS
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_I2C_MULTI_EEPROMS
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#endif
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/*
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@ -217,13 +217,13 @@
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*/
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#ifdef CONFIG_CMD_DATE
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/* Use the internal RTC in the MXS chip */
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#define CONFIG_RTC_INTERNAL
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#define CONFIG_RTC_INTERNAL
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#ifdef CONFIG_RTC_INTERNAL
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#define CONFIG_RTC_MXS
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#define CONFIG_RTC_MXS
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#else
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#define CONFIG_RTC_M41T62
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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#define CONFIG_SYS_M41T11_BASE_YEAR 2000
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#define CONFIG_RTC_M41T62
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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#define CONFIG_SYS_M41T11_BASE_YEAR 2000
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#endif
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#endif
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@ -231,59 +231,59 @@
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* USB
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MXS
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MXS
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#define CONFIG_EHCI_MXS_PORT0
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#define CONFIG_EHCI_MXS_PORT1
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_USB_STORAGE
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_USB_STORAGE
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#endif
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/*
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* SPI
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*/
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#ifdef CONFIG_CMD_SPI
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#define CONFIG_HARD_SPI
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#define CONFIG_MXS_SPI
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#define CONFIG_SPI_HALF_DUPLEX
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#define CONFIG_DEFAULT_SPI_BUS 2
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#define CONFIG_DEFAULT_SPI_CS 0
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#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
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#define CONFIG_HARD_SPI
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#define CONFIG_MXS_SPI
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#define CONFIG_SPI_HALF_DUPLEX
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#define CONFIG_DEFAULT_SPI_BUS 2
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#define CONFIG_DEFAULT_SPI_CS 0
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#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
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/* SPI FLASH */
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#ifdef CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_SF_DEFAULT_BUS 2
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 40000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_SF_DEFAULT_BUS 2
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 40000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_ENV_SPI_BUS 2
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#define CONFIG_ENV_SPI_CS 0
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#define CONFIG_ENV_SPI_MAX_HZ 40000000
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#define CONFIG_ENV_SPI_MODE SPI_MODE_0
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#define CONFIG_ENV_SPI_BUS 2
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#define CONFIG_ENV_SPI_CS 0
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#define CONFIG_ENV_SPI_MAX_HZ 40000000
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#define CONFIG_ENV_SPI_MODE SPI_MODE_0
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#endif
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#endif
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/*
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* Boot Linux
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*/
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTFILE "uImage"
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#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
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#define CONFIG_BOOTCOMMAND "run bootcmd_net"
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#define CONFIG_LOADADDR 0x42000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTFILE "uImage"
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#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
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#define CONFIG_BOOTCOMMAND "run bootcmd_net"
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#define CONFIG_LOADADDR 0x42000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_OF_LIBFDT
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/*
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* Extra Environments
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"update_nand_full_filename=u-boot.nand\0" \
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"update_nand_firmware_filename=u-boot.sb\0" \
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"update_sd_firmware_filename=u-boot.sd\0" \
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