Remove macros which use PM_SIP_SVC offset and convert invoke_smc() to
xilinx_pm_request() which do calculation with PM_SIP_SVC already.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
versal_pm_request() and invoke_smc() are almost the same. Only one
difference is that versal_pm_request is adding PM_SIP_SVC offset to api_id.
The patch is moving platform implementation to firmware driver code for
synchronization.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
To allow OCRAM to be used as wakeup source in
deep sleep, do not power it down.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The patch adds an errata ID A-008646 for workaround
to provide more information by errata ID.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
LX2160A/LX2120A/LX2080A SVR value should be
0x873600/0x873620/0x873602
Previous values were valid only if CAN fuse is blown.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
ls1028a has 4 personalities: ls1028a, ls1027a, ls1017a and ls1018a.
Both ls1027a and ls1017a personalities are lower functionality version
which doesn't support the multimedia subsystems, like LCD, GPU.
To disable multimedia feature on non-multimedia version,
set the status property to disabled in dts nodes.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Program register bit of SCFG_SNPCNFGCR_USBxRDSNP and
SCFG_SNPCNFGCR_USBxWRSNP(x = 1, 2, 3) to drive USBx read/write
snoop signal on LS1043A and LS1046A.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add LS1027A, LS1018A and LS1017A personalities support to
LS1028A SoC family.
LS1028A is the prime personality of LS1028A SoC family.
LS1027A is a lower funtionality version of QorIQ LS1028A
which does not support the multimedia subsystems, such as LCD
controller, GPU, and eDP PHY.
The QorIQ LS1018A and LS1017A SoCs are single 64-bit Arm A72
core, low power versions of the QorIQ LS1028A and LS1027A
SoCs respectively.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Rename meson-g12a-u-boot.dtsi into meson-g12-common-u-boot.dtsi to
match the new DT architecture and add meson-sm1-sei610-u-boot.dtsi
to handle the U-Boot specific DT for graphics.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Values imported from Linux driver, but in correct numeric order.
Khadas VIM3 prints: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
Cc: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Write SoC instead of Soc. The Linux driver is not affected.
Fixes: f41d723b9f ("ARM: meson: display Amlogic SoC Information")
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
In Linux meson-g12-common.dtsi was introduced as well as new g12b nodes
and headers, as dependencies of new meson-g12b-a311d-khadas-vim3.dts.
Copied from da0c9ea146cb ("Linux 5.4-rc2")
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Like the meson-gx support, add the U-Boot specific bits in DT
to support graphics on G12A SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
If VIDEO_MESON is enabled, we need to setup the fdt for the framebuffer.
Call meson_vpu_rsv_fb() which reserves the framebuffer memory region for
EFI, and sets up simple-framebuffer nodes if simplefb support is
enabled.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
U-Boot cannot be built for h2200_defconfig with CONFIG_DM=y.
The maintainer Lukasz Dalek suggested to remove the board.
https://lists.denx.de/pipermail/u-boot/2019-August/380685.html
Cc: Lukasz Dalek <luk0104@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[trini: As this is the last non-toradex PXA board, update travis too]
Signed-off-by: Tom Rini <trini@konsulko.com>
-------------------
Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/597498628
- logicpd pinmux
- i.MX7ULP: imx_ddr_size
- fixes Toradex i.MX6/i.MX7
- pico-imx7d
- tpc70 converted to DM
- New Board: meerkat96
- add HAB version command
- i.MX8 :
imx8: Jump from alias to OCRAM address at SPL init
imx8qm/qxp: Set SPL TEXT base to OCRAM base
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Merge tag 'u-boot-imx-20191014' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20191014
-------------------
Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/597498628
- logicpd pinmux
- i.MX7ULP: imx_ddr_size
- fixes Toradex i.MX6/i.MX7
- pico-imx7d
- tpc70 converted to DM
- New Board: meerkat96
- add HAB version command
- i.MX8 :
imx8: Jump from alias to OCRAM address at SPL init
imx8qm/qxp: Set SPL TEXT base to OCRAM base
- Add sdhci driver for Broadcom iProc platform
- Add a driver callback for power-cycle for mmc
- Implement host_power_cycle callback for stm32_sdmmc2
- spl: dm_mmc: Initialize only the required mmc device
THe RVT data includes a major and minor version in its header
parameter. Add a new command to print this out.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
i.MX7ULP uses the same MMDC controller IP as found on i.MX53
and i.MX6, so build mmdc_size.c for i.MX7ULP as well.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
The original imx_ddr_size() implementation had some
issues reported by checkpatch like this:
CHECK: Prefer kernel type 'u32' over 'uint32_t'
#127: FILE: arch/arm/mach-imx/mmdc_size.c:16:
+ uint32_t ctl;
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
#151: FILE: arch/arm/mach-imx/mmdc_size.c:40:
+ unsigned ctl = readl(&mem->ctl);
Fix all of them.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Place imx_ddr_size() into a separate file.
The motivation for doing this is to be able to easily reuse
imx_ddr_size() on i.MX7ULP.
Currently imx_ddr_size() is inside arch/arm/mach-imx/cpu.c, which
is not built for i.MX7ULP.
Changing the logic to allow building cpu.c for i.MX7UP would
require adding several ifdef's, leading to a not a very elegant
solution.
To allow better reuse, just place imx_ddr_size() into a common
mmdc_size.c file.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
The new class dsi host allows the management of the bridge DPI to DSI.
This bridge is embedded in the chipset mp1 (come from synopsys company).
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
The new class dsi host allows the management of the bridge DPI to DSI.
This bridge is embedded in the chipset mp1 (come from synopsys company).
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
When running SPL on iMX8, the A core starts at address 0
which is a alias to OCRAM 0x100000.
The alias only map first 96KB of OCRAM, so this require the
SPL size can't beyond 96KB. But when using SPL DM, the size increase
significantly and may exceed 96KB.
So to fix the problem, we will change SPL linker address to OCRAM
address 0x100000. And then jump to the absolute address not the PC relative
address for entering OCRAM.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
This patch converts the TPC70 to use driver model and device tree
description in both SPL and u-boot proper.
Notable changes (DM/DTS conversion):
- PINCTRL{_IMX6}
- DM_I2C
- enable 'regulator' and 'pmic' commands
- DM_MMC and BLK (USDHC)
- DM_ETH
- DM WDT (including SYSRESET)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit adds new file - imx6q-kp-u-boot.dtsi with a set of u-boot
specific properties for imx6q KP device.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
With the 256KB of OCRAM available to SPL now, there should be
enough room to enable the pinmuxing in SPL from the device tree.
This patch enables SPL_PINCTRL et al and adds the serial and
usdhc pin mux references to the -u-boot.dtsi file so the pins can be
configured from the device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of
96Boards community and complies with all Consumer Edition board
specifications.
https://www.novtech.com/products/meerkat96.htmlhttps://www.96boards.org/product/imx7-96/
The initial supported/tested devices include:
- Debug serial
- SD
- USB Host (with Ethernet)
With these support, it's good enough for loading Linux Kernel from SD or
Ethernet over USB.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
If an exception occurs in a loaded image and the relocation offset is
unknown, it is helpful to know the instructions pointed to by the
program counter. This patch adds the missing output.
A possible output is:
Code: 910c4021 aa1303e0 f9400662 d63f0040 (e7f7defb)
The parentheses indicate the instruction causing the exception.
The output can be disassembled using scripts/decodecode:
echo 'Code: 90000360 9100b800 94002782 17ffff8f (e7f7defb)' | \
ARCH=arm64 scripts/decodecode
Code: 90000360 9100b800 94002782 17ffff8f (e7f7defb)
All code
========
0: 90000360 adrp x0, 0x6c000
4: 9100b800 add x0, x0, #0x2e
8: 94002782 bl 0x9e10
c: 17ffff8f b 0xfffffffffffffe48
10:* e7f7defb .inst 0xe7f7defb ; undefined <-- trapping instruction
Code starting with the faulting instruction
===========================================
0: e7f7defb .inst 0xe7f7defb ; undefined
We already have implemented the same for armv7.
For testing command 'exception undefined' can be used.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
readb is unconditionally defined earlier in io.h, so there's no point
checking whether it's undefined.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
No ARM board seems to define __mem_pci - and if it did, one would get tons of
./arch/arm/include/asm/io.h:307:0: warning: "readl" redefined
warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first definitions have. So I'm guessing this is practically
dead code.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
If there is any failure during IOdelay recalibration sequence, IOs are
not guaranteed to behave as expected. So hang on any failure during the
sequence.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
When an error is reported in __recalibrate_iodelay_start(), de-isolation
of IO doesn't happen. Because of this, undefined behaviour is observed
on many peripherals without any error. So make sure io is out of isolation
at the end of iodelay recalibration.
Reported-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Main uart0 is used as debug console by both R5SPL and A72 bootloader and
Linux. So mark it as shared device so that power-domain request is
successful by both cores.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
AM335x-ICE boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
AM43xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
AM57xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
