mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
arm: remove the H2200 board
U-Boot cannot be built for h2200_defconfig with CONFIG_DM=y. The maintainer Lukasz Dalek suggested to remove the board. https://lists.denx.de/pipermail/u-boot/2019-August/380685.html Cc: Lukasz Dalek <luk0104@gmail.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> [trini: As this is the last non-toradex PXA board, update travis too] Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Heinrich Schuchardt
Tom Rini
parent
bb63363f2a
commit
cb578f0a87
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@ -242,7 +242,7 @@ matrix:
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- BUILDMAN="sun50i"
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- name: "buildman catch-all ARM"
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env:
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- BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,k3,xilinx"
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- BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,rockchip,toradex,socfpga,k2,k3,xilinx"
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- name: "buildman sandbox x86"
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env:
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- BUILDMAN="sandbox x86"
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@ -253,9 +253,6 @@ matrix:
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- name: "buildman mvebu"
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env:
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- BUILDMAN="mvebu"
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- name: "buildman PXA (non-toradex)"
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env:
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- BUILDMAN="pxa -x toradex"
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- name: "buildman m68k"
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env:
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- BUILDMAN="m68k"
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@ -1502,9 +1502,6 @@ config TARGET_LS1046AFRWY
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The LS1046A Freeway Board (FRWY) is a high-performance
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development platform that supports the QorIQ LS1046A
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Layerscape Architecture processor.
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config TARGET_H2200
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bool "Support h2200"
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select CPU_PXA
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config TARGET_COLIBRI_PXA270
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bool "Support colibri_pxa270"
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@ -1812,7 +1809,6 @@ source "board/freescale/mx35pdk/Kconfig"
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source "board/freescale/s32v234evb/Kconfig"
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source "board/grinn/chiliboard/Kconfig"
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source "board/gumstix/pepper/Kconfig"
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source "board/h2200/Kconfig"
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source "board/hisilicon/hikey/Kconfig"
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source "board/hisilicon/hikey960/Kconfig"
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source "board/hisilicon/poplar/Kconfig"
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@ -1,9 +0,0 @@
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if TARGET_H2200
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config SYS_BOARD
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default "h2200"
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config SYS_CONFIG_NAME
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default "h2200"
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endif
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@ -1,6 +0,0 @@
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H2200 BOARD
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M: Lukasz Dalek <luk0104@gmail.com>
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S: Maintained
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F: board/h2200/
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F: include/configs/h2200.h
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F: configs/h2200_defconfig
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@ -1,12 +0,0 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# h2200 Support
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#
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# Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
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obj-y := h2200.o
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extra-y := h2200-header.bin
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$(obj)/h2200-header.bin: $(obj)/h2200-header.o
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$(OBJCOPY) -O binary $< $@
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@ -1,14 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* iPAQ h2200 header
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*
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* Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
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*/
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.word 0xea0003fe /* b 0x1000 */
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.org 0x40
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.ascii "ECEC"
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.org 0x1000 - 1
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.byte 0x0
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@ -1,73 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* iPAQ h2200 board configuration
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*
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* Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
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*/
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#include <common.h>
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#include <asm/arch/pxa.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/io.h>
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#include <usb.h>
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#include <asm/mach-types.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_eth_init(bd_t *bis)
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{
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usb_eth_initialize(bis);
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return 0;
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}
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void reset_cpu(ulong ignore)
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{
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/* Enable VLIO interface on Hamcop */
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writeb(0x1, 0x4000);
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/* Reset board (cold reset) */
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writeb(0xff, 0x4002);
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}
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int board_init(void)
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{
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/* We have RAM, disable cache */
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dcache_disable();
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icache_disable();
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gd->bd->bi_arch_number = MACH_TYPE_H2200;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0xa0000100;
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/* Let host see that device is disconnected */
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udc_disconnect();
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mdelay(500);
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return 0;
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}
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int dram_init(void)
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{
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/*
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* Everything except MSC0 was already set up by
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* 1st stage bootloader.
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*
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* This setting enables access to companion chip.
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*/
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clrsetbits_le32(MSC0, 0xffffffff, CONFIG_SYS_MSC0_VAL);
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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#ifdef CONFIG_USB_GADGET_PXA2XX
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int board_usb_init(int index, enum usb_init_type init)
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{
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return 0;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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return 0;
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}
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#endif
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@ -1,38 +0,0 @@
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CONFIG_ARM=y
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CONFIG_TARGET_H2200=y
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CONFIG_SYS_TEXT_BASE=0xa0041000
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_FIT=y
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# CONFIG_FIT_ENABLE_SHA256_SUPPORT is not set
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="root=/dev/ram0 ro console=ttyS0,115200n8"
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_HUSH_PARSER=y
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# CONFIG_CMDLINE_EDITING is not set
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# CONFIG_AUTO_COMPLETE is not set
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# CONFIG_SYS_LONGHELP is not set
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CONFIG_SYS_PROMPT="> "
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# CONFIG_CMD_BDI is not set
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# CONFIG_CMD_CONSOLE is not set
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# CONFIG_CMD_BOOTD is not set
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# CONFIG_CMD_XIMG is not set
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# CONFIG_CMD_EDITENV is not set
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# CONFIG_CMD_SAVEENV is not set
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# CONFIG_CMD_ENV_EXISTS is not set
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# CONFIG_CMD_MEMORY is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_LOADS is not set
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# CONFIG_CMD_ECHO is not set
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# CONFIG_CMD_ITEST is not set
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_PING=y
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# CONFIG_CMD_MISC is not set
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# CONFIG_MMC is not set
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CONFIG_CONS_INDEX=3
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CONFIG_PXA_SERIAL=y
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CONFIG_USB=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_ETHER=y
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@ -1,128 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* iPAQ h2200 board configuration
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*
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* Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_MACH_TYPE MACH_TYPE_H2200
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#define CONFIG_CPU_PXA25X 1
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#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE
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#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800
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#define CONFIG_ENV_SIZE 0x00040000
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
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#define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */
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/*
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* iPAQ 1st stage bootloader loads 2nd stage bootloader
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* at address 0xa0040000 but bootloader requires header
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* which is 0x1000 long.
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*
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* --- Header begin ---
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* .word 0xea0003fe ; b 0x1000
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*
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* .org 0x40
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* .ascii "ECEC"
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*
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* .org 0x1000
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* --- Header end ---
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*/
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/*
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* Static chips
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*/
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#define CONFIG_SYS_MSC0_VAL 0x246c7ffc
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#define CONFIG_SYS_MSC1_VAL 0x7ff07ff0
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#define CONFIG_SYS_MSC2_VAL 0x7ff07ff0
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/*
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* PCMCIA and CF Interfaces
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*/
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#define CONFIG_SYS_MECR_VAL 0x00000000
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#define CONFIG_SYS_MCMEM0_VAL 0x00000000
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#define CONFIG_SYS_MCMEM1_VAL 0x00000000
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#define CONFIG_SYS_MCATT0_VAL 0x00000000
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#define CONFIG_SYS_MCATT1_VAL 0x00000000
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#define CONFIG_SYS_MCIO0_VAL 0x00000000
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#define CONFIG_SYS_MCIO1_VAL 0x00000000
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#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
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#define CONFIG_SYS_SXCNFG_VAL 0x00040004
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#define CONFIG_SYS_MDREFR_VAL 0x0099E018
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#define CONFIG_SYS_MDCNFG_VAL 0x01C801CB
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#define CONFIG_SYS_MDMRS_VAL 0x00220022
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#define CONFIG_SYS_PSSR_VAL 0x00000000
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#define CONFIG_SYS_CKEN 0x00004840
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#define CONFIG_SYS_CCCR 0x00000161
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/*
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* GPIOs
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*/
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#define CONFIG_SYS_GPSR0_VAL 0x01000000
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#define CONFIG_SYS_GPSR1_VAL 0x00000000
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#define CONFIG_SYS_GPSR2_VAL 0x00010000
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#define CONFIG_SYS_GPCR0_VAL 0x00000000
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#define CONFIG_SYS_GPCR1_VAL 0x00000000
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#define CONFIG_SYS_GPCR2_VAL 0x00000000
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#define CONFIG_SYS_GPDR0_VAL 0xF7E38C00
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#define CONFIG_SYS_GPDR1_VAL 0xBCFFBF83
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#define CONFIG_SYS_GPDR2_VAL 0x000157FF
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#define CONFIG_SYS_GAFR0_L_VAL 0x80401000
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#define CONFIG_SYS_GAFR0_U_VAL 0x00000112
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#define CONFIG_SYS_GAFR1_L_VAL 0x600A9550
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#define CONFIG_SYS_GAFR1_U_VAL 0x0005AAAA
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#define CONFIG_SYS_GAFR2_L_VAL 0x20000000
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#define CONFIG_SYS_GAFR2_U_VAL 0x00000000
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/*
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* Serial port
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*/
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#define CONFIG_FFUART
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200 }
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_INITRD_TAG
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/* Monitor Command Prompt */
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#define CONFIG_USB_DEV_PULLUP_GPIO 33
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/* USB VBUS GPIO 3 */
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#define CONFIG_BOOTCOMMAND \
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"setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
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"if bootp ; then setenv downloaded 1 ; fi ; done ; " \
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"source :script ; " \
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"bootm ; "
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#define CONFIG_USB_GADGET_PXA2XX
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#define CONFIG_USB_ETH_SUBSET
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#define CONFIG_USBNET_DEV_ADDR "de:ad:be:ef:00:01"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"stdin=serial\0" \
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"stdout=serial\0" \
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"stderr=serial\0"
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#endif /* __CONFIG_H */
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