continuation of commit 39da1ba923d55f316f9f1bb3a960e4ed91dc17ac:
"e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernels"
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch provides support for MPC8308 P1M board with the following
set of features:
Dual UART is supported
NOR flash is supported
Both TSEC Ethernet controllers are supported
PCI Express initialization is supported
Both I2C controllers are supported
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch cleans up the Freescale MPC8308RDB Development board support.
Things fixed:
- Removed unused PCIE2 definitions from configuration
- SICR{L,H} defines used for System I/O Configuration Registers values
instead of hardcoding
- CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of
writing to SCCR from the board code
- sleep mode stuff removed as MPC8308 has no support for deep sleep and
PMCCR1 register. board_early_init_f() removed.
- MPC8308 has no ERRATA for DDR controller so workaround removed
- 'assignment in if statement' issues solved
- use LBLAWAR_* defines instead of hardcoding
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds defines to set supported fields in System I/O
Configuration Registers High and Low on Freescale MPC8308 CPU.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Newer Linux kernels can overrun the initial memory window used for
booting with their BSS area. When this happens, they overwrite the FDT
and silently fail to boot.
On e300 CPUs, the Linux kernel uses an initial BAT covering the first
256MB of RAM. See arch/powerpc/kernel/head_32.S for details. Increase
the value of CONFIG_SYS_BOOTMAPSZ to accommodate the maximum value
allowed by Linux. This will allow very large kernels to boot.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The default partition table matches the .dts files for these boards in
Linux. This allows these partitions to be used by name with U-Boot's
"nand" command.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Remove some unused functionality to make U-Boot build again.
Especially PCI is not used on the board.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO
feature from U-Boot. It has only been implemented for PPC4xx and was not
used at all. So let's remove it and make the code smaller and cleaner.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
This patch removes the PPC4xx UART driver. Instead the common NS16550
driver is used, since all PPC4xx SoC's use this peripheral device.
The file 4xx_uart.c now only implements the UART clock calculation
function which also sets the SoC internal UART divisors.
All PPC4xx board config headers are changed to use this common NS16550
driver now.
Tested on these boards:
acadia, canyonlands, katmai, kilauea, sequoia, zeus
Signed-off-by: Stefan Roese <sr@denx.de>
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.
As a part from this cleanup, the GPIO definitions for PPC405EP are
corrected. The high and low parts of the registers (for example
CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in
the wrong order. This patch now fixes this issue by switching these
xxxH and xxxL values. This brings the GPIO 405EP port in sync with all
other PPC4xx ports.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch starts a bit PPC4xx header cleanup. First patch mostly
touches PPC440 files. A later patch will touch the PPC405 files as well.
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the behaviour of the fdt_fixup_nor_flash_node()
function. Now it doesn't patch the size of the "reg" property with the
chip-select size, but with the size returned from the new function
flash_get_bank_size(). This function will return per weak default the
flash size of the bank (bank = chip-select numer) detected by the flash
driver. If this does not fit your needs, this function may be overridden
by a board specific one.
For this the parameters needed to be changed. So I intentionally squashed
the PPC4xx stuff using this routine into this patch. Otherwise it would
not be git-bisectable anymore.
The board specific function for the AMCC/APM Ebony eval board is now
included in this patch version.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Detlev Zundel <dzu@denx.de>
Cc: Gerald Van Baren <vanbaren@cideas.com>
Cc: Wolfgang Denk <wd@denx.de>
This patch fixes a problem in the PPC4xx POST UART driver. This driver
incorrectly used the in/out8() io-accessor functions. This could lead to
problems since these functions don't guarantee execution ordering. This
patch now replaces these functions with the correct ones.
Additionally the driver is converted to using the NS16550 struct instead
of macros for the register offsets.
And some common code is factored out for better maintainability.
Signed-off-by: Stefan Roese <sr@denx.de>
The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already
existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO).
So delete the 8610-specific code and use the built-in features instead.
Signed-off-by: Timur Tabi <timur@freescale.com>
This patch modifies jadecpu board so that it is usable
with the relocation patches by Heiko Schocher
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
- Revives POST for blackfin arch;
- Removes redundant code:
arch/blackfin/lib/post.c
arch/powerpc/cpu/ppc4xx/commproc.c
arch/powerpc/cpu/mpc512x/common.c
- fixes up the post_word_{load|store} usage.
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>
List of the maintainers of the affected by patch boards:
Cc: Stephan Linz <linz@li-pro.net>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
Cc: Larry Johnson <lrj@acm.org>
Cc: Feng Kan <fkan@amcc.com>
Fixes most of checkpatch warnings and errors in USB gadget stack.
The most frequently encountered problems are:
1) "(foo*)", "foo * bar", "foo* bar"
2) C99 // comments
3) No spaces before/after/around '?', ':', '=', '==', ',', '&', '('
4) Spaces before '['
5) Spaces between function names and '('
6) Block braces in wrong places
7) Spaces before tabs
8) Macros with complex values not enclosed in parenthesis
9) Multiline comments start just after /*
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By
moving these optional variables and defines into the common code, board
specific code is minimized. Currently only the following board use
this feature:
APC405, IDS8247, TQM834x
And IDS8247 doesn't seem to really need this feature, since its not
updating the bank number variable at all. So this patch removes the
definition of CONFIG_SYS_MAX_FLASH_BANKS_DETECT from this board port.
This new framework will be used by the upcoming lwmon5 update as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
Recent changes caused that the smmaco4 board now is included in the
boards built by MAKEALL, which revealed that compilation for this
board has been broken for a long time:
mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.
The board is orphaned. Drop support for it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Recent changes caused that the HMI10 board now is included in the
boards built by MAKEALL, which revealed that compilation for this
board has been broken for a long time:
ps2ser.c: In function 'ps2ser_init':
ps2ser.c:155: error: 'UART_LCR' undeclared (first use in this function)
ps2ser.c:155: error: (Each undeclared identifier is reported only once
ps2ser.c:155: error: for each function it appears in.)
ps2ser.c:156: error: 'UART_DLL' undeclared (first use in this function)
ps2ser.c:157: error: 'UART_DLM' undeclared (first use in this function)
ps2ser.c:159: error: 'UART_IER' undeclared (first use in this function)
ps2ser.c:160: error: 'UART_MCR' undeclared (first use in this function)
ps2ser.c:161: error: 'UART_FCR' undeclared (first use in this function)
ps2ser.c:162: error: 'UART_FCR_ENABLE_FIFO' undeclared (first use in this function)
ps2ser.c:166: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_putc':
ps2ser.c:198: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c:200: error: 'UART_TX' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_getc_hw':
ps2ser.c:224: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c:225: error: 'UART_RX' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_interrupt':
ps2ser.c:293: error: 'UART_IIR' undeclared (first use in this function)
The board is orphaned, and AFAICT has reached EOL.
Drop support for it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Recent changes caused thatthe aev board now is included in the boards
built by MAKEALL, which revealed that compilation for this board has
been broken for a long time:
mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.
mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.
Fix it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Split the existing dram_init for da8xx when ARM reloc is enabled, like the
changes to arch/arm/cpu/arm926ejs/orion5x/dram.c in
0f234d263b17ccf1b8fd776eb8c15b7cdb27a887 by Heiko Schocher <hs@denx.de>.
Without these changes gd->ram_size is '0' which leads to incorrect relocation
when CONFIG_SYS_ARM_WITHOUT_RELOC is defined and the board does not boot.
We use get_ram_size to dynamically calculate the available RAM because it runs
on different board version with different ram, as suggested by Heiko in private
communication.
Tested on a da850evm with 128M of DDR2 installed; with both
CONFIG_SYS_ARM_WITHOUT_RELOC defined and undefined.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Heiko Schocher <hs@denx.de>
Change the implementation for arm926 to relocate the code to
an arbitrary address in RAM.
Adapt the TX25 (i.MX25), magnesium board to test the changes.
On the tx25 board TEXT_BASE is set to the final relocation
address to prevent one more copying of u-boot code
when relocating. More info see:
doc/README.arm-relocation
da850 board:
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Ben Gardiner <bengardiner@nanometrics.ca>
Change the implementation for ARM V7 to relocate the code to an
arbitrary address in RAM.
Adapt the Beagle board (Cortex A8) to test the changes.
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Heiko Schocher <hs@denx.de>
Change the implementation for ARM11 to relocate the code to an
arbitrary address in RAM.
Tested on the qong board.
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Heiko Schocher <hs@denx.de>
fixup_cmdtable() did all work for fixing up the cmdtable,
if CONFIG_RELOC_FIXUP_WORKS is not defined.
CONFIG_RELOC_FIXUP_WORKS is missing for i386! I talked
with Graeme Russ, and he will fix this soon.
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Heiko Schocher <hs@denx.de>
Add data cache support for arm1136 systems.
Enable "cache" command on Qong board and test performance.
Test 1: Loading 127 MB of data from NAND flash into RAM:
Instr. Cache off on on
Data Cache off off on
--------------------------------------------------
QONG (ARM11) 177s 95s 43s = x 4.1
Test 2: uncompressing a gzipped image from RAM to RAM
(size compressed: 6.5 MiB, uncompressed: 35 MiB):
Instr. Cache off on on
Data Cache off off on
--------------------------------------------------
QONG (ARM11) 1.54s 0.95s 0.18s = x 8.6
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Heiko Schocher <hs@denx.de>
Add data cache support for ARM V7 systems. Used cache flush
functions from linux:arch/arm/mm/cache-v7.S developed from
Catalin Marinas.
Enable "cache" command on Beagle board and test performance.
Test 1: Loading 127 MB of data from NAND flash into RAM:
Instr. Cache off on on
Data Cache off off on
--------------------------------------------------
Beagle (Cortex A8) 116s 106s 30.3s = x 3.8
Test 2: uncompressing a gzipped image from RAM to RAM
(size compressed: 6.5 MiB, uncompressed: 35 MiB):
Instr. Cache off on on
Data Cache off off on
--------------------------------------------------
Beagle (Cortex A8) 1.84s 1.64s 0.12s = x 15.3
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Ben Gardiner<bengardiner@nanometrics.ca>
Enable "cache" command on tx25 and magnesium board and test performance.
Test 1: Loading 127 MB of data from NAND flash into RAM:
Instr. Cache off on on
Data Cache off off on
--------------------------------------------------
magnesium 32,6s 22,5s 30s = x 1,09
tx25 (29MB only) 9,69s 5,05s 8,16s = x 1,19
Test 2: uncompressing a gzipped image from RAM to RAM
(size compressed: 6.5 MiB, uncompressed: 35 MiB):
Instr. Cache off on on
Data Cache off off on
--------------------------------------------------
magnesium 4,25s 2,08s 1,72s = x 2,47
tx25 4,82s 2,04s 1,84s = x 2,62
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Alessandro Rubini <rubini@gnudd.com>
Motivation:
* Old environment code used a pessimizing implementation:
- variable lookup used linear search => slow
- changed/added variables were added at the end, i. e. most
frequently used variables had the slowest access times => slow
- each setenv() would calculate the CRC32 checksum over the whole
environment block => slow
* "redundant" envrionment was locked down to two copies
* No easy way to implement features like "reset to factory defaults",
or to select one out of several pre-defined (previously saved) sets
of environment settings ("profiles")
* No easy way to import or export environment settings
======================================================================
API Changes:
- Variable names starting with '#' are no longer allowed
I didn't find any such variable names being used; it is highly
recommended to follow standard conventions and start variable names
with an alphanumeric character
- "printenv" will now print a backslash at the end of all but the last
lines of a multi-line variable value.
Multi-line variables have never been formally defined, allthough
there is no reason not to use them. Now we define rules how to deal
with them, allowing for import and export.
- Function forceenv() and the related code in saveenv() was removed.
At the moment this is causing build problems for the only user of
this code (schmoogie - which has no entry in MAINTAINERS); may be
fixed later by implementing the "env set -f" feature.
Inconsistencies:
- "printenv" will '\\'-escape the '\n' in multi-line variables, while
"printenv var" will not do that.
======================================================================
Advantages:
- "printenv" output much better readable (sorted)
- faster!
- extendable (additional variable properties can be added)
- new, powerful features like "factory reset" or easy switching
between several different environment settings ("profiles")
Disadvantages:
- Image size grows by typically 5...7 KiB (might shrink a bit again on
systems with redundant environment with a following patch series)
======================================================================
Implemented:
- env command with subcommands:
- env print [arg ...]
same as "printenv": print environment
- env set [-f] name [arg ...]
same as "setenv": set (and delete) environment variables
["-f" - force setting even for read-only variables - not
implemented yet.]
- end delete [-f] name
not implemented yet
["-f" - force delete even for read-only variables]
- env save
same as "saveenv": save environment
- env export [-t | -b | -c] addr [size]
export internal representation (hash table) in formats usable for
persistent storage or processing:
-t: export as text format; if size is given, data will be
padded with '\0' bytes; if not, one terminating '\0'
will be added (which is included in the "filesize"
setting so you can for exmple copy this to flash and
keep the termination).
-b: export as binary format (name=value pairs separated by
'\0', list end marked by double "\0\0")
-c: export as checksum protected environment format as
used for example by "saveenv" command
addr: memory address where environment gets stored
size: size of output buffer
With "-c" and size is NOT given, then the export command will
format the data as currently used for the persistent storage,
i. e. it will use CONFIG_ENV_SECT_SIZE as output block size and
prepend a valid CRC32 checksum and, in case of resundant
environment, a "current" redundancy flag. If size is given, this
value will be used instead of CONFIG_ENV_SECT_SIZE; again, CRC32
checksum and redundancy flag will be inserted.
With "-b" and "-t", always only the real data (including a
terminating '\0' byte) will be written; here the optional size
argument will be used to make sure not to overflow the user
provided buffer; the command will abort if the size is not
sufficient. Any remainign space will be '\0' padded.
On successful return, the variable "filesize" will be set.
Note that filesize includes the trailing/terminating '\0'
byte(s).
Usage szenario: create a text snapshot/backup of the current
settings:
=> env export -t 100000
=> era ${backup_addr} +${filesize}
=> cp.b 100000 ${backup_addr} ${filesize}
Re-import this snapshot, deleting all other settings:
=> env import -d -t ${backup_addr}
- env import [-d] [-t | -b | -c] addr [size]
import external format (text or binary) into hash table,
optionally deleting existing values:
-d: delete existing environment before importing;
otherwise overwrite / append to existion definitions
-t: assume text format; either "size" must be given or the
text data must be '\0' terminated
-b: assume binary format ('\0' separated, "\0\0" terminated)
-c: assume checksum protected environment format
addr: memory address to read from
size: length of input data; if missing, proper '\0'
termination is mandatory
- env default -f
reset default environment: drop all environment settings and load
default environment
- env ask name [message] [size]
same as "askenv": ask for environment variable
- env edit name
same as "editenv": edit environment variable
- env run
same as "run": run commands in an environment variable
======================================================================
TODO:
- drop default env as implemented now; provide a text file based
initialization instead (eventually using several text files to
incrementally build it from common blocks) and a tool to convert it
into a binary blob / object file.
- It would be nice if we could add wildcard support for environment
variables; this is needed for variable name auto-completion,
but it would also be nice to be able to say "printenv ip*" or
"printenv *addr*"
- Some boards don't link any more due to the grown code size:
DU405, canyonlands, sequoia, socrates.
=> cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>,
Stefan Roese <sr@denx.de>,
Heiko Schocher <hs@denx.de>
- Dropping forceenv() causes build problems on schmoogie
=> cc: Sergey Kubushyn <ksi@koi8.net>
- Build tested on PPC and ARM only; runtime tested with NOR and NAND
flash only => needs testing!!
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>,
Cc: Stefan Roese <sr@denx.de>,
Cc: Heiko Schocher <hs@denx.de>
Cc: Sergey Kubushyn <ksi@koi8.net>
This (undocumented) concept was only in use for the MVSMR and
davinci_schmoogie Sergey Kubushyn <ksi@koi8.net> boards.
Drop it for now. If really needed, it should be reimplemented
later in the context of the new environment command set.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andre Schwarz <andre.schwarz@matrix-vision.de>
Cc: Sergey Kubushyn <ksi@koi8.net>
Acked-by: Sergey Kubushyn <ksi@koi8.net>
This implementation is based on code from uClibc-0.9.30.3 but was
modified and extended for use within U-Boot.
Major modifications and extensions:
* hsearch() [modified / extended]:
- While the standard version does not make any assumptions about
the type of the stored data objects at all, this implementation
works with NUL terminated strings only.
- Instead of storing just pointers to the original objects, we
create local copies so the caller does not need to care about the
data any more.
- The standard implementation does not provide a way to update an
existing entry. This version will create a new entry or update an
existing one when both "action == ENTER" and "item.data != NULL".
- hsearch_r(): Instead of returning 1 on success, we return the
index into the internal hash table, which is also guaranteed to be
positive. This allows us direct access to the found hash table
slot for example for functions like hdelete().
* hdelete() [added]:
- The standard implementation of hsearch(3) does not provide any way
to delete any entries from the hash table. We extend the code to
do that.
* hexport() [added]:
- Export the data stored in the hash table in linearized form:
Entries are exported as "name=value" strings, separated by an
arbitrary (non-NUL, of course) separator character. This allows to
use this function both when formatting the U-Boot environment for
external storage (using '\0' as separator), but also when using it
for the "printenv" command to print all variables, simply by using
as '\n" as separator. This can also be used for new features like
exporting the environment data as text file, including the option
for later re-import.
- The entries in the result list will be sorted by ascending key
values.
* himport() [added]:
- Import linearized data into hash table. This is the inverse
function to hexport(): it takes a linear list of "name=value"
pairs and creates hash table entries from it.
- Entries without "value", i. e. consisting of only "name" or
"name=", will cause this entry to be deleted from the hash table.
- The "flag" argument can be used to control the behaviour: when
the H_NOCLEAR bit is set, then an existing hash table will kept,
i. e. new data will be added to an existing hash table;
otherwise, old data will be discarded and a new hash table will
be created.
- The separator character for the "name=value" pairs can be
selected, so we both support importing from externally stored
environment data (separated by NUL characters) and from plain text
files (entries separated by newline characters).
- To allow for nicely formatted text input, leading white space
(sequences of SPACE and TAB chars) is ignored, and entries
starting (after removal of any leading white space) with a '#'
character are considered comments and ignored.
- NOTE: this means that a variable name cannot start with a '#'
character.
- When using a non-NUL separator character, backslash is used as
escape character in the value part, allowing for example fo
multi-line values.
- In theory, arbitrary separator characters can be used, but only
'\0' and '\n' have really been tested.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Traditionally many boards used local definitions for SRAM base address
and size (like SRAM_BASE, SRAM_LEN and/or SRAM_SIZE), while the (now)
"official" names are CONFIG_SYS_SRAM_BASE and CONFIG_SYS_SRAM_SIZE.
The corresponding code in arch/powerpc/lib/board.c was board specific,
and has never actually been maintained well. Replace this by feature-
specific code and adapt the boards that actually use this.
NOTE: there is still a ton of boards using the old #defines, which
therefor contain incorrect values in bi_sramstart and bi_sramsize.
All respective board maintainers are requested to clean up their
respective configurations. Thanks.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Josef Wagner <Wagner@Microsys.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
A number of boards define CONFIG_SYS_SRAM_BASE but fail to define
CONFIG_SYS_SRAM_SIZE which is needed when cleaning up the code that
prints this information with the bdinfo command.
Add the missing deinitions.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
The SC520 CDP boards originally implemented by Daniel Engström are now
very broken. Attempts to contact Daniel via the email address on the
copyright notice have failed. Remove these boards from mainline
Future versions of these boards have options for POP memory with no NAND.
This option prevents display of error messages when no NAND is detected.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Allows one to set the processor clock rate via "setenv mpurate 720" for example
Default is set to a "safe" 500 Mhz.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds a function to allow one to easily set the target
voltage for the TWL4030 regulators. It also modifies the existing
code to use this new function. Applicable definitions are moved
out of the driver file and into the header file so that they are
generally accessible
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Use the MMU hardware to set up 1:1 mappings between physical and virtual
addresses. This allows us to bypass the cache when accessing the flash
without having to do any physical-to-virtual address mapping in the CFI
driver.
The virtual memory mappings are defined at compile time through a sorted
array of virtual memory range objects. When a TLB miss exception
happens, the exception handler does a binary search through the array
until it finds a matching entry and loads it into the TLB. The u-boot
image itself is covered by a fixed TLB entry which is never replaced.
This makes the 'saveenv' command work again on ATNGW100 and other boards
using the CFI driver, hopefully without breaking any rules.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch fixes a bug in reconfigure_pll(), where the detection of
the current bootstrap option is wrong. The ICS bits where incorrectly
shifted. This bug was found on the lwmon5 board, which uses bootstrap
option H (I2C bootstrap EEPROM).
Additionally a bit of code was moved into the if statement, since its
only used after later on. No need to run this code all the time.
Also, a few empty lines are added to make the code better readable.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Rupjyoti Sarmah <rsarmah@amcc.com>
Cc: Victor Gallardo <vgallardo@appliedmicro.com>
Opps, after a long time I tested recent u-boot on our
APC405 board. This simple fix makes networking work again.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
These are not used on this board, which uses soft I2C instead.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar<prafulla@marvell.com>
Acked-by: Heiko Schocher<hs@denx.de>
convert the board to the new soc architecture
update default config
i2c upgrade taken from eb_cpux9k2.h & board/BuS/eb_cpux9k2/cpux9k2.c
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
There was an redesign, so USB is available now.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* convert meesc board to use c stucture SoC access
* change gpio access to at91_gpio syntax
* moved CONFIG_SYS_HZ below board and cpu defines (purely cosmetic)
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
We get two build errors:
fsl_elbc_nand.c: In function 'fsl_elbc_run_command':
fsl_elbc_nand.c:231: error: 'fsl_lbc_t' has no member named 'lsor'
make[1]: *** [/work/wd/tmp-ppc/drivers/mtd/nand/fsl_elbc_nand.o] Error 1
and
ve8313.c: In function 'initdram':
ve8313.c:104: error: expected '=', ',', ';', 'asm' or '__attribute__'
before '*' token
ve8313.c:104: error: 'lbc' undeclared (first use in this function)
ve8313.c:104: error: (Each undeclared identifier is reported only once
ve8313.c:104: error: for each function it appears in.)
ve8313.c:104: error: 'immap_t' has no member named 'lbus'
make[1]: *** [ve8313.o] Error 1
make: *** [board/ve8313/libve8313.a] Error 2
Due to changes to unifiy local bus struct definitions.
Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The board specific parameters associated with quad rank dimms where
missing. This fixes it so the board will function if quad rank dimms
are placed in it.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Recent features enabled by default require a larger monitor size for the
cm-bf548 port, so bump it up a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Commit 6e37b1a3a25004d3df5867de49fff6b3fc9c4f04 modifies several net calls
to take a (const char *) parameter instead of (char *), but in some cases
the modified functions call other functions taking (char *). The end result
is warnings about discarding the const qualifier.
This patch fixes these other function signatures.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The driver name does not need to be writable, so constify it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
continuation of commit 2ecc2262d66a286e3aac79005bcb5f461312dea8
"net ppc: fix ethernet device names with spaces" (currently in
u-boot-net.git) for QE based parts.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
since commit 1384f3bb8a ethernet names
with spaces drop a
Warning: eth device name has a space!
message. This patch fix it for:
- "FEC ETHERNET" devices found on
mpc512x, mpc5xxx, mpc8xx and mpc8220 boards.
renamed to "FEC".
- "SCC ETHERNET" devices found on
mpc8xx, mpc82xx based boards. Renamed to "SCC".
- "HDLC ETHERNET" devices found on mpc8xx boards
Renamed to "HDLC"
- "FCC ETHERNET" devices found on mpc8260 and mpc85xx based
boards. Renamed to "FCC"
Tested on the kup4k board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch has the following fixes/changes:
- Set 'kernel_addr' and 'ramdisk_addr' to correct values and add
'fdt_addr' environment variable
- Remove 'kozio' environment variable
- Remove environmant variables to boot ancient arch/ppc Linux kernels
- Remove CONFIG_SYS_BOOTMAPSZ definition. It's already defined to
the same value in amcc-common.h
Signed-off-by: Stefan Roese <sr@denx.de>
Update image size and default environment
after addition of new environment handling.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Update image size after addition of new environment handling.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Update image size after addition of new environment handling.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
None of the AMCC boards uses an embedded environment, so there is no
need to run "saveenv" after updating U-Boot. Drop the redundant
commands from the default environment.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables mvsata driver and related filesystem support.
The patch is tested for ide reset and ext2ls operation for a disk drive connected on SATA port0.
This patch depends upon the patche-series http://lists.denx.de/pipermail/u-boot/2010-August/074908.html
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
CONFIG_IDE_SWAP_IO
This configuration option replaces a complex conditional
in cmd_ide.c with an explicit define to be added to SoC or
board configs.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
This patch add the basic infrastructure for the TWL6030 driver and enables
support in the two existing OMAP4 boards, Panda and OMAP4430 SDP
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The OMAP4 x-load code sets gptimer1 clock source to 32Khz. This isn't
acceptable for udelay. This patch changes from gptimer1 to gptimer2,
which uses sys_clk at 38.4 Mhz.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Add functional multiplexing support for OMAP4 pads.
Configure all the pads for the OMAP4430 SDP
and OMAP4 Panda boards
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
While running from flash, i. e. before relocation, we have only a
limited C runtime environment without writable data segment. In this
phase, some configurations (for example with environment in EEPROM)
must not use the normal getenv(), but a special function. This
function had been called getenv_r(), with the idea that the "_r"
suffix would mean the same as in the _r_eentrant versions of some of
the C library functions (for example getdate vs. getdate_r, getgrent
vs. getgrent_r, etc.).
Unfortunately this was a misleading name, as in U-Boot the "_r"
generally means "running from RAM", i. e. _after_ relocation.
To avoid confusion, rename into getenv_f() [as "running from flash"]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Adds the board_mmc_init function and enable the mmc command
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Add support for the P4080DS board, with the following features:
* 36-bit only
* Boots from NOR flash
* FMAN drivers NOT supported
* SPD DDR initialization
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Lan Chunhe-B25806 <b25806@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Enabled registered DIMMs using data from SPD. RDIMMs have registers
which need to be configured before using. The register configuration
words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software
should read those RCWs and put into DDR controller before initialization.
Signed-off-by: York Sun <yorksun@freescale.com>
Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual
rank with 512MB each rank.
Also check dimm size and rank size for memory controller interleaving
Signed-off-by: York Sun <yorksun@freescale.com>
If we are creating reference (handles) to nodes in a device tree we need
to first create a new phandle in node and this needs a new phandle
value. So we search through the whole dtb to find the max phandle value
and return the next greater value for a new phandle allocation.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Use the new common gpio framework to simplify and unify the soft i2c
configuration settings.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
This patch fixes some problems for the T3CORP board. Here the list
of the changes:
- Add 600-67 and 677 CPU frequency setting to chip_config
command
- Define CONFIG_DDR_RFDC_FIXED on t3corp:
While using the "normal" auto calibration code, sometimes values for
RFDC were picked (>= T3) that resulted in a non-working U-Boot (hang
upon relocation, while running from SDRAM). With this optimized RFDC
value we can force this register and use the auto-calibration code to
setup the remaining calibration registers.
- Increase sizes of FPGA chips selects
- EBC timing updated OEN=3 for 66 MHz EBC speed
- Change ext. IRQ2 setup to level-low active
- Enable CONFIG_SYS_CFI_FLASH_STATUS_POLL
By defining CONFIG_SYS_CFI_FLASH_STATUS_POLL, DQ7 is polled to detect the
chip busy status. This is now used instead of the data toggle method which
is used historically by default in the common CFI driver. With this change
a problem with not written data is solved on this board, where a 32 byte
block of data is still erased instead of filled with the correct content
after these commands:
=> erase 0xfc100000 +0x1000000
....................................................................
done
Erased 128 sectors
=> cp.b 0x100000 0xfc100000 0x1000000
Copy to Flash... done
=> cmp.b 0x100000 0xfc100000 0x1000000
byte at 0x00d0d6c0 (0x00) != byte at 0xfcd0d6c0 (0xff)
Total of 12637888 bytes were the same
Signed-off-by: Stefan Roese <sr@denx.de>
Functions added to support board callbacks for USB init. This
isolates USB manipulations such that it is only touched if USB is
used by U-Boot.
Signed-off-by: Dave Mitchell <dmitchell@appliedmicro.com>
Signed-off-by: Rupjyoti Sarmah <rsarmah@appliedmicro.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Given a compatible string and physical address try and find a node that
matches. This is useful when we want to find a specific device node to
update (for example if we have multiple PCI nodes we can use the
physical address to distinguish them when trying to update the device
tree).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
This code is extracted out of the Linux Kernel code from
arch/powerpc/kernel/prom_parse.c.
We maintain some of the same structure to support multiple bus types even
though we only have one in the current code. In the future we might want
to translate across a PCI bus and thus it will be easier to add that
functionality back in.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
The MPC8641 boards actually only have PCIE not PCI. Rename so we are
uniform with regards to names so we can replace this code with templated
code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove dupliacted setting of PCI/PCIe address and offsets in board
config.h. Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on
MPC8641 boards since its really PCIE controllers and not PCI.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The board maintainer states:
The GTH board is obsolete and has not been manufactured for
several years.
To my knowledge, no recent U-Boot build has been tested on that
card.
So drop support for this board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Thomas Lange <thomas@corelatus.se>
Acked-by: Thomas Lange<thomas@corelatus.se>
Add 'errata' command to report what errata we workaround. Report
workaround for erratum SATA-A001 on P1022/P1013.
Also sorted the CONFIG_CMD_* list.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Specifics:
1) 36-bit only
2) Booting from NOR flash only
3) Environment stored in NOR flash only
4) No SPI support
5) No DIU support
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The new command dumps the TLBCAM, the LAWs, and the BR/OR regs.
Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.
To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.
In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.
I have done a successful ppc build all and tested a board or two from
each processor family.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some parts that have an Enhanced Local Bus Controller weren't
setting CONFIG_FSL_ELBC. Fix this so we can use this define
properly going forward (currently it's only used if PHYS_64BIT is
set, which meant not all platforms needed to have it set correctly).
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We have several boards that use the same ICS307 CLK chip to drive the
System clock and DDR clock. Move the code into a common location so we
share it.
Convert the P2020DS board as the first to use the new common ICS307
code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Timur Tabi <timur@freescale.com>
CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x.
Parts with newer SEC h/w versions will increment the number to
accomodate incompatible code changes.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds support for the Voipac PXA270 board. The support includes:
- Ethernet
- USB
- MMC
- NOR Booting
- OneNAND Booting
- LCD
- HDD
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Scott Wood <scottwood@freescale.com>
The SPI env code didn't support redundant environments until recently, but
this code was written before that. Since it has never been tested (and
currently causes a build failure), simply punt it. If the functionality
is actually desired, it can be re-added once it has been tested.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The original BF518F-EZBRD's have a Micrel KSZ8893 DSA on them, but newer
ones only have a National PHY (which lack a RX Error interrupt line). So
in the board eth init code, dynamically detect what is hooked up to the MAC
and handle each accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than only support the pins dedicated as chip selects, utilize the
gpio framework to support any gpio pin.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add edminiv2 board support for mv_egiga.
Add edminiv2 config to enable mv_egiga.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Rename all references to kirkwood in mvgbe symbols
throughout the whole codebase.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This is a re-submission of the patch by Harald Welte
<laforge@openmoko.org> with minor modifications for rebase and changes
as suggested by Scott Wood <scottwood@freescale.com> [1] [2].
This patch enables the environment partition to have a run-time dynamic
location (offset) in the NAND flash. The reason for this is simply that
all NAND flashes have factory-default bad blocks, and a fixed compile
time offset would mean that sometimes the environment partition would
live inside factory bad blocks. Since the number of factory default
blocks can be quite high (easily 1.3MBytes in current standard
components), it is not economic to keep that many spare blocks inside
the environment partition.
With this patch and CONFIG_ENV_OFFSET_OOB enabled, the location of the
environment partition is stored in the out-of-band (OOB) data of the
first block in flash. Since the first block is where most systems boot
from, the vendors guarantee that the first block is not a factory
default block.
This patch introduces the 'nand env.oob' command, which can be called
from the u-boot command line. 'nand env.oob get' reads the address of
the environment partition from the OOB data, 'nand env.oob set
{offset,partition-name}' allows the setting of the marker by specifying
a numeric offset or a partition name.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/43916
[2] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/79195
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Harald Welte <laforge@gnumonks.org>
The example configuration files of nios2-generic board can generated
binary to run on the EP1C20, EP1S10, and EP1S40 boards. So the three
boards can be removed.
With nios2-generic approach, the fpga parameter header file can
be generated from hardware designs using tools. Porting u-boot for
nios2 boards is simplified. Vendors can supply their fpga parameter
file or patches to add a new nios2-generic board instance. There is
no need to include other boards support for nios2 in the u-boot
mainline.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* the following problems are met :
config was set to use the new driver as a default but
- RMII was not enabled for the new driver
- the new driver didn't compile with RMII enabled
- the new driver initialize a PHY at address O when the PHY of
this board is at 1 thus we get "AT91 EMAC RMII: No PHY present"
* to fix these problems, this patch :
- enable RMII for the new driver
- fix the wrong define used in the at91_emac.c
- allow the config file to set a default phy address (and use
0 as a default as in the actual at91_emac.c driver)
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Designware network driver support added.
This is a Synopsys ethernet controller
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch add support for the ve8313 board based on
Freescale MPC8313 CPU.
- serial console on UART 1
- 128 MB DDR RAM
- 32 MB NOR Flash
- 16 MB NAND Flash
- Ethernet MII Mode over on TSEC0
- micrel ksz804 phy
- Hardware WDT MAX824
changes since v1
- Environment size = sector size
- use red. environment
- add comments from Kim Phillips
- add MAKEALL, MAINTAINERS entry
- Codingstyle issues fixed
- inserted original Copyrights
- PCI subsys vendor ID changed from 0x1057 (Motorola)
to 0x1957 (Freescale)
changes since v2
- add comments from Wolfgang Denk
- fix Codingstyle and some comments
- reworked WDT reset (just toggling the WD_TRIG pin)
- Environment size now 16KiB
- fixed RAMBOOT version
- fixed CONFIG_SYS_LOAD_ADDR
- renamed CONFIG_TSEC1_NAME to TSEC1
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch provides support for MPC8308RDB development board from
Freescale with a minimal set of features:
Dual UART is supported
NOR flash is supported
Both TSEC Ethernet controllers are supported
PCI Express initialization is supported
The following features are enabled in configuration but not fully tested:
I2C (used to get the board revision)
I2C-connected RTC
VSC7385 switch
There is one (hopefully) minor issue: on soft reset the board sometimes
resets twice. I've not managed to find the fix for this problem yet.
As a workaround instruction cache can be disabled.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also supported. eSDHC, NAND and USB may work but aren't
tested (using ULPI PHY requires additional patch).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Use the new GPIO framework code in both the Blackfin arch and the
nand_plat driver to simplify things greatly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
this eliminates compiler warnings when cmd_mmc.c is built with CONFIG_SYS_MMC_SET_DEV
the mmc_set_dev implementation in omap3_mmc.c is also tweaked to match
the new prototype in parameter naming and type
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
OMAP4 Panda is a reference board based on OMAP4430, an ARMV7 Cortex A9 CPU
This patch adds basic support for booting the board. It includes i2c and mmc
support. It assumes U-boot is loaded to SDRAM with the help of another small
bootloader (x-load) running from SRAM. U-boot currently relies on x-load for
clock, mux, and SDRAM initialization
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
OMAP4430 SDP is a reference board based on OMAP4430, an ARMV7 Cortex A9 CPU
This patch adds basic support for booting the board. It includes i2c and mmc
support. It assumes U-boot is loaded to SDRAM with the help of another small
bootloader (x-load) running from SRAM. U-boot currently relies on x-load for
clock, mux, and SDRAM initialization
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9
Cortex A8 and A9 both belong to the armv7 architecture, hence the name change.
The two architectures are similar enough that substantial code can be shared.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Now that we have a unified gpio layer, the different status led
implementations can be switched to the common gpio led driver.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When boards define CONFIG_BOARD_SPECIFIC_LED, the common led definitions
are OK for Blackfin boards. So switch the few boards using these over to
the common code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that we have a unified gpio layer, the misc partial gpio commands
can be unified and made complete (support all possible gpios).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands. Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".
This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:
int main (int argc, char **argv)
{
while (--argc > 0 && **++argv == '-') {
/* ====> */ while (*++*argv) {
switch (**argv) {
case 'd':
debug++;
break;
...
default:
usage ();
}
}
}
...
}
The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell. With the modification, the compiler will prevent this with
an
error: increment of read-only location '*argv'
N.B.: The code above can be trivially rewritten like this:
while (--argc > 0 && **++argv == '-') {
char *arg = *argv;
while (*++arg) {
switch (*arg) {
...
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Instead of defining the flags sevaral times in different source files
(which is error prone), move them to a central place in a header file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Change the return type of the *printf() functions to the standard
"int"; no changes are needed but returning the already available
length count.
This will save a few additional strlen() calls later...
Signed-off-by: Wolfgang Denk <wd@denx.de>
Remove some INFERNO related #ifdef's from common environment code by
fixing the board configuration settings (add CONFIG_ENV_SECT_SIZE).
While we are at it, fix comment which incorrectly talks about 4 KB
environment size, while it's actually 0x4000 = 16 KiB.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Rolf Offermanns <rof@sysgo.de>
This patch enables booting with option E on the PPC460EX/EXr/GT.
When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0.
The Software Boot Configuration Procedure is needed to engage the
PLL and perform a chip reset.
Signed-off-by: Stefan Roese <sr@denx.de>
On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII.
Current TBI PHY settings for SGMII mode cause link problems on
this platform, link never comes up.
Fix this by making TBI PHY settings configurable and add a working
configuration for P2020RDB.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
Because the variable was getting defined twice.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
The AmigaOneG3SE board has been orphaned or a very long time, and
broken for more than 12 releases resp. more than 3 years. As nobody
seems to be interested any more in this stuff we may as well ged rid
of it, especially as it clutters many areas of the code so it is a
continuous pain for all kinds of ongoing work.
Signed-off-by: Wolfgang Denk <wd@denx.de>
CONFIG_SYS_BUS_HZ has not really been used anywhere except to be
redined as CONFIG_SYS_BUS_CLK; in addition, the mpc7448hpc2 had the
bogus CONFIG_SYS_CONFIG_BUS_CLK setting which duplicated the
funtionality. Change all this to use CONFIG_SYS_BUS_CLK consistently.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Eran Man <eran@nbase.co.il>
Cc: Stefan Roese <sr@denx.de>
Cc: Nye Liu <nyet@zumanetworks.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>
Currently EMAC_MDIO_PHY_NUM is defined as 1 in emac_defs.h.
Because of this, EMAC does not work on EVMs which do not have phy
connected at 1. Moving the macro to board config file makes this
configurable depending on where the phy is connected on the MDIO bus.
This patch fixes the board reset issue observed during network access
on DM365EVM. EMAC driver was assuming EMAC_MDIO_PHY_NUM as 1
but it is 0 on DM365EVM.
This patch is verified on da830/omap-l137, dm365 and dm644x evms.
Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Commit 37566090 "compiler.h: unify system ifdef cruft here" added both
a "#include <errno.h>" and a "extern int errno;" to include/compiler.h
which is causing build warnings for some systems, for example for the
"netstar" board:
In file included from /home/wd/git/u-boot/work/lib/crc32.c:15:
include/compiler.h:28: warning: function declaration isn't a prototype
The declaration of "errno" should be redundant, as <errno.h> is
supposed to provide a correct declaration, so drop it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Conflicts:
CONFLICT (rename/add): Rename
board/davinci/da830evm/Makefile->board/ti/tnetv107xevm/Makefile
in 89b765c7f6.
board/ti/tnetv107xevm/Makefile added in HEAD
But files were identical, so no problem.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds support for the LaCie ED Mini V2 product
which is based on the Marvell Orion5x SoC.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
This patch adds support for the Samsung Goni board (S5PC110 SoC)
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Provides initial support for TI OMAP-L138/DA850 SoC devices on
a Logic PD EVM board.
Provides:
Initial boot and configuration.
Support for i2c.
UART support (console).
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Acked-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for the EMIF4 interface
available in the AM35x processors.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Consolidated SDRC related functions into one file - sdrc.c
And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The EVMS have been shipping with NAND (instead of OneNAND) as default.
So, this patch sets NAND as default.
To choose OneNAND, define CMD_ONENAND instead of CMD_NAND in the
config file omap3_evm.h.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals. This patch adds support for the
TNETV107X EVM board.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The current ARM1176 CPU specific code is too specific to the SMDK6400
architecture. The following changes were necessary prerequisites for the
addition of other SoCs based on ARM1176.
Existing board's (SMDK6400) configuration has been modified to keep behavior
unchanged despite these changes.
1. Peripheral port remap configurability
The earlier code had hardcoded remap values specific to s3c64xx in start.S.
This change makes the peripheral port remap addresses and sizes configurable.
2. U-Boot code relocation support
Most architectures allow u-boot code to run initially at a different
address (possibly in NOR) and then get relocated to its final resting place
in RAM. Added support for this capability in ARM1176 architecture.
3. Disable TCM if necessary
If a ROM based bootloader happened to have initialized TCM, we disable it here
to keep things sane.
4. Remove unnecessary SoC specific includes
ARM1176 code does not really need this SoC specific include. The presence
of this include prevents builds on other ARM1176 archs.
5. Modified virt-to-phys conversion during MMU disable
The original MMU disable code masks out too many bits from the load address
when it tries to figure out the physical address of the jump target label.
Consequently, it ends up branching to the wrong address after disabling the
MMU.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for the EMIF4 interface
available in the AM35x processors.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Consolidated SDRC related functions into one file - sdrc.c
And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The EVMS have been shipping with NAND (instead of OneNAND) as default.
So, this patch sets NAND as default.
To choose OneNAND, define CMD_ONENAND instead of CMD_NAND in the
config file omap3_evm.h.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a
bunch on on-chip integrated peripherals. This patch adds support for the
TNETV107X EVM board.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The current ARM1176 CPU specific code is too specific to the SMDK6400
architecture. The following changes were necessary prerequisites for the
addition of other SoCs based on ARM1176.
Existing board's (SMDK6400) configuration has been modified to keep behavior
unchanged despite these changes.
1. Peripheral port remap configurability
The earlier code had hardcoded remap values specific to s3c64xx in start.S.
This change makes the peripheral port remap addresses and sizes configurable.
2. U-Boot code relocation support
Most architectures allow u-boot code to run initially at a different
address (possibly in NOR) and then get relocated to its final resting place
in RAM. Added support for this capability in ARM1176 architecture.
3. Disable TCM if necessary
If a ROM based bootloader happened to have initialized TCM, we disable it here
to keep things sane.
4. Remove unnecessary SoC specific includes
ARM1176 code does not really need this SoC specific include. The presence
of this include prevents builds on other ARM1176 archs.
5. Modified virt-to-phys conversion during MMU disable
The original MMU disable code masks out too many bits from the load address
when it tries to figure out the physical address of the jump target label.
Consequently, it ends up branching to the wrong address after disabling the
MMU.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Add the new board PM9G45 from Ronetix GmbH.
* AT91SAM9G45 MCU at 400Mhz.
* 128MB DDR2 SDRAM
* 256MB NAND
* 10/100 MBits Ethernet DP83848
* Serial number chip DS2401
The board is made as SODIMM200 module.
For more info www.ronatix.at or info@ronetix.at.
Signed-off-by: Asen Dimov <dimov@ronetix.at>
This patch changed the SICRL_USBDR define to reflect the 4 different bit
settings for this two-bit field. The four different options are '00', '01',
'10', and '11'. This patch also corrects the config file for SIMPC8313 and
MPC8313ERDB for the appropriate fields. This change only affects the MPC8313
cpu.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds gpio support of Altera PIO component to the
nios2-generic board. Though it drives only gpio_led at the
moment, it supports bidirectional port to control bit-banging
I2C, NAND flash busy status or button switches, etc.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
create_pipe() can give wrong result if an expression is passed as the 'endpoint'
argument -- due to missing parentheses.
Thanks to Martin Mueller for finding the bug and providing the patch.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
"down_write_trylock" needs to return 1 instead of 0 for success.
Otherwise copying a block with a read error (e.g. bit-flip on read)
won't work correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch sets the SICRL_LBC bits in SICRL to change the function of the
associated pins to GPIO functionality.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Add USB commands.
Rename autoscript to bootscript.
Add automatic bootscript image generation to makefile.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Added UPM array table, upmconfig, and Local Bus configuration support for SIMPC8313
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Only one file apparently defines this function, and it merely stubs
it out. So if no one is defining/calling it, punt it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
With the cpu include paths moved, the gitignore paths need updating.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Tom Rix <tom@bumblecow.com>
Recent crc changes started using the "uint" type in headers that are used
on the build system. This subsequently broke mingw targets as they do not
provide such a type. So add this basic typedef to compiler.h so that we
do not have to worry about this breaking again in the future.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add ECC support for DDR RAM for MV64360 on esd CPCI-CPU/750 board.
This patch also adds the "pldver" command to display the CPLD
revision.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Add support for newer (up to 2.6.33) kernels
Add zboot command which takes the address of a bzImage as its first
argument and (optionally) the size of the bzImage as the second argument
(the second argument is needed for older kernels which do not include
the bzImage size in the header)
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Modify print_size() so that it can accept numbers larger than 4GB on 32-bit
systems.
Add support for display terabyte, petabyte, and exabyte sizes. Change the
output to use International Electrotechnical Commission binary prefix standard.
Signed-off-by: Timur Tabi <timur@freescale.com>
The MC13892 is a Power Controller used with processors
of the family MX.51. The file adds definitions to be used to setup
the internal registers via SPI.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The RTC is part of the Freescale's PMIC controller.
Use general function to access to PMIC internal registers.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
The patch add supports for the Freescale's Power
Management Controller (known as Atlas) used together with i.MX31/51
processors. It was tested with a MC13783 (MX31) and
MC13892 (MX51).
Signed-off-by: Stefano Babic <sbabic@denx.de>
Add a new function to the eth_device struct for programming a network
controller's hardware address.
After all network devices have been initialized and the proper MAC address
for each has been determined, make a device driver call to program the
address into the device. Only device instances with valid unicast addresses
will be programmed.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Tested-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
This driver supports the Altera triple speeds 10/100/1000 ethernet
mac.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch ports the opencore 10/100 ethernet mac driver ethoc.c
from linux kernel to u-boot.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The NAND device is connected to the FPGA of the QONG board
and not to the NFC controller. For this reason, the FPGA must
be set and initialized before accessing to the NAND itself.
Signed-off-by: Stefano Babic <sbabic@denx.de>
moved CONFIG_CMD_FAT to filesystem section
swapped CONFIG_CMD_NAND and CONFIG_CMD_MII so they are alpha correct
Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
This patch includes a few additional commands in the sheevaplug
version of u-boot:
- support for LONGHELP so you can get help messages
- auto completion and command editing
- ubi and mii support
- ext2 filesystem (convenient if you have an ext2 from which you want to boot)
- jffs2 and ubifs filesystems (if you want to use these in NAND)
This also makes it more similar to openrd client.
Side effect of this patch is that the code now needs 3 sectors i.s.o. 2
so an existing env is overwritten
Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
The lowlevel_init file contained some hard-coded values
to setup the RAM. These board related values are moved into
the board configuration file.
Signed-off-by: Stefano Babic <sbabic@denx.de>
This patch adds support for the magnesium board from
projectiondesign. This board uses i.MX27 SoC and has
8MB NOR flash, 128MB NAND flash, FEC ethernet controller
integrated into i.MX27. As this port is based on
the imx27lite port, common config options are collected
in include/configs/imx27lite-common.h
Signed-off-by: Heiko Schocher <hs@denx.de>
Because of other s5p series SoC will use these serial functions,
modify function's name and structure's name.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch fixes APC405 build, by defining CONFIG_PPC4XX_I2C. This is
needed since the move of the PPC4xx I2C driver into the drivers/i2c
directory.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
This patch adds support for the Mosaix Technologies, Inc. ICON board,
based on the AppliedMicro (AMCC) PPC440SPe. It's equipped with an SODIMM
(512MB standard) and 64MByte of NOR FLASH.
Support for the onboard SM502 will be added later.
Signed-off-by: Stefan Roese <sr@denx.de>
This is a generic approach to port u-boot for nios2 boards.
You may find the usage of this approach on the nioswiki,
http://nioswiki.com/DasUBoot
A fpga parameter file, which contains base address information
and drivers declaration, is generated from Altera's hardware system
description sopc file using tools.
The example fpga parameter file is compatible with EP1C20, EP1S10
and EP1S40 boards. So these boards can be removed after this commit.
Though epcs controller is removed to cut the dependency of altera_spi
driver.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
PDM360NG is a MPC5121E based board by ifm ecomatic gmbh.
Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Configure CONFIG_SYS_MAX_RAM_SIZE address range in
DDR Local Access Window and determine the RAM size.
Fix DDR LAW afterwards using detected RAM size.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Extend mpc512x serial driver to support multiple PSC ports.
Subsequent patches for PDM360NG board support make use of this
functionality by defining CONFIG_SERIAL_MULTI in the board config
file. Additionally the used PSC devices are specified by defining
e.g. CONFIG_SYS_PSC1, CONFIG_SYS_PSC4 and CONFIG_SYS_PSC6.
Support for PSC devices other than 1, 3, 4 and 6 is not added
by this patch because these aren't used currently. In the future
it can be easily added using DECLARE_PSC_SERIAL_FUNCTIONS(N) and
INIT_PSC_SERIAL_STRUCTURE(N) macros in cpu/mpc512x/serial.c.
Additionally you have to add code for registering added
devices in serial_initialize() in common/serial.c.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Subsequent patch extends mpc512x serial driver to support
multiple PSC ports. The driver will provide an uninit()
function to stop the serial controller and to disable the
controller's clock. Adding uninit() entry to struct serial_device
allows disabling the serial controller after usage of
a stdio serial device.
This patch adds uninit() entry to the struct serial_device
and fixes initialization of this structure in the code
accordingly.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
On some Freescale SoC Internal DMA of eSDHC controller has bug.
So PIO Mode has been introduced to do data transfer using CPU.
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
before, MPC8349ITX boots u-boot in 4.3sec:
column1 is elapsed time since first message
column2 is elapsed time since previous message
column3 is the message
0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX
0.000 0.000:
0.000 0.000: Reset Status:
0.000 0.000:
0.032 0.032: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.032 0.000: Board: Freescale MPC8349E-mITX
0.032 0.000: UPMA: Configured for compact flash
0.032 0.000: I2C: ready
0.061 0.028: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
1.516 1.456: FLASH: 16 MB
2.641 1.125: PCI: Bus Dev VenId DevId Class Int
2.652 0.011: 00 10 1095 3114 0180 00
2.652 0.000: PCI: Bus Dev VenId DevId Class Int
2.652 0.000: In: serial
2.652 0.000: Out: serial
2.652 0.000: Err: serial
2.682 0.030: Board revision: 1.0 (PCF8475A)
3.080 0.398: Net: TSEC1: No support for PHY id ffffffff; assuming generic
3.080 0.000: TSEC0, TSEC1
4.300 1.219: IDE: Bus 0: .** Timeout **
after, MPC8349ITX boots u-boot in 3.0sec:
0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX
0.010 0.000:
0.010 0.000: Reset Status:
0.010 0.000:
0.017 0.007: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
0.017 0.000: Board: Freescale MPC8349E-mITX
0.038 0.020: UPMA: Configured for compact flash
0.038 0.000: I2C: ready
0.038 0.000: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
0.260 0.222: FLASH: 16 MB
1.390 1.130: PCI: Bus Dev VenId DevId Class Int
1.390 0.000: 00 10 1095 3114 0180 00
1.390 0.000: PCI: Bus Dev VenId DevId Class Int
1.400 0.010: In: serial
1.400 0.000: Out: serial
1.400 0.000: Err: serial
1.400 0.000: Board revision: 1.0 (PCF8475A)
1.832 0.432: Net: TSEC1: No support for PHY id ffffffff; assuming generic
1.832 0.000: TSEC0, TSEC1
3.038 1.205: IDE: Bus 0: .** Timeout **
also tested on these boards (albeit with a less accurate
boottime measurement method):
seconds: before after
8349MDS ~2.6 ~2.2
8360MDS ~2.8 ~2.6
8313RDB ~2.5 ~2.3 #nand boot
837xRDB ~3.1 ~2.3
also tested on an 8323ERDB.
v2: also remove the delayed icache enablement assumption in arch ppc's
board.c, and add a CONFIG_MPC83xx define in the ITX config file for
consistency (even though it was already being defined in 83xx'
config.mk).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
As discussed on the list, move "arch/ppc" to "arch/powerpc" to
better match the Linux directory structure.
Please note that this patch also changes the "ppc" target in
MAKEALL to "powerpc" to match this new infrastructure. But "ppc"
is kept as an alias for now, to not break compatibility with
scripts using this name.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Anatolij Gustschin <agust@denx.de>
This patch adds a callpoint in i2c_init that allows board specific
i2c board initialization (typically for i2c bus reset) that is called
after i2c_init operations, allowing the i2c_board_late_init function
to use the pre-configured i2c bus speed and slave address.
The 440SPe Rev. A is quite old and newer 440SPe boards don't need support
for this CPU revision. Since removing support for this older version
simplifies the creation for newer U-Boot ports, this patch now enables
440SPe > Rev. A support by creating the CONFIG_440SPE_REVA define. By
defining this in the board config header, Rev. A will still be supported.
Otherwise (default for newer board ports), Rev. A will not be supported.
Signed-off-by: Stefan Roese <sr@denx.de>
The latest changes increased the size of the alpr image a bit more.
Now it doesn't fit into the 256k reserved for it. This patch now removes
the commands "loads" and "loadb" which are not needed in the production
systems.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The appropriate include/asm-$ARCH directory should already by symlinked
to include/asm so using the whole "asm-$ARCH" path is unnecessary.
This change should also allow us to move the include/asm-$ARCH
directories into their appropriate lib/$ARCH/ directories.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Now that the other architecture-specific lib directories have been
moved out of the top-level directory there's not much reason to have the
'_generic' suffix on the common lib directory.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Also move lib_$ARCH/config.mk to arch/$ARCH/config.mk
This change is intended to clean up the top-level directory structure
and more closely mimic Linux's directory organization.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The MPC8536DS_NAND SPL build was failing due to code size increase
introduced by commit:
commit 33f57bd553
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Fri Mar 26 15:14:43 2010 -0500
85xx: Fix enabling of L1 cache parity on secondary cores
We built in some NS16550 functions that we dont need and can get
rid of them via CONFIG_NS16550_MIN_FUNCTIONS.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The Freescale P2020DS board uses a new type of PIXIS FPGA, called the ngPIXIS.
The ngPIXIS has one distinct new feature: the values of the on-board switches
can be selectively overridden with shadow registers. This feature is used to
boot from a different NOR flash bank, instead of having a register dedicated
for this purpose. Because the ngPIXIS is so different from the previous PIXIS,
a new file is introduced: ngpixis.c.
Also update the P2020DS checkboard() function to use the new macros defined
in the header file.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Refactor and document the Freescale PIXIS code, used on most 85xx and 86xx
boards. This makes the code easier to read and more flexible.
Delete pixis.h, because none of the exported functions were actually being
used by any other file. Make all of the functions in pixis.c 'static'.
Remove "#include pixis.h" from every file that has it.
Remove some unnecessary #includes.
Make 'pixis_base' into a macro, so that we don't need to define it in every
function.
Add "while(1);" loops at the end of functions that reset the board, so that
execution doesn't continue while the reset is in progress.
Replace in_8/out_8 calls with clrbits_8, setbits_8, or clrsetbits_8, where
appropriate.
Replace ulong/uint with their spelled-out equivalents. Remove unnecessary
typecasts, changing the types of some variables if necessary.
Add CONFIG_SYS_PIXIS_VCFGEN0_ENABLE and CONFIG_SYS_PIXIS_VBOOT_ENABLE to make
it easier for specific boards to support variations in the PIXIS registers
sets. No current boards appears to need this feature.
Fix the definition of CONFIG_SYS_PIXIS_VBOOT_MASK for the MPC8610 HPCD.
Apparently, "pixis_reset altbank" has never worked on this board.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The HID1[MBDD] bit is new on rev5.0 or greater cores and will optimize
the performance of mbar/eieio instructions.
Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added P1012/P1013/P1021/P1022 to cpu_type_list and SVR list
* Added number of LAWs for P1012/P1013/P1021/P1022
* Set CONFIG_MAX_CPUS to 2 for P1021/P1022
* PCI port config
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Switch to the SMC911X driver by default now, and fix LDR env settings.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add a helper function that given an alias will delete both the node
the alias points to and the alias itself
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
When we set the read or write watermark in WML we should maintain the
rest of the register as is, rather than using some hard coded value.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
To support multiple block read command we must set abort or use auto
CMD12. If we booted from eSDHC controller neither of these are used
and thus we need to reset the controller to allow multiple block read
to function.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We need to stop the clocks on 83xx/85xx as well as imx. No need to make
this code conditional to just imx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefano Babic <sbabic@denx.de>
This patch moves the PPC4xx specific I2C device driver into the I2C
drivers directory. All 4xx config headers are updated to include this
driver.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is part of migrating the AT91 support towards
using C struct for all SOC access.
It removes one more CONFIG_AT91_LEGACY warning.
at91_pmc.h needs cleanup after migration of the drivers
has been done.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
CONFIG_CMD_AUTOSCRIPT support is deprecated and non-existing
This clean up patch removes the references for esd boards
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be
loaded over tftp.
The preinit function will configure GPIO (GPK0CON) & SROMC to look
for environment in SROM Bank 3.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Nand Flash, Ethernet, other features might need to configure the
SROMC registers accordingly.
The config_sromc() functions helps with this.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Memory subsystem of S5PC100 handles SROM, SRAM, OneDRAM, OneNand,
NAND Flash, DDRs.
smc.h is a common place for the register description of Memory subsystem
of S5PC100.
Note: Only SROM related registers are descibed now.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The get_pll_clk(int) API returns the PLL frequency based on
the (int) argument which is defined locally in clock.c
Moving that #define to common header file (clk.h) would
be helpful when using the API from other files.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
CONFIG_SYS_HZ was being calculated (incorrectly) in nios2 configuration
headers. Updated comments to accurately describe timebase macros.
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
The outx/writex macros were using writex(addr, val) rather than
the standard writex(val, addr), resulting in incompatibilty with
architecture independent components. This change set uses standard
parameter order.
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Copy from linux header. This is needed for generic bitops.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
The standard Altera UART & JTAG UART as well as the OpenCores
YANU driver are now in individual files in drivers/serial
rather than a single file uner cpu/nios2.
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
After determining how much DDR is actually in the system, set DBAT0 and
IBAT0 accordingly. This ensures that the CPU won't attempt to access
(via speculation) addresses outside of actual memory.
On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB
and kept that way. If the system has less than 2GB of memory (typical for
an MPC8610 HPCD), the CPU may attempt to access this memory during
speculation. The zlib code is notorious for generating such memory reads,
and indeed on the MPC8610, uncompressing the Linux kernel causes a machine
check (without this patch).
Currently we are limited to power of two sized DDR since we only use a
single bat. If a non-power of two size is used that is less than
CONFIG_MAX_MEM_MAPPED u-boot will crash.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use the same code between primary and secondary cores to init the
L1 cache. We were not enabling cache parity on the secondary cores.
Also, reworked the L1 cache init code to match the e500mc L2 init code
that first invalidates the cache and locks. Than enables the cache and
makes sure its enabled before continuing.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The ml300 board has a number of issues, but nobody cares about this
long-orphaned board any more. Remove it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Michal Simek <monstr@monstr.eu>
The CF will call cache functions in lib_m68/cache.c and the
cache settings are defined in platform configuration file.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Reside Ethernet buffer descriptors in SRAM instead of DRAM. Add
CONFIG_SYS_TX_ETH_BUFFER in platform configuration file. Update
DRAM control and SRAM control register setting. Update cache
setting where size does not write to proper region.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Fix incorrect default environment for flash erase or protect
range. Change offset from 0 to 0xff80nnnn. Remove default
ethernet setup and MAC address.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Provide parameter passing to uart_port_config(). Update port
configuration - un-mask it before enable the bits.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Use correct definition for _MASK and _UNMASK. It was combined in
the previous used and causes confusion.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Using seperate function calls for each bit-bang of slave serial
load can be painfully slow. This patch adds the possibility to
supply a block write function that loads the complete block of
data in one call (like it can already be done with Altera FPGAs).
On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load
time from around 15 seconds to around 3 seconds
Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
This results in the PLLOUTB being greater than the CPU clock frequency
resulting unstable 440EPx operation resulting in various software hang
conditions.
This patch reprograms the FWDVA satisfying the requirement of setting FWDVB
to a value greater than 1 while using one of the four deafult bootstrap options.
Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
Acked-by : Victor Gallardo <vgallardo@appliedmicro.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The soft-i2c code for AT91 defines I2C_SOFT_DECLARATIONS
for direct access by dereferencing a pio pointer.
The OTC570 platform uses the AT91 gpio API so it does not
need the pio variable.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Allow overwriting defined partitions in the device tree blob
using partition info defined in the 'mtdparts' environment
variable.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Gerald Van Baren <vanbaren@cideas.com>
Add POST progress API implemented as weak calls before and after
each call to the POST test callback in the post_run_single routine
of the post.c file.
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
I executed 'find . -name "*.[chS]" -perm 755 -exec chmod 644 {} \;'
Signed-off-by: Thomas Weber <swirl@gmx.li>
Add some more: neither Makefile nor config.mk need execute permissions.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The new zlib code wants asm/unaligned.h, so have the Blackfin version pull
in the asm-generic/unaligned.h.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This is based on the asm-arm/unaligned.h, but made generic so all arches
that cannot do unaligned accesses can utilize it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This code has compile problems and the company does not even exist any
more. So we take the liberty to drop support for it.
Signed-off-by: Detlev Zundel <dzu@denx.de>
CC: Wolfgang Denk <wd@denx.de>
CC: Ben Warren <biggerbadderben@gmail.com>
The 36-bit build exceeds the 512k size we have. Removing FIT type image
support allows us to fit and we dont really use it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Also enable support for CONFIG_HWCONFIG because we use this for
configuring if this hardware has a FEC or not.
syntax:
hwconfig=fec:on if hardware has an fec
hwconfig=fec:off if hardware has no fec
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch uses gd->relocaddr variable to store uboot's relocated
address in RAM and shows it in bdinfo command.
This patch moves CONFIG_AMIGAONEG3SE style copying of the address
in board_init_f to just before relocation is actually done.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Tested-by: Detlev Zundel <dzu@denx.de>
* convert otc570 board to use c stucture SoC access
* change gpio access to at91_gpio syntax
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
The patch removes warnings at compile time and provides
some cleanup code:
- Removed comment on NAND (not yet supported) from lowlevel_init.S
- Removed NFMS bit definition from imx-regs.h
The bit is only related to MX.25/35 and can lead to confusion
- Moved is_soc_rev() to soc specific code (removed from mx51evk.c)
Signed-off-by: Stefano Babic <sbabic@denx.de>
Add support for the ARM part of the mgcoge2, named suen3.
This board is based on the Marvell Kirkwood (88F6281) SoC.
As there come more board variants, common config options
are collected in include/configs/km_arm.h. Also, this board
use common code for all keymile boards, which is stored in
board/keymile/common/common.c
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Heiko Schocher <hs@denx.de>
This is an i.MX25 base board with only NAND
so it uses nand_spl to boot.
Signed-off-by: John Rigby <jcrigby@gmail.com>
Tune configuration, add support for (redundant) environment in NAND.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
CC: Fred Fan <fanyefeng@gmail.com>
CC: Tom <Tom.Rix@windriver.com>
general cleanup
move clock init to cpu_eth_init in cpu/arm926ejs/mx27/generic.c
make MX27 specific phy init conditional on CONFIG_MX27
replace call to imx_get_ahbclk with one to imx_get_fecclk
and define imx_get_fecclk in include/asm-arm/arch-mx27/clock.h
Signed-off-by: John Rigby <jcrigby@gmail.com>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Fred Fan <fanyefeng@gmail.com>
CC: Tom <Tom.Rix@windriver.com>
ARM926EJS core with MX31 peripherals.
Signed-off-by: John Rigby <jcrigby@gmail.com>
Earlier Version Signed-off-by: Wolfgang Denk <wd@denx.de>
CC: Fred Fan <fanyefeng@gmail.com>
CC: Tom <Tom.Rix@windriver.com>
remove ifdef'd clock selection code from
serial_mxc.c and replace with call to imx_get_uartclk
Add definitions for imx_get_uartclk to imx31 and imx27
include files.
This makes it easier to add new imx platforms.
Signed-off-by: John Rigby <jcrigby@gmail.com>
The patch adds initial support for the Freescale mx51evk board.
Network (FEC) and SD controller (fsl_esdhc) are supported.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
The esdhc controller in the mx51 processor is quite
the same as the one in some powerpc processors
(MPC83xx, MPC85xx). This patches adapts the driver
to support the arm mx51.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Some Freescale's processors of different architecture
have the same peripheral (eSDHC controller in PowerPC
and i.MX51). This patch adds accessors for
the internal registers of the SOCs, as already
implemented in the PowerPC architecture.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Most controllers can check if there is a card in the slot.
However, they require pins that could be not available because
required by other functions and the detection of a card must
be performed in another way. This patch adds a weak function
that a board can implement to add its internal custom way
to check the presence of a MMC/SD card.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The patch add header files to support the pin multiplexer
of the the Freescale i.MX51 processor.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
The patch add header files to support the Freescale i.MX51
processor, setting definitions for internal registers.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
The patch add initial support for the Freescale i.MX51 processor
(family arm cortex_a8).
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fred Fan <fanyefeng@gmail.com>
Configuration defines should be preceeded with CONFIG_SYS_. Renamed
some at91 specific defines to conform to this naming convention:
AT91_CPU_NAME to CONFIG_SYS_AT91_CPU_NAME
AT91_MAIN_CLOCK to CONFIG_SYS_AT91_MAIN_CLOCK
Signed-off-by: Achim Ehrlich <aehrlich@taskit.de>
Reindent configuration header to limit line lenght to 80 characters by
removing obvious and sometimes misleading comments.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Limit line length to 80 characters mostly by removing obvious and sometimes
misleading comments. Fix indentation, too.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Adds support for ethernet networking on the da830evm platform.
This platform uses an SoC EMAC interface and a 3 port ethernet
switch as a PHY with an RMII interface. The PHY also has a i2c
interface for configuring the switch functions.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Recent kernels are using generic NAND and NOR drivers. Change
default mtdparts to reflect it.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Correct switching partitions after upgrade and make it more readable.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
lib_generic/zlib.c needs include/asm/unaligned.h since commit
cd514aeb99, which broke compilation for
Coldfire/M68K. This patch adds the missing header for these
architectures.
Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
zlib.c demands asm/unaligned.h. But, SH does not have these.
This commit add asm/unaligned.h and asm/unaligned-sh4a.h from Linux
kernel and modifyf for u-boot.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Corrected the bit field positions of the external master priority low
and the external master priority high values in the EBC configuration
register. These bit field positions differ between PPC405 and PPC440
processors
Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
and avoid e.g., two identical boards from causing random networking
conflicts when hooked up to the same network.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* new board (eb_cpux9k2)
* support for EB+CPUx9K2 board by BuS Elektronik GmbH & Co. KG
* select via make eb_cpux9k2_config
* this also demonstrates, how to use boards with AT91RM9200 cpu
in at91 arch tree
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* add's at91_emac (AT91RM9200) network driver (NET_MULTI api)
* enable driver with CONFIG_DRIVER_AT91EMAC
* generic PHY initialization
* modify AT91RM9200 boards to use NET_MULTI driver
* the drivers has been tested with LXT971 Phy and DM9161 Phy at MII and RMII
interface
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* prepare joining at91 and at91rm9200
* add modified copy of soc files to cpu/arm920t/at91 to make
possible to compile at91rm9200 boards in at91 tree instead
of at91rm9200
* add header files with c structure defs for AT91 MC, ST and TC
* the new cpu files are using at91 c structure soc access
* please read README.soc-at91 for details
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* add's a warning to all files, which need update to new SoC access
* convert common files in cpu/../at91 and a lot of drivers to use
c stucture SoC access
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* add a real AT91 GPIO driver instead of header inline code
* resolve the mixing of port and pins
* change board config files to use new driver
* add macros to gpio to realize backward compatibility
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
* add's the new temporary CONFIG_AT91_LEGACY to all board configs
This will need for backward compatiblity, while change the SoC access
to c structures. If CONFIG_AT91_LEGACY is defined, the deprecated
SoC is used.
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
The EVM UI extender card has a NAND device. This change will enable
saveenv to work with NAND and Linux to be booted using:
mtdparts default
nboot kernel
bootm
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The structure was missing a reserved entry (not listed in the manual,
actually), so the last registers had a wrong offset. This prevented
all swlocked registers to be modified as swlock is last in the structure.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Added support for the following EDB93xx boards:
EDB9301
EDB9302
EDB9302A
EDB9307
EDB9307A
EDB93012
EDB9315
EDB9315A
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
This patch removes "CONFIG_CMD_JFFS" from the board config
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Every omap3 board config file declared the global variable gpmc_cfg.
This changes moves the declaration to a better location in the
arch dependent header file cpu.h.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for esd gmbh OTC570 board.
The OTC570 is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
This patch fixes building for AR405 boards by remove an unused feature.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Remove some unused features and default environment variable
to shrink the PMC440 u-boot.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
* add's at91_emac (AT91RM9200) network driver (NET_MULTI api)
* enable driver with CONFIG_DRIVER_AT91EMAC
* generic PHY initialization
* modify AT91RM9200 boards to use NET_MULTI driver
* the drivers has been tested with LXT971 Phy and DM9161 Phy at
MII and RMII interface
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
There's no sensible reason to unite speed and interface type into
one variable. So split this variable enet_interface into two
vars: enet_interface_type, which hold the interface type and speed.
Also: add the possibility for switching between 10 and 100 MBit
interfaces on the fly, when running in FAST_ETH mode.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The EMAC IP on DM365, DM646x and DA830 is slightly different
from that on DM644x. This change updates the DaVinci EMAC driver
so that EMAC becomes operational on SOCs with EMAC v2.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The TSEC_FIBER flag should be set when a PHY is operating with an
external fiber interface. Currently it is only used to notify a user
that the PHY is operating in fiber mode.
A short description was also added to the other TSEC flag defines so
that it is clear how they differ from one another.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The BCM5482 PHY supports both copper and fiber as an ethernet medium.
By enabling its copper/fiber mode auto-detection feature it can
dynamically determine if it should be configured for copper or fiber.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This is generally good practice and saves ~150 bytes.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This adds support for the CLCD logic cell. It accepts precompiled
register values for specific configuration through a board-supplied
data structure. It is used by the Nomadik nhk8815, added by a later
patch in this series.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
MX25 has a different version of the fsl_nfc
flash controller known as version 1.1.
Add support to the nand_spl fsl_nfc driver
Versioning differs from mainline mxc kernel driver
no consensus yet on if the naming here and in
Redboot or the kernel is "correct".
Signed-off-by: John Rigby <jcrigby@gmail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
CC: Scott Wood <scottwood@freescale.com>
Add a disable sub-command to the cpu command that allows for disabling
cores in multicore processors. This can be useful for systems that are
using multicore chips but aren't utilizing all the cores as a way to
reduce power and possibly improve performance.
Also updated an added missing copyright.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
r14 is not supposed to be clobbered by functions. Switch
to r12 and call GET_GOT when needed. This will allow u-boot
to loose the -ffixed-r14 gcc option.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Using the GOT in IRQ handlers requires r14 to be -ffixed-r14.
Avoid this by relocatate transfer_to_handler too.
This will allow to free up r14 later on.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Fix typo in SYSCTL_CLOCK_MASK, which caused residual in high bits of SDCLKFS.
Signed-off-by: Jin Qing <B24347@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If you really want to slim down U-Boot and you would rather use a higher
compression scheme (like LZMA), it'd be nice to disable gzip/zlib since
these code bases take up a significant amount of space.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds support for "imximage" (MX Boot Image)
to the mkimage utility. The imximage is used on the Freescales's
MX.25, MX.35 and MX.51 processors.
Further details under doc/README.imximage.
This patch was tested on a Freescale mx51evk board.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Normally the processor clock has a divisor of 2.
In some cases this this needs to be set to 4.
Check the user has set environment mdiv to 4 to change the divisor.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
SPEAr320 SoC support contains basic spear320 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
- emi driver(cfi support)
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr310 SoC support contains basic spear310 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
- emi driver(cfi support)
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr310 and SPEAr320 SoCs contain an EMI controller to interface
Paraller NOR flashes. This patch adds the support for this IP
The standard CFI driver is used to interface with NOR flashes
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr300 SoC support contains basic spear300 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
Signed-off-by: Vipin <vipin.kumar@st.com>
This patch adds the support to read and write mac id from i2c
memory.
For reading:
if (env contains ethaddr)
pick env ethaddr
else
pick ethaddr from i2c memory
For writing:
chip_config ethaddr XX:XX:XX:XX:XX:XX writes the mac id
in i2c memory
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr600 SoC support contains basic spear600 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr SoCs contain a synopsys usb device controller.
USB Device IP can work in 2 modes
- DMA mode
- Slave mode
The driver adds support only for slave mode operation of usb
device IP. This driver is used along with standard USBTTY
driver to obtain a tty interface over USB on the host
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr SoCs contain an FSMC controller which can be used to interface
with a range of memories eg. NAND, SRAM, NOR.
Currently, this driver supports interfacing FSMC with NAND memories
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr SoCs contain a serial memory interface controller. This
controller is used to interface with spi based memories.
This patch adds the driver for this IP.
Signed-off-by: Vipin <vipin.kumar@st.com>
SPEAr Architecture support added. It contains the support for
following SPEAr blocks
- Timer
- System controller
- Misc registers
Signed-off-by: Vipin <vipin.kumar@st.com>
These are few files directly imported from Linux kernel source.
Those are not modifyed at all ar per strategy.
These files contains source with GPLv2 only
whereas u-boot expects GPLv2 or latter
These files are updated for the same from prior permission from original writes
Acked-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Because of v7_flush_dcache_all is moved to omap3/cache.S
and s5pc110 needs cache routines, update s5pc1xx cache routines.
l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S
and invalidate_dcache is modified for SoC specific.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control
for S3C6400. In the configuration of SMDK6400, however, two 16-bit
mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit
memory bus and there is no need to control CKE for each chip
separately. AFAIK, CKE1 is not at all connected. Only CKE0 is
used. Futhermore, it should be '0' always for S3C6410. When tested
with a board which has a S3C6410 and the same memory configuration,
a side effect is observed that u-boot command "reset" doesn't work
leading to system hang. Leaving the bit clear is safe in most cases.
Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
A newer CPLD version on the 405EX evaluation board requires a different
EBC controller setup for the CPLD register access. This patch adds a CPLD
version detection for Kilauea and code to reconfigure the EBC controller
(chip select 2) for the old CPLD if no new version is found.
Additionally the CPLD version is printed upon bootup:
Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0)
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Cc: Zhang Bao Quan <bqzhang@udtech.com.cn>
The u-boot command structures don't get used with host systems, so don't
bother including it when building host code. This avoids an implicit need
on config.h in the process.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The sha1 code is currently compiled for everyone, but in reality, it's
only used by the FIT code. So make it optional just like MD5.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
with a few adjustments for U-Boot. This fixes the following build error:
make -C lib_generic/
zlib.c:31:27: error: asm/unaligned.h: No such file or directory
zlib.c: In function 'inflate_fast':
zlib.c:641: warning: implicit declaration of function 'get_unaligned'
make[1]: *** [zlib.o] Error 1
make[1]: Leaving directory `/home/skuribay/git/u-boot.git/lib_generic'
make: *** [lib_generic/libgeneric.a] Error 2
Reported-by: Himanshu Chauhan <himanshu@symmetricore.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
We need signal.h for Blackfin/KGDB, so import the asm-generic/signal.h
for people to leverage.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
- CONFIG_ENV_EEPROM_IS_ON_I2C
define this, if you have I2C and SPI activated, and your
EEPROM, which holds the environment, is on the I2C bus.
- CONFIG_I2C_ENV_EEPROM_BUS
if you have an Environment on an EEPROM reached over
I2C muxes, you can now define, how to reach this
EEPROM.
Signed-off-by: Heiko Schocher <hs@denx.de>
the macros likely and unlikely were defined in include/linux/mtd/compat.h,
but used in code not related to MTD. moved the macro definitions to compiler.h
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
There are a bunch of features in U-Boot that we want to enable by default,
and it's best if we centralize them in one place rather than updating all
the board files out there.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When referring to PCIe and USB 'endpoint' is the standard naming
convention.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
There are boards out there that do not have network support in
U-Boot (CONFIG_CMD_NET not set), but they do so in Linux. This
makes it desirable to be able to port network configuration (like
the IP address) to the Linux kernel.
We should not make the passing of the IP configuration to Linux
dependent on U-Boot features / settings.
For this, make getenv_IPaddr() global. This fixes build error
u-boot/lib_xxx/board.c:360: undefined reference to `getenv_IPaddr'
on various architectures.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
The new board revision has a different LCD.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some common code uses more of the io.h funcs than we currently provide, so
pull in all of the ones from the linux kernel.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These need to be rethought, but until that happens, isolate the hack so
that we can extend the common code without breaking things.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Very little additional code overhead, and only works when the user sets an
env var ahead of time, so default to on makes sense.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The tinyboards like to run at a little lower voltage than the default, and
they prefer to boot over the network. For the latter, extend the common
code a little to make this easier.
Also fix the cm-bf527 env sector size while we're in here to reflect the
flash that is actually in use.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the common config option for extracting the environment for embedding
into LDR files and clarify the LDR-specific option.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Support for LZARI compression mode was added based on a MTD CVS
snapshot of March 13, 2005. However, fs/jffs2/compr_lzari.c contains
contradictory licensing terms: the original copyright clause says "All
rights reserved. Permission granted for non-commercial use.", but
later reference to the file 'LICENCE' in the jffs2 directory was added
which says GPL v2 or later.
As no boards ever used LZARI compression, and this file is also not
present in recent MTD code, we resolve this conflict by removing the
conflicting file and references to it.
Also copy the referenced but missing file 'LICENCE' from the current
MTD source tree.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Adds required definitions for EHCI support in sequoia configuration file.
But still keeps the OHCI as default driver.
Signed-off-by: Chris Zhang <chris@seamicro.com>
Adding USB configuration. Default is set for USB MSC host.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
Added DA8xx GPIO base addresses in gpio_defs.h and pointers
to different BANKs which can be used to program GPIOs.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
Add support to configure bus parking mode and master in bus arbitration
configuration (ACR). Add this for the kmeter1 port:
Configure bus arbiter with recommended values from Freescale
to improve bus latency/throughput for application with
intensive QuiccEngine activity.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The caddy2 is a variant of the already supported vme8349. So we just
add the differences to this board port. To better support those two
boards we switched from fixed SDRAM configuration to usage of
spd_sdram(). This is done by providing a board specific SPD EEPROM
routine with different values for both boards.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
changed to use mkconfig -t option instead, plus misc codingstyle fixes.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The core support for NAND booting is there already, so this patch
is pretty straightforward.
There is one trick though: top level Makefile expects nand_spl to
be in nand_spl/board/$(BOARDDIR), but we can fully reuse the code
from mpc8313erdb boards, and so to not duplicate the code we just
symlink nand_spl/board/freescale/mpc8315erdb to mpc8313erdb.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
o silence make during ln echo
o update documentation
o and avoid:
$ ./MAKEALL MPC8315ERDB_NAND
Configuring for MPC8315ERDB board...
sdram.o: In function `fixed_sdram':
/home/r1aaha/git/u-boot/nand_spl/board/freescale/mpc8313erdb/sdram.c:72: undefined reference to `udelay'
by renaming udelay -> __udelay in the spirit of commit
3eb90bad65 "Generic udelay() with watchdog
support".
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Different boards may require different settings of Dynamic ODT (Rtt_Wr).
We provide a means to allow the board specific code to provide its own
value of Rtt_Wr.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
add the override for write leveling sampling and
start time according to specific board.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Thanks to "Errata to MPC8569E PowerQUICC III Integrated Host Processor
Family Reference Manual, Rev. 0" document, which describes all eSDHC
pins, we can add 4-bits eSDHC support for MPC8569E-MDS boards.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Various SoC errata are specific to a given revision of silicon. This
patch gives us a simple macro to use when doing such tests.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Now that we dynamically determine TLB CAM entries to use we dont need
CONFIG_SYS_DDR_TLB_START anymore.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We need to track which TLB CAM entries are used to allow us to
"dynamically" allocate entries later in the code. For example the SPD
DDR code today hard codes which TLB entries it uses. We can now make
that pick entries that are free.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
All users of is_fsl_pci_agent have been converted to fsl_is_pci_agent
that uses the standard PCI programming model to determine host vs
agent/end-point.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.
Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.
This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.
Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.
Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Added immap definition for SERDES registers on p4080, the USB offset
(since it was missing) and a GPL header.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Davinci: NAND enable ECC even when not in NAND boot mode
On Davinci platforms, the default NAND device is enabled (for ECC)
in low level boot code when NAND boot mode is used. If booting in
another mode, NAND ECC is not enabled. The driver should make
sure ECC is enabled regardless of boot mode if NAND is configured
in U-Boot.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Davinci: Configurable NAND chip selects
Add a CONFIG_SYS_NAND_CS setting to all davinci configs and
use it to setup the NAND controller in the davinci_nand
mtd driver.
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
A number of config files define the V_PROMPT macro for the
command-line prompt, only to immediately use that macro to define
CONFIG_SYS_PROMPT, making V_PROMPT entirely superfluous.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Not all boards have both LEDs hooked, so enabling both on
boards with single LED will just waste power. Make it
possible to choose LEDs by adding argument to
twl4030_led_init().
Using this turn on only LEDB for pandora, leave both LEDs
on for all other boards, as it was before this patch.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
The latest changes increased the size of the alpr image a bit more.
Now it doesn't fit into the 256k reserved for it. This patch now removes
the commands "ping" and "diag" which are not needed in the production
systems.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
Prototype for gunzip/zunzip was only in lib_generic/gunzip.c and thus
repeated in every file using it. This patch moves the prototypes to
common.h and removes all prototypes distributed anywhere else.
Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
The preferred serial output comes from the debug board.
When the debug board is disconnected, fall back on using
usbtty from the usb connector on the Zoom2 board.
This shows up as /dev/ttyACM0 in a linux host.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Zoom2 needs to use these declarations and the include directory is a
better place from them than in the middle of the driver directory.
It did not make sense to create a new file for just a couple of
lines so they were appended to the serial.h
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The primary console of beagle is the serial header.
A secondary console is to use the usbtty. The user can set this
manually by doing
setenv stdout usbtty; setenv stdin usbtty; setenv stderr usbtty
saveenv
usbtty will be usable by accessing the /dev/ttyACM0 on a linux host.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The primary console of zoom1 is the serial out from the jumpers
accessed by removing the back panel.
A secondary console is to use the usbtty. The user can set this
manually by doing
setenv stdout usbtty; setenv stdin usbtty; setenv stderr usbtty
saveenv
usbtty will be usable by accessing the /dev/ttyACM0 on a linux host.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
This change adds the usb device support for musb.
Omap3 platform support added at the same level as davinci.
The interface for usbtty to use the musb device support was added.
Verified on omap3 beagle, zoom1 and zoom2.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The twl4030 provides a PHY device for connecting a link device,
like musb, to physical connection.
This change adds the twl4030 usb registers and functions for
initializing the PHY as required by omap3.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The header files usb.h and usbdescriptors.h have the same nameed
structure definitions for
usb_config_descriptor
usb_interface_descriptor
usb_endpoint_descriptor
usb_device_descriptor
usb_string_descriptor
These are out right duplicates in usb.h
usb_device_descriptor
usb_string_descriptor
This one has extra unused elements
usb_endpoint_descriptor
unsigned char bRefresh
unsigned char bSynchAddress;
These in usb.h have extra elements at the end of the usb 2.0
specified descriptor and are used.
usb_config_descriptor
usb_interface_descriptor
The change is to consolidate the definition of the descriptors
to usbdescriptors.h. The dublicates in usb.h are removed.
The extra element structure will have their name shorted by
removing the '_descriptor' suffix.
So
usb_config_descriptor -> usb_config
usb_interface_descriptor -> usb_interface
For these, the common descriptor elements are accessed now
by an element 'desc'.
As an example
- if (iface->bInterfaceClass != USB_CLASS_HUB)
+ if (iface->desc.bInterfaceClass != USB_CLASS_HUB)
This has been compile tested on MAKEALL arm, ppc and mips.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
A previous Commit converted the LAN91C96 Ethernet driver to using the
CONFIG_NET_MULTI API, but did not include full board support. This patch
finishes the job.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Neither the MVBLUE nor its underlying architecture implement the
do_irqinfo() function which is required when CONFIG_CMD_IRQ is defined.
This change fixes the following MVBLUE compiler error:
-> ./MAKEALL MVBLUE
Configuring for MVBLUE board...
common/libcommon.a(cmd_irq.o):(.u_boot_cmd+0x24): undefined reference to `do_irqinfo'
make: *** [u-boot] Error 1
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
The support for this was silently dropped by a configuration
split during the merge of the imx27lite board support in commit
864aa034f3 (cmd_mtdparts: Move to common
handling of FLASH devices via MTD layer).
Signed-off-by: Detlev Zundel <dzu@denx.de>
This chip is equipped for example on the esd PMC-ETH2-GB board. So let's
add it to the list of supported chips to the e1000 driver.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This modification is NOT tested on any of the
platforms modified as I dont have them. please
help by testing+building+fixing
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Enable the NET MULTI option and remove build warning
Tested: SDP3430
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Make the lan91c96 driver capable of CONFIG_NET_MULTI
to be clean for the new arch, add a a lil detect function
Most of the formatting change was done to keep checkpatch
silent, but a few functions and #if 0ed code which
does not make sense for NET_MULTI have been removed
Now, use the lan91c96_initialize() function to init the driver
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
There is more and more usage of printing 64bit values,
so enable this feature generally, and delete the
CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL
defines.
Signed-off-by: Heiko Schocher <hs@denx.de>
We are using generic implementation of ffs. This should
be part of Simon's commit 0413cfecea
Here is warning message which this patch removes.
In file included from /tmp/u-boot-microblaze/include/common.h:38,
from cmd_mtdparts.c:87:
/tmp/u-boot-microblaze/include/linux/bitops.h:123:1: warning: "ffs" redefined
In file included from /tmp/u-boot-microblaze/include/linux/bitops.h:110,
from /tmp/u-boot-microblaze/include/common.h:38,
from cmd_mtdparts.c:87:
/tmp/u-boot-microblaze/include/asm/bitops.h:269:1:
warning: this is the location of the previous definition
Signed-off-by: Michal Simek <monstr@monstr.eu>
A typo caused the stack and malloc regions to overlap, which prevented
mem_malloc_init() from returning. This commit makes the memory layout match
the example described in include/configs/microblaze-generic.h
Signed-off-by: Graeme Smecher <graeme.smecher@mail.mcgill.ca>
Signed-off-by: Michal Simek <monstr@monstr.eu>
add the following commands for the manroland boards:
CONFIG_CMDLINE_EDITING
CONFIG_COMMAND_HISTORY
CONFIG_AUTO_COMPLETE
Signed-off-by: Heiko Schocher <hs@denx.de>
Add lzop decompression support to the existing lzo bitstream handling
(think gzip versus zlib), and support it for uImage decompression if
CONFIG_LZO is enabled.
Lzop doesn't compress as good as gzip (~10% worse), but decompression
is very fast (~0.7s faster here on a slow ppc). The lzop decompression
code is based on Albin Tonnerre's recent ARM Linux lzo support patch.
Cc: albin.tonnerre@free-electrons.com
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
According to the PPC reference implementation the udelay() function is
responsible for resetting the watchdog timer as frequently as needed.
Most other architectures do not meet that requirement, so long-running
operations might result in a watchdog reset.
This patch adds a generic udelay() function which takes care of
resetting the watchdog before calling an architecture-specific
__udelay().
Signed-off-by: Ingo van Lil <inguin@gmx.de>
We will get compilation warnings without
"CONFIG_SYS_64BIT_VSPRINTF" being defined
in the board config.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for A320 evaluation board from Faraday. This board
uses FA526 processor by default and has 512kB and 32MB NOR flash, 64M RAM.
FA526 is an ARMv4 processor and uses the ARM920T source in this patch.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Defaults are for Infineon DDR timings.
Since none of the supported boards currently do
XIP boot, these seem to be faulty. fix the values
as per the calculations(ACTIMA,B), conf
the sdrc power with pwdnen and wakeupproc bits
Signed-off-by: Nishanth Menon <nm@ti.com>
Integrate DA830 EVM support into U-Boot.
Provides initial support for TI OMAP-L137/DA830 SoC devices on a Spectrum
Digital EVM board. See http://www.spectrumdigital.com/
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
Provides initial support for TI OMAP-L1x/DA8xx SoC devices.
See http://www.ti.com
The DA8xx devices are similar to DaVinci devices but have a differing
memory map and updated peripheral versions.
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This patch adds a unified s3c24x0 cpu header file that selects the header
file for the specific s3c24x0 cpu from the SOC and CPU configs defined in
board config file. This removes the current chain of s3c24-type #ifdef's
from the s3c24x0 code.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Fix stack_setup to place the stack on the correct address in DRAM
accroding to U-Boot standard and remove conditional compilation by
CONFIG_MEMORY_UPPER_CODE macro that is not necessry. This macro
was introduced and used only by this board for some unclear reason.
The definition of this macro is also removed because it's not
referenced elsewhere.
Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Tested-by: Minkyu Kang <mk7.kang@samsung.com>
Cleans up the s3c24x0 header files:
s4c24x0.h: removes the use of 'volatile' from the S3C24X0_REG8,
S3C24X0_REG16 and S3C24X0_REG32 register typedef's. Registers are always
accessed using the IO accessor functions which cast the register address
as 'volatile' anyway so it isn't required here.
s3c2400.h and s3c2410.h: insert a blank line between the static inline
functions
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
This patch moves the s3c24x0 header files from include/ to
include/asm-arm/arch-s3c24x0/.
checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due
to a non-UTF8 character in David M?ller's name:
ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8
#489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3:
+ * David M?ller ELSOFT AG Switzerland. d.mueller@elsoft.ch
As David's name correctly contains a non-UTF8 character I haven't fixed
these errors.
The 3 warnings were all because of the use of 'volatile' in s3c24x0.h:
WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35:
+typedef volatile u8 S3C24X0_REG8;
+typedef volatile u16 S3C24X0_REG16;
+typedef volatile u32 S3C24X0_REG32;
I'll fix these errors in another patch.
Tested by running MAKEALL for ARM8 targets and ensuring there were no new
errors or warnings.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The autoupdate feature is not used on PLU405 boards.
So remove it.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch cleans up the PPC4xx I2C intrastructure:
- Use C struct to describe the I2C registers instead of defines
- Coding style cleanup (braces, whitespace, comments, line length)
- Extract common code from i2c_read() and i2c_write()
- Remove unneeded IIC defines from ppc405.h & ppc440.h
Signed-off-by: Stefan Roese <sr@denx.de>
This patch shrinks the PMC440 u-boot binary (from next branch)
to fit into 384kB again.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
The latest changes in the u-boot/next branch increased the size of the
alpr image a bit more. Now it doesn't fit into the 256k reserved for it.
This patch now removes the commands "askenv" and "irq" which are not
needed in the production systems.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
This patch removes the duplicted implementations of the pci_master_init()
function by introducing a weak default function for it. It can be
overridden by a board specific version.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the duplicted implementations of the pci_target_init()
function by introducing a weak default function for it. This weak default
has a different implementation for 440EP(x)/GR(x) PPC's. It can be
overridden by a board specific version (e.g. PMC440, korat).
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
NANDs with page size of lesser than and equal to 2K are
reaching EOL. They are bing replaced with NANDs of
page size 4K and above.
To support this we have to extend the eccpos field
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch fixes an ugly behavior of the IL712 magnetic couplers
as used on PLU405. These parts will remember their last state
over a power cycle which might cause unwanted behavior.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is in preparation for the upcoming PLU405 board fix.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Add support to use second and third I2C bus, too.
Bus 0 is still the default, but by calling i2c_set_bus_num(1/2) before doing
I2C accesses, code can switch to bus 1 and 2, too. Don't forget to switch
back afterwards, then.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Define and use CONFIG_ENV_ADDR_FLEX and CONFIG_ENV_SIZE_FLEX
for storing environment variables.
Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com>
Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
This patch adds support for Flex-OneNAND devices.
Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com>
Signed-off-by: Amul Kumar Saha <amul.saha@samsung.com>
This patch adds support for NANDs greater than 2 GB.
Patch is based on the MTD NAND driver in the kernel.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Both lpd7a400 and lpd7a404 failed to compile because they had
CONFIG_SMC_USE_IOFUNCS defined:
examples/standalone/smc91111_eeprom.c:388: undefined reference to `SMC_outw'
Also removed an orphaned paren in lpd7a404.h
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch fixes a problem only seen very occasionally on Canyonlands.
The NOR flash interface (CFI driver) doesn't work reliably in all cases.
Erasing and/or programming sometimes doesn't work. Sometimes with
an error message, like "flash not erased" when trying to program an
area that should have just been erased. And sometimes without any error
messages. As mentioned above, this problem was only seen rarely and with
some PLL configuration (CPU speed, EBC speed).
Now I spotted this problem a few times, when running my Canyonlands with
the following setup (chip_config):
1000-nor - NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100
Changing the EBC configuration to not release the bus into high
impedance state inbetween the transfers (ATC, DTC and CTC bits set to 1
in EBC0_CFG) seems to fix this problem. I haven't seen any failure
anymore with this patch applied.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: David Mitchell <dmitchell@amcc.com>
Cc: Jeff Mann <MannJ@embeddedplanet.com>
This patch consolidates the PPC4xx board specific PCIe configuration
code. This way the duplicated code is removed. Boards can implement a
special, non standard behaviour (e.g. number of PCIe slots, etc) by
overriding the weak default functions.
Signed-off-by: Stefan Roese <sr@denx.de>
The asm-arm/unaligned.h includes linux/unaligned/access_ok.h
This file is unsafe to be used on ARM, since it does an unaligned memory
accesses which fails on ARM.
Lookin at Linux the basic difference seems to be the header
"include/asm-arm/unaligned.h". The Linux version of "unaligned.h"
does *not* include "access_ok.h" at all. It includes "le_byteshift.h"
and "be_byteshift.h" instead.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Stefan Roese <sr@denx.de>
--
include/asm-arm/unaligned.h | 3 -
include/linux/unaligned/be_byteshift.h | 70 +++++++++++++++++++++++++++++++++
include/linux/unaligned/le_byteshift.h | 70 +++++++++++++++++++++++++++++++++
3 files changed, 142 insertions(+), 1 deletion(-)
create mode 100644 include/linux/unaligned/be_byteshift.h
create mode 100644 include/linux/unaligned/le_byteshift.h
commit 70ed869e broke fsl pcie end-point initialization.
Returning 0 is not correct. The function must return the first free
bus number for the next controller.
fsl_pci_init() must still be called and a bus allocated even if the
controller is an end-point.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This reverts commit 70ed869ea5.
There isn't any need to modify the API for fsl_pci_init_port to pass the
status of host/agent(end-point) status. We can determine that
internally to fsl_pci_init_port. Revert the patch that makes the API
change.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds support for the board IPEK01 based on the MPC5200.
The Futjitsu Lime graphics controller is configured in 16 bpp mode.
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
In 16 bpp mode, the new IPEK01 board only requires swapping of D16 words
for D32 accesses due to the diffferent connecting to the GDC bus. This
patch introduces the configuration option VIDEO_FB_16BPP_WORD_SWAP,
which should be set for all board using the mb862xx in 16 bpp mode. For
the IPEK01, VIDEO_FB_16BPP_PIXEL_SWAP should not be set.
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
The new IPEK01 board can use the 32 bpp mode for the Lime graphics
controller. For this mode, video accelaration does not work. This patch
makes the accelaration configurable via CONFIG_VIDEO_MB862xx_ACCEL,
which is enabled for the lwmon5 and the socrates board for backward
compatibility.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
To avoid board-specific code accessing the mb862xx registers directly,
the public function mb862xx_probe() has been introduced. Furthermore,
the "Change of Clock Frequency" and "Set Memory I/F Mode" registers
are now defined by CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx__MMR,
respectively. The BSPs for the socrates and lwmon5 boards have been
adapted accordingly.
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
The comment for the BR0_PRELIM port size initialization incorrectly
stated 32 bit, while it's actually 16 bit. The code is correct.
Reported-by: Guenter Koellner <guenter.koellner@nsn.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Extend bootdelay to 10 seconds. Set boot retry time to 120 seconds and use
reset to retry. Define default bootcommand and bootargs for production.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Currently the CFI driver issues both AMD and Intel reset commands.
This is because the driver doesn't know yet which chips are connected.
This dual reset seems to cause problems with the M29W128G chips as
reported by Richard Retanubun. This patch now introduces a weak default
function for the CFI reset command, still with both resets. This can
be overridden by a board specific version if necessary.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Richard Retanubun <RichardRetanubun@ruggedcom.com>
The editenv command can be used to edit an environment variable.
Editing an environment variable is useful when one wants to tweak an
existing variable, for example fix a typo or change the baudrate in the
'bootargs' environment variable.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Simply add some defines, and adjust TLBe setup to include some
space for eLBC NAND.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2
(in 1-bit mode). When eSDHC is used, we should switch u-boot console to
UART1, and make the proper device-tree fixups.
Because of an erratum in prototype boards it is impossible to use eSDHC
without disabling UART0 (which makes it quite easy to 'brick' the board
by simply issung 'setenv hwconfig esdhc', and not able to interact with
U-Boot anylonger).
So, but default we assume that the board is a prototype, which is a most
safe assumption. There is no way to determine board revision from a
register, so we use hwconfig.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This change has 3 goals:
- Have secondary cores be released into spin loops at their 'true'
address in SDRAM. Previously, secondary cores were put into spin
loops in the 0xfffffxxx address range which required that boot page
translation was always enabled while cores were in their spin loops.
- Allow the TLB window that the primary core uses to access the
secondary cores boot page to be placed at any address. Previously, a
TLB window at 0xfffff000 was always used to access the seconary cores'
boot page. This TLB address requirement overlapped with other
peripherals on some boards (eg XPedite5370). By default, the boot
page TLB will still use the 0xfffffxxx address range, but this can be
overridden on a board-by-board basis by defining a custom
CONFIG_BPTR_VIRT_ADDR. Note that the TLB used to map the boot page
remains in use while U-Boot executes. Previously it was only
temporarily used, then restored to its initial value.
- Allow Boot Page Translation to be disabled on bootup. Previously,
Boot Page Translation was always left enabled after secondary cores
were brought out of reset. This caused the 0xfffffxxx address range
to somewhat "magically" be translated to an address in SDRAM. Some
boards may not want this oddity in their memory map, so defining
CONFIG_MPC8xxx_DISABLE_BPTR will turn off Boot Page Translation after
the secondary cores are initialized.
These changes are only applicable to 85xx boards with CONFIG_MP defined.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Originally written by Jason Jin and Mingkai Hu for mpc8536.
When QorIQ based board is configured as a PCIe agent, then unlock/enable
inbound PCI configuration cycles and init a 4K inbound memory window;
so that a PCIe host can access the PCIe agents SDRAM at address 0x0
* Supported in fsl_pci_init_port() after adding pcie_ep as a param
* Revamped copyright in drivers/pci/fsl_pci_init.c
* Mods in 85xx based board specific pci init after this change
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
fix the following compile warnings
warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Start of support of
Texas Instruments Software Development Platform(SDP)
for OMAP3430 - SDP3430
Highlights of this platform are:
Flash Memory devices:
Sibley NOR, Micron 8bit NAND and OneNAND
Connectivity:
3 UARTs and expanded 4 UART ports + IrDA
Ethernet, USB
Other peripherals:
TWL5030 PMIC+Audio+Keypad
VGA display
Expansion ports:
Memory devices plugin boards (PISMO)
Connectivity board for GPS,WLAN etc.
Completely configurable boot sequence and device mapping
etc.
Support default jumpering and:
- UART1/ttyS0 console(legacy sdp3430 u-boot)
- UART3/ttyS2 console (matching other boards,
and SDP HW docs)
- Ethernet
- mmc0
- NOR boot
Currently the UART1 is enabled by default. for
compatibility with other OMAP3 u-boot platforms,
enable the #define of CONSOLE_J9.
Conflicts:
Makefile
Fixed the conflict with smdkc100_config by moving omap_sdp3430_config
to it is alphabetically sorted location above zoom1.
Signed-off-by: David Brownell <david-b@pacbell.net>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Due to new TI boards being added to U-Boot, the hardware.h
is getting very messy. The warning being fixed is due to
the EMIF addresses being redefined.
The long term solution(after 2009.11) to this is to
have SOC specific header files.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
gpmc_config should not be a variant as it is board specific
hence make it a const parameter
Fixes issues identified by Dirk:
- build issue for zoom2
- warnings for all other OMAP3 platforms using nand/onenand etc
Signed-off-by: Nishanth Menon <nm@ti.com>
This patch removes the Sequoia "bootstrap" command and replaces it
with the now common command "chip_config".
Please note that the patches with the dynamic PCI sync clock
configuration have to be applied, before this one should go in.
This is because Sequoia has 2 different bootstrap EEPROMs, and
the old bootstrap command configured different values depending
on the detected PCI async clock (33 vs. 66MHz). With the PCI sync
clock patches, this is not necessary anymore. The PCI sync clock
will be configured correctly on-the-fly now.
Signed-off-by: Stefan Roese <sr@denx.de>
PPC440EP(x)/PPC440GR(x):
In asynchronous PCI mode, the synchronous PCI clock must meet
certain requirements. The following equation describes the
relationship that must be maintained between the asynchronous PCI
clock and synchronous PCI clock. Select an appropriate PCI:PLB
ratio to maintain the relationship:
AsyncPCIClk - 1MHz <= SyncPCIclock <= (2 * AsyncPCIClk) - 1MHz
This patch now adds a function to check and reconfigure the sync
PCI clock to meet this requirement. This is in preparation for
some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this
function to not violate the PCI clocking rules.
Signed-off-by: Stefan Roese <sr@denx.de>
Till now only the ranges in the ebc node are updated with the values
currently configured in the PPC4xx EBC controller. With this patch now
the NOR flash size is updated in the device tree blob as well. This is
done by scanning the compatible nodes "cfi-flash" and "jedec-flash"
for the correct chip select number.
This size fixup is enabled for all AMCC eval board right now. Other
4xx boards may want to enable it as well, if this problem with multiple
NOR FLASH sizes exists.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
This function can be used to update the size in the "reg" property
of the NOR FLASH device nodes. This is necessary for boards with
non-fixed NOR FLASH sizes.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Export enable_gpmc_cs_config into common header to
prevent warning:
warning: implicit declaration of function 'enable_gpmc_cs_config'
Signed-off-by: Nishanth Menon <nm@ti.com>
Adding the CONFIG_SYS_64BIT_VSPRINTF fot the DM644x based Sonata
Without this option enabled while performing NAND operations we will get
wrong diagnostic messages.
Example if the MTD NAND driver find a bad block while erasing from
a certain address, it will say bad block skipped at 0x00000000.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Adding the CONFIG_SYS_64BIT_VSPRINTF in the DVEVM config.
Without this option enabled while performing NAND operations we will get
wrong diagnostic messages.
Example if the MTD NAND driver find a bad block while erasing from
a certain address, it will say bad block skipped at 0x00000000.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM365 EVM config.
Without this option enabled while performing NAND operations we will get
wrong diagnostic messages.
Example if the MTD NAND driver find a bad block while erasing from
a certain address, it will say bad block skipped at 0x00000000.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM355 EVM config.
Without this option enabled while performing NAND operations we will get
wrong diagnostic messages.
Example if the MTD NAND driver find a bad block while erasing from
a certain address, it will say bad block skipped at 0x00000000.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Update default environment to support new kernel DSS2 subsystem and
simplify rootfs type and location changes.
Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
This patch adds the initial support for DM6467 EVM.
Other features like NET and NAND support will be added as follow up patches.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This change fixes the compiler warning
main.c: In function 'abortboot':
main.c:122: warning: too few arguments for format
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
This change fixes the compiler warning
nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF
for correct output!
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The env code is protected by the ENV_IS_EMBEDDED define, so attempting to
compile the code when this isn't defined is pointless. Now that the env
headers have unified around CONFIG_ENV_IS_EMBEDDED, convert the build
system to only build the env objects when this is enabled. And now that
the env code is conditionally compiled, we can drop the source code checks.
For people who want to extract the environment manually, add a new option
CONFIG_BUILD_ENVCRC that only enables the envcrc utility.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This is an orphaned legacy leftover that is just polluting
the config file namespace.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On Chip BootROM support for P1 and P2 series RDB platforms.
This patch is derived from latest On Chip BootROM support on MPC8536DS
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
NAND Boot support for P1 and P2 series RDB platforms.
This patch is derived from NAND Boot support on MPC8536DS.
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch re-formats the arm920t s3c24x0 header files in preparation for
changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patch 1/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and
s3c2410 cpu's which fixes various problems such as the timeouts in tftp being
too short.
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't
have any s3c2400 or s3c2410 boards but need this patch applying before I can
submit patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets
and no new warnings or errors were found.
It was originally submitted on 21/06/2009 but didn't get into the 2009.08
release, and Jean-Pierre made one comment on the original patch (see
http://lists.denx.de/pipermail/u-boot/2009-July/055470.html). I've made two
changes to the original patch:
- it's been re-based to the current release
- I've re-named get_timer_raw() to get_ticks() in response to Jean-Pierre's comment
This affects the sbc2410, smdk2400, smdk2410 and trab boards. I've copied it
directly to the maintainers of all except the sbc2410 which doesn't have an
entry in MAINTAINERS.
Signed-off-by: Kevin Morfitt <kmorfitt@aselaptop-1.localdomain>
Tested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Adds new board SMDKC100 that uses s5pc100 SoC
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
This patch includes the serial driver for s5pc1xx.
s5pc1xx uart driver needs own register setting and clock configuration.
So, need to special driver.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch includes the onenand driver for s5pc100
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
This patch adds support for the Samsung s5pc100 and s5pc110
SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
This patch implements several updates:
-disable CONFIG_ENV_OVERWRITE
-add new hardware style variants and set the arch numbers appropriate
-pass the serial# and hardware revision to the kernel
-removed unused macros from include/configs/meesc.h
-fixed multiline comment style
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
over tftp.
This also refactors the smc911x driver to allow for detecting when the
chip is missing. I.e. the detect_chip() function is called earlier and
will abort gracefully when the Chip ID read returns all 1's.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
This changes fixes an early i2c error.
It appears that I2C is working because once a read or write
error is detected, the omap24xx_i2c driver calls i2c_init
inside its error handling check.
While it is ok to attempt error handling this way, the boards
must not depend on this side effect to initialize it's i2c.
Instead of explicitly calling i2c_init for every board, use
the generic arm initialization in lib_arm/board.c. By defining
the config variable CONFIG_HARD_I2C, the omap3 i2c initialization
is included in the init_sequence table.
Run tested on Beagle.
Compile tested on the omap3's
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Some DaVinci SOC's use GPIOs to enable EMAC and DM9000.
This patch adds some definitions for GPIO registers and also adds
structures for GPIO.
A separate header file is being added so that in future we
can have a DaVinci GPIO driver similer to OMAP.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
In the DaVinci specific code, we use both CONFIG_SOC_DM646X and
CONFIG_SOC_DM646x to represent DM646x specific code.
This patch changes occurrences of CONFIG_SOC_DM646x to
CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use
the flag CONFIG_SOC_DM644X. We want some uniformity.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
The implementation is borrowed from the sheevaplug board and the Marvell
1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
these boards are built around Atmel's AT91SAM9260/9G20 and have
up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND
and include a 10/100 Ethernet PHY in RMII mode.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR
flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII
mode.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The DM365 config was using the 'CONFIG_CMD_SAVEENV' flag.
This is already included when we include the
config_cmd_default.h header file. So this flag is removed.
Also another flag to enable NAND functions was being
enabled incorrectly.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch does the following
1) Enables the NAND driver which is now available.
2) Enables the 'CONFIG_MTD_DEVICE' as without this the
compilation will fail
3) We now have a safe place to store environment and defines
an offset where this can be stored. This offset value is such that it is after
the location where U-Boot is flashed using TI flash utilities.
4) Enables Bootdelay
5) Increases malloc() arena size. Manufacturers are coming out with
NAND with large blocks sizes of upto 1 MiB. It has been noticed that
as the block size of the NAND used is increased, if this particular
value is not increased, the NAND driver will output out of memory
errors.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
DM646x is an SOC from TI which has both an ARM and a DSP.
There are multiple variants of the SOC mainly dealing with different
core speeds.
This patch adds the initial framework for the DM646x SOC.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The Default mode that is built for the Davinci DVEVM happens
to be the NOR mode.
When we want to build for the NAND mode, we get a compilation
error. This is overcome by defining the CONFIG_MTD_DEVICE
flag in the NAND mode.
The image built for NAND mode was successfully tested on the
DaVinci DM6446 EVM.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
v7_flush_dcache_all, because it depends on omap ROM code is not
generic. Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.
Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S. This
means removing the old cache.c file that contained l2_cache_enable
and l2_cache_disable.
The conversion from cache.c to cache.S was done most through
disassembling the uboot binary. The only significant change was
to change the comparision for the return of get_cpu_rev from
cmp r0, #0
beq earlier_than_label
Which was lost information to
cmp r0, #CPU_3XX_ES20
blt earlier_than_label
The paths through the enable routine were verified by
adding an infinite loop and seeing the hang. Then
removing the infinite loop and seeing it continue.
The disable routine is similar enough that it was not
tested with this method.
Run tested by cold booting from nand on beagle and zoom1.
Compile tested on MAKEALL arm.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
This patch removes the asm/sizes.h header file from being
included in the DaVinci SOC configs.
References to SZ_xx have been replaced by appropriate
bit shifted values.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Wolfgang Denk <wd@denx.de>
This feature is useful when your board uses different mii buses for different
phys and all (or a part) of these buses are implemented via bit-banging mode.
The driver requires that the following macros should be defined into the board
configuration file:
CONFIG_BITBANGMII - Enable the miiphybb driver
CONFIG_BITBANGMII_MULTI - Enable the multi bus support
If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs
to define at least the following macros:
MII_INIT - Generic code to enable the MII bus (optional)
MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional)
MDIO_ACTIVE - Activate the MDIO pin as out pin
MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
MDIO_READ - Read the MDIO pin
MDIO(v) - Write v on the MDIO pin
MDC_DECLARE - Declaration needed to access to the MDC pin (optional)
MDC(v) - Write v on the MDC pin
The previous macros make the driver compatible with the previous version
(that didn't support the multi-bus).
When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill
the bb_miiphy_buses[] array with a record for each required bus and declare
the bb_miiphy_buses_num variable with the number of mii buses.
The record (struct bb_miiphy_bus) has the following fields/callbacks (see
miiphy.h for details):
char name[] - The symbolic name that must be equal to the MII bus
registered name
int (*init)() - Initialization function called at startup time (just
before the Ethernet initialization)
int (*mdio_active)() - Activate the MDIO pin as output
int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin
int (*set_mdio)() - Write the MDIO pin
int (*get_mdio)() - Read the MDIO pin
int (*set_mdc)() - Write the MDC pin
int (*delay)() - Delay function
void *priv - Private data used by board specific code
The board code will look like:
struct bb_miiphy_bus bb_miiphy_buses[] = {
{ .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... },
{ .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... },
...
int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
sizeof(bb_miiphy_buses[0]);
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
commit 6d0f6bcf33 did the big
rename of CFG_ macros to CONFIG_SYS macros. But it missed
a couple of instances within comments.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This fixes the code and the comment according to the original intent of
doing an intensive memory test when PSC6_3 is pulled low on the STK52xx.
Notably PORT_CONFIG will be overridden with this correct code now,
so beware.
The original code only worked by coincidence depending on the PORT_CONFIG
setting from the header file. The new code was tested to ensure that the
(undocumented) memory test still works on the STK52x.
Signed-off-by: Detlev Zundel <dzu@denx.de>
CC: Martin Krause <Martin.Krause@tqs.de>
Minor white-space cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 054197ba and later fixes used an array to initialize some of
the MDDRC parameters; however, the use of an array turned out to be a
bad idea as it was not possible to correlate structure entries to
array indices in readable and reliable way. Now we use a struct
instead, which makes this self-explanatory.
Signed-off-by: Wolfgang Denk <wd@denx.de>
After running checkstyle.pl on the three previous patches I noted that in
the *.h files there were a lot of long lines. This patch solves this problem.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Here you find all the changes in the include directory for new register names
and adapting other ones to the names used by AMCC in their manuals, e.g.
For 440EPx/GRPPC440EPx/GRX, Revision 1.15 – September 22, 2008
For PPC405GP Embedded Processor, Revision 1.02 – March 22, 2006
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older
405EX(r) parts. Here a list:
0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec
0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec
Since there are only a few older parts in the field, this patch now
changes the PVR's above to represent the new Rev D versions.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Phong Vo" <pvo@amcc.com>
All in-tree boards that use this controller have CONFIG_NET_MULTI
added
Also:
- changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111
- cleaned up line lengths
- modified all boards that override weak function in this driver
- modified all eeprom standalone apps to work with new driver
- updated blackfin standalone EEPROM app after testing
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The random_port() is meant to be used by other net code, but without a
prototype, we get fun warnings like:
dns.c: In function 'DnsSend':
dns.c:89: warning: implicit declaration of function 'random_port'
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Now that proper relocation is supported, the reloc_off field is no longer
necessary.
Note that the location of the standalone application jump table pointer
in the global data structure is affected by this change, breaking
execution of standalone applications compiled for previous versions of
U-Boot.
We therefore increment XF_VERSION to 6
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
These architectures don't need relocation fixups, so reduce their
codesize a bit by defining CONFIG_RELOC_FIXUP_WORKS.
Also remove the reloc_off field from their global data structures
as it is no longer needed.
Note that the location of the standalone application jump table pointer
in the global data structure is affected by this change, breaking
execution of standalone applications compiled for previous versions of
U-Boot. We will therefore increment XF_VERSION in the next commit,
which also touches this area.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Add #ifdefs where necessary to not perform relocation fixups. This
allows boards/architectures which support relocation to trim a decent
chunk of code.
Note that this patch doesn't add #ifdefs to architecture-specific code
which does not support relocation.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups. Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The following changes allow U-Boot to fully relocate from flash to
RAM:
- Remove linker scripts' .fixup sections from the .text section
- Add -mrelocatable to PLATFORM_RELFLAGS for all boards
- Define CONFIG_RELOC_FIXUP_WORKS for all boards
Previously, U-Boot would partially relocate, but statically initialized
pointers needed to be manually relocated.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This patch adds support to detect the amount of DDR2 SDRAM
on PMC440 modules. Detection is done by probing through
a list of available and supported hardware configurations
from 1GByte down to 256MB.
The static TLB entry is replaced by dynamically created entries.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch merges the ECC handling (ECC parity byte writing) into one
file (ecc.c) for all PPC4xx SDRAM controllers except for PPC440EPx/GRx.
This exception is because only those PPC's use the completely different
Denali SDRAM controller core.
Previously we had two routines to generate/write the ECC parity bytes.
With this patch we now only have one core function left.
Tested on Kilauea (no ECC) and Katmai (with and without ECC).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Felix Radensky <felix@embedded-sol.com>
Cc: Grant Erickson <gerickson@nuovations.com>
Cc: Pieter Voorthuijsen <pv@prodrive.nl>
Reorganize DDR2 ECC handling to use common code for
SPD DIMMs and soldered SDRAM. Also, use common code
to display SDRAM info (ECC, CAS latency) for SPD and
soldered SDRAM variants.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The Linux kernel has changed the way it numbers serial ports, so update
the default command line to match it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The u-boot image has outgrown the current space and overflowed into the
env sector. So move the env to the next available sector (we've already
allocated the first few sectors anyways for u-boot).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The MPC8536E is capable of booting from the on-chip ROM - boot from
eSDHC and boot from eSPI. When power on, the porcessor excutes the
ROM code to initialize the eSPI/eSDHC controller, and loads the mian
U-Boot image from the memory device that interfaced to the controller,
such as the SDCard or SPI EEPROM, to the target memory, e.g. SDRAM or
L2SRAM, then boot from it.
The memory device should contain a specific data structure with control
word and config word at the fixed address. The config word direct the
process how to config the memory device, and the control word direct
the processor where to find the image on the memory device, or where
copy the main image to. The user can use any method to store the data
structure to the memory device, only if store it on the assigned address.
The on-chip ROM code will map the whole 4GB address space by setting
entry0 in the TLB1, so the main image need to switch to Address space 1
to disable this mapping and map the address space again.
This patch implements loading the mian U-Boot image into L2SRAM, so
the image can configure the system memory by using SPD EEPROM.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
MPC8536E can support booting from NAND flash which uses the
image u-boot-nand.bin. This image contains two parts: a 4K
NAND loader and a main U-Boot image. The former is appended
to the latter to produce u-boot-nand.bin. The 4K NAND loader
includes the corresponding nand_spl directory, along with the
code twisted by CONFIG_NAND_SPL. The main U-Boot image just
like a general U-Boot image except the parts that included by
CONFIG_SYS_RAMBOOT.
When power on, eLBC will automatically load from bank 0 the
4K NAND loader into the FCM buffer RAM where CPU can execute
the boot code directly. In the first stage, the NAND loader
copies itself to RAM or L2SRAM to free up the FCM buffer RAM,
then loads the main image from NAND flash to RAM or L2SRAM
and boot from it.
This patch implements the NAND loader to load the main image
into L2SRAM, so the main image can configure the RAM by using
SPD EEPROM. In the first stage, the NAND loader copies itself
to the second to last 4K address space, and uses the last 4K
address space as the initial RAM for stack.
Obviously, the size of L2SRAM shouldn't be less than the size
of the image used. If so, the workaround is to generate another
image that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
By nature of being based off the MPC8548CDS board, this
board inherited an ENV_SIZE setting of 256k. But since
it has a smaller flash device (8MB soldered on), it has
a native sector size of 128k, and hence the ENV_SIZE was
causing 2 sectors to be used for the environment.
By removing the unused sector, we can push TEXT_BASE up
closer to the end of address space and reclaim that
sector for any other application. This also fixes the
mismatch between TEXT_BASE and MONITOR_LEN reported by
Kumar earlier.
Since this board also supports the ability to boot off
the 64MB SODIMM flash, this change is forward looking
with that in mind; i.e. the settings for MONITOR_LEN
and ENV_SIZE will work when the 512k sectors of the
SODIMM flash are used for alternate boot in the future.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Converted all white space to tabs
* Converted all types to u8/u16/u32
* Reduce lines to fit in 80 columns
* Renamed MPC85xx_{Q,B}MAN -> FSL_CORENET_{Q,B}MAN
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The latest PPC4xx register cleanup patch missed some SDRAM defines.
This patch now changes lower case UIC defines to upper case. Also
some names are changed to match the naming in the IBM/AMCC users
manuals (e.g. mem_mcopt1 -> SDRAM0_CFG).
Signed-off-by: Stefan Roese <sr@denx.de>
The latest PPC4xx register cleanup patch missed the UIC defines.
This patch now changes lower case UIC defines to upper case.
Signed-off-by: Stefan Roese <sr@denx.de>
some LCRR bits are not documented throughout the 83xx family RMs.
New board porters copying similar board configurations might omit
setting e.g., DBYP since it was not documented in their SoC's RM.
Prevent them bricking their board by retaining power on reset values
in bit fields that the board porter doesn't explicitly configure
via CONFIG_SYS_<registername>_<bitfield> assignments in the board
config file.
also move LCRR assignment to cpu_init_r[am] to help ensure no
transactions are being executed via the local bus while CLKDIV is being
modified.
also start to use i/o accessors.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Commit 804d83a5 allows us to move all the configuration
variation tweaks out of the top level Makefile and down
into the board config header. This takes advantage of
that for the sbc8349 board.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
With this patch we can change QE USB mode without need to hand-edit
the device tree.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fixes various ethernet issues with gigabit links handling
in U-Boot. The workarounds originally implemented by Kim Phillips for
Linux kernel.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
U-Boot can detect if an IDE device is present or not.
If not, and this new config option is activated, U-Boot
removes the ATA node from the DTS before booting Linux,
so the Linux IDE driver does not probe the device and
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.
Signed-off-by: Heiko Schocher <hs@denx.de>
- As these boards are similiar, collect common config options
in manroland/common.h and manroland/mpc52xx-common.h
for mpc5200 specific common options for this manufacturer.
- add OF support
- update default environment
Signed-off-by: Heiko Schocher <hs@denx.de>
Minor edit of commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 002741ae86 modified include/asm-ppc/mmu.h such that the LAWAR_
defines were only enabled for the 83xx platform, but they are also
needed on MPC512x system. Enabling these for E300 systems seems thus
more appropriate.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Martha M Stan <mmarx@silicontkx.com>
Minor cleanup:
Re-ordered default_mddrc_config[] to have matching indices.
This allows to use the same index "N" for source and target fields;
before, we had code like this
out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]);
which always looked like a copy & paste error because 2 != 3.
Also, use NULL when meaning a null pointer.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms. Additionally on p4080 we can have
different frequencies for FMAN and PME IP blocks. We need to keep track
of the FMAN & PME frequencies since they are used for time stamping
capabilities inside each block.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added p4080 & p4040 to cpu_type_list and SVR list
* Added number of LAWs for p4080
* Set CONFIG_MAX_CPUS to 8 for p4080
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On CoreNet based platforms the LAW address is split between an high &
low register and we no longer shift the address. Also, the target IDs
on CoreNet platforms have been completely re-assigned.
Additionally, added a new find_law() API to which LAW an address hits in.
This is need for the CoreNet style boot release code since it will need
to determine what the target ID should be set to for boot window
translation.
Finally, enamed LAWAR_EN to LAW_EN and moved to header so we can use
it elsewhere.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
platform. We reuse the 85xx immap and just add new definitions for
local access and global utils. The global utils is now broken into
global utils, clocking and run control/power management.
The offsets from CCSR for a number of blocks have also changed. We
introduce the CONFIG_FSL_CORENET define to distinquish the PQ3 style of
platform from the new p4080 platform. We don't use QoirQ as there are
products (like p2020) that are PQ3 based platforms but have the QoirQ
name.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Commit 804d83a5 allows us to move all the configuration
variation tweaks out of the top level Makefile and down
into the boards config header. This takes advantage of
that for the sbc8540/sbc8560 boards.
There were a couple of cheezy comments pointing at incorrect
files, or files that don't exist, so I've cleaned those up too.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, and if you had 33MHz PCI, you
had to manually change CONFIG_SYS_NS16550_CLK too, which was
not real user friendly,
This adds the typical PCI and clock speed make targets to the
toplevel Makefile in accordance with what is being done with
other boards (i.e. using the "-t" to mkconfig).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The PCI/PCI-e support for the sbc8548 was based on an earlier
version of what the MPC8548CDS board was using, and in its
current state it won't even compile. This re-syncs it to match
the latest codebase and makes use of the new shared PCI functions
to reduce board duplication.
It borrows from the MPC8568MDS, in that it pulls the PCI-e I/O
back to 0xe280_0000 (where PCI2 would be on MPC8548CDS), and
similarly it coalesces the PCI and PCI-e mem into one single TLB.
Both PCI-x and PCI-e have been tested with intel e1000 cards
under linux (with an accompanying dts change in place)
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Recycle the recently added PCI-e wrapper used to reduce board
duplication of code by creating a similar version for plain PCI.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The size of the LB SDRAM on this board is 128MB, spanning CS3
and CS4. It was previously only being configured for 64MB on
CS3, since that was what the original codebase of the MPC8548CDS
had. In addition to setting up BR4/OR4, this also adds the TLB
entry for the second half of the SDRAM.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The sbc8548 has a 64MB SODIMM flash module off of CS6 that
previously wasn't enumerated by u-boot. There were already
BR6/OR6 settings for it [used by cpu_init_f()] but there
was no TLB entry and it wasn't in the list of flash banks
reported to u-boot.
The location of the 64MB flash is "pulled back" 8MB from
a 64MB boundary, in order to allow address space for the
8MB boot flash that is at the end of 32 bit address space.
This means creating two 4MB TLB entries for the 8MB chunk,
and then expanding the original boot flash entry to 64MB
in order to cover the 8MB boot flash and the remainder
(56MB) of the user flash.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There are a couple defines and PCI bridge quirks related to the PCI
backplane of the MPC8548CDS that have no meaning in the context of
the port to the sbc8548 board, so delete them.
Also, the form factor of the sbc8548 is a standalone board with a
single PCI-X and a single PCI-e slot. That pretty much guarantees
that it will never be a PCI agent itself, so the host/agent and root
complex/end node distinctions have been removed.
Similarly, since there is no physical connector mapping to PCI2, so
all references of PCI2 in the board support files have been removed
as well.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h. Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For some reason the CLKDIV field varies between SoC in how it interprets
the bit values.
All 83xx and early (e500v1) PQ3 devices support:
clk/2: CLKDIV = 2
clk/4: CLKDIV = 4
clk/8: CLKDIV = 8
Newer PQ3 (e500v2) and MPC86xx support:
clk/4: CLKDIV = 2
clk/8: CLKDIV = 4
clk/16: CLKDIV = 8
Ensure that the MPC86xx and MPC85xx still get the same behavior and make
the defines reflect their logical view (not the value of the field).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Add version environment variable configuration to the galaxy5200
board header file.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
DDR2 timing for intip was on the edge for some of the available chips
for this board. Now it is verfied to work with all of them.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The more standard 'source' command provides identical functionality to
the autoscr command.
Environment variable names/values on the MVBC_P, MVBML7, kmeter1,
mgcoge, and km8xx boards are updated to no longer refernce 'autoscr'.
The 'autoscript' and 'autoscript_uname' environment variables are
also removed.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Heiko Schocher <hs@denx.de>
Commits
02f99901ed52d61227b6
introduced a regression where platform-specific ffs/fls implementations
were defined away. This patch corrects that by using PLATFORM_xxx
instead of the name itself.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
Acadia still used the "old" arch/ppc bootm commands for booting
Linux images without FDT. This patch now enables these fdt-aware
boot commands for Acadia as well.
Signed-off-by: Stefan Roese <sr@denx.de>
So that we can set the NAND loader's relocate stack pointer
to the value other than the relocate address + 0x10000.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We can pack the initial tlb_table in MAS register format and use
write_tlb to set things up. This savings can be helpful for NAND
style first stage boot loaders.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Factor out the code we use to actually write a tlb entry.
set_tlb is a logical view of the TLB while write_tlb is a low level
matching the MAS registers.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Its reset value is random, and we sometimes read uninitialized TLB
arrays. Make sure that we don't retain MAS8 from reading such an entry
if the VF bit in MAS8 is set, attempts to use the mapping will trap.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Remove Ethernet node fixup from mgcoge and muas3001 boards and modify its
configs for the common mpc8260 code to use generic Ethernet fixup.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Tested-by: Heiko Schocher <hs@denx.de>
UBIFS requires fls(), which is not defined for arm (and some other
architectures) and this patch adds it. The implementation is taken from
Linux and is generic. ffs() is also defined for those that miss it.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Bring over the bitop implementations from the Linux
include/asm-generic/bitops/non-atomic.h to provide
endianness-independence.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
__set_bit and __clear_bit are defined in ubifs.h as well as in
asm/include/bitops.h for some architectures. This patch moves
the generic implementation to include/linux/bitops.h and uses
that unless it's defined by the architecture.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:
- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines
Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for "kwbimage" (Kirkwood Boot Image)
image types to the mkimage code.
For details refer to docs/README.kwbimage
This patch is tested with Sheevaplug board
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Ron Lee <ron@debian.org>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
- make get_table_entry_id() global
- make get_table_entry_name() global
- move struct table_entry to image.h
Currently this code is used by image.c only.
This patch makes this API global so it can be used by other parts of
code, too.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Ron Lee <ron.debian.org>
Edit comments and commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Currently it is used by image.c only, but the the function can be
used to support additional mkimage types like for example kwbimage,
so make this function globally visible.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This fixes some compiler warnings:
tools/default_image.c:141: warning: initialization from incompatible pointer type
tools/fit_image.c:202: warning: initialization from incompatible pointer type
and changes to code to use "const" attributes in a few places where
it's appropriate.
Signed-off-by: Wolfgang Denk <wd@denx.de>
uninitialized retval variable warning fixed
crc32 APIs moved to crc.h (newly added) and build warnings fixed
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Using a separate "u-boot" environment variable allows to easily
specify different filenames for the update procedure. This is also in
line with many other board configurations defining an "update" script.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Incase the system is detected with Unknown SVR, let the system boot
with a default value and a proper message.
Now with dynamic detection of SOC properties from SVR, this is necessary
to prevent a crash.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.
Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Allow us to search the TLB array based on an address. This is useful
if we want to change an entry but dont know where it happens to be
located.
For example, the boot page mapping we use on MP or the flash TLB that
we change the WIMGE settings for after we've relocated.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In future Book-E implementations IVORs will most likely go away and be
replaced with fixed offsets. The IVPR will continue to exist to allow
for relocation of the interrupt vectors.
This code adds support to setup the IVORs as their fixed offset values
per the ISA 2.06 spec when we transition from u-boot to another OS
either via 'bootm' or a cpu release.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The ddr_pd_cntl isn't defined in any reference manual and thus we wil
remove especially since we set it to 0, which would most likely be its
POR value.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Reset any i2c devices that may have been interrupted during a system reset.
Normally this would be accomplished by clocking the line until SCL and SDA
are released and then sending a start condtiion (From an Atmel datasheet).
There is no direct access to the i2c pins so instead create start commands
through the i2c interface. Send a start command then delay for the SDA Hold
time, repeat this by disabling/enabling the bus a total of 9 times.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Now that the PCI, SATA et al compile problems have been resolved, the
cludge that was applied to avoid them can be removed
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Primary intent is to resolve build errors for this board which has been
neglected for a very long time. I do not have one of these boards, so I
cannot test functionality
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
This patch is based on a patch submitted by Jean-Christophe PLAGNIOL-VILLARD
on 18th May 2008 as part of a general i386 / sc520 fixup which was never
applied
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Change PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY (Originally done in
commit ff4e66e93c, regressed by commit 6d7f610b09)
Cast PCI_ROM_ADDRESS_MASK to u32
Wrap probe_pci_video() call inside #ifdef CONFIG_VIDEO
Change call to pci_find_class() to pci_find_devices(). This is based on a
patch submitted on 1st March 2007 (Patch that fixes the compilation errors
for sc520_cdp board) by mushtaq_k
This patch requires that PCI_VIDEO_VENDOR_ID and PCI_VIDEO_DEVICE_ID be
specified in the board config file. Dummy values have been added for the
SC520 CDP board to enable compilation, but since I do not have one of these,
I do know what the values should be
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
The current configuration of the Environment has the redundant copy of the
environment in the Boot Flash - This was never the intent. The Environment
should instead be in the first two sectors of the first Strata Flash
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Since the NAND code now uses 64bit code, make sure we enable support for
ADI Blackfin boards in printf to avoid the warning:
nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output!
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If the memory layout pushes the stack out of the default DCPLB coverage,
the exception handler may trigger a double fault by trying to push onto
the uncovered stack. So handle the exception stack similar to the kernel
by using the top of the scratch pad SRAM.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The default console size indirectly applies to length of env vars, so a
smaller length makes it hard to pass longer command lines to kernels.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The CM-BF537U is similar to the CM-BF537E module, but enough to need its
own board port.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the Blackfin ABI favors higher scratch registers by default, use the
last scratch register (P3) for global data rather than the first (P5).
This allows the compiler's register allocator to use higher number scratch
P registers, which in turn better matches the Blackfin instruction set,
which reduces the size of U-Boot by more than 1024 bytes...
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add dns and ntp to default networking commands, and ask for more dhcp
options to better configure the network environment.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by
Calao Systems <http://www.calao-systems.com>. Their components are very
similar to the AT91SAM9260EK board, so their configuration is based on
the configuration of this board. There are however some differences:
different clocks, no LCD, no ethernet. They also can use SPI EEPROM to
store the environment.
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This feature can be used to trigger special command "sysrstcmd" using
reset key long press event and environment variable "sysrstdelay" is set
(useful for reset to factory or manufacturing mode execution)
Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
When SYSRSTn is asserted low, a SYSRSTn duration counter is running.
The counter value is stored in the SYSRSTn Length Counter Register
The counter is based on the 25-MHz reference clock (40ns)
It is a 29-bit counter, yielding a maximum counting duration of
2^29/25 MHz (21.4 seconds). When the counter reach its maximum value,
it remains at this value until counter reset is triggered by setting
bit 31 of KW_REG_SYSRST_CNT
Implementation:
Upon long reset assertion (> ${sysrstdelay} in secs) sysrstcmd will be
executed if pre-defined in environment variables.
This feature will be disabled if "sysrstdelay" variable is unset.
for-ex.
setenv sysrst_cmd "echo starting factory reset;
nand erase 0xa0000 0x20000;
echo finish ed sysrst command;"
will erase particular nand sector if triggered by this event
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems
<http://www.calao-systems.com>. It is built around an AT91SAM9G20 ARM SoC
running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard
battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND
flash, two USB host ports, and an USB device port. More informations can be
found at <http://www.calao-systems.com/articles.php?lng=en&pg=5936>
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
This patch adds support for i.MX27-LITEKIT development board from
LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND
flash, FEC ethernet controller integrated into i.MX27.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Remove duplicate set_cr
set_cr is defined in both asm-arm/proc-armv/system.h and
include/asm-arm/system.h. This patch removes it (and some duplicate
defines) from the former.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Call fsl_pci_init_port() to initialize all the PCIe ports on the board.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
fsl_pci_init_port can be called from board specific PCI initialization
routines to setup the PCI (or PCIe) controller. This will reduce code
redundancy in most of the 85xx/86xx FSL board ports that setup PCI.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
P1011 - Single core variant of P1020
P2010 - Single core variant of P2020
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
With current values of CONFIG_SYS_MEMTEST_START and CONFIG_SYS_MEMTEST_END
memory test hangs if run without arguments. Set them to sane values, so
that all available 512MB of RAM excluding exception vectors at the bottom
and u-boot code and stack at the top can be tested.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
P1020 is another member of QorIQ series of processors which falls in ULE
category. It is an e500 based dual core SOC.
Being a scaled down version of P2020 it has following differences:
- 533MHz - 800MHz core frequency.
- 256Kbyte L2 cache
- Ethernet controllers with classification capabilities.
Also the SOC is pin compatible with P2020
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The code base adds P1 & P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.
Tested following on P2020RDB:
1. eTSECs
2. DDR, NAND, NOR, I2C.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The number of CPUs are getting detected dynamically by checking the
processor SVR value. Also removed CONFIG_NUM_CPUS references from all
the platforms with 85xx/86xx processors.
This can help to use the same u-boot image across the platforms.
Also revamped and corrected few Freescale Copyright messages.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
to allow for larger memory sizes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The old PCI ATMU setup code would just mimic the PCI regions into the
ATMU registers. For simple memory maps in which all memory, MMIO, etc
space fit into 4G this works ok. However there are issues with we have
>4G of memory as we know can't access all of memory and we need to
ensure that PCICSRBAR (PEXCSRBAR on PCIe) isn't overlapping with
anything since we can't turn it off.
We first setup outbound windows based on what the board code setup
in the pci regions for MMIO and IO access. Next we place PCICSRBAR
below the MMIO window. After which we try to setup the inbound windows
to map as much of memory as possible.
On PCIe based controllers we are able to overmap the ATMU setup since
RX & TX links are separate but report the proper amount of inbound
address space to the region tracking to ensure there is no overlap.
On PCI based controllers we use as many inbound windows as available to
map as much of the memory as possible.
Additionally we changed all the CCSR register access to use proper IO
accessor functions. Also had to add CONFIG_SYS_CCSRBAR_PHYS to some
86xx platforms that didn't have it defined.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Change the code to use the PCIe capabilities register to determine if we
are a PCIe controller or not. Additionally cleaned up some white space
and formatting in the file.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init. There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init. There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
apparently the ITX was missed last round.
Also make bootdelay consistent with other boards, so as to give on the
opportunity to fix mistakenly set bootcmd without having checked for an
bootdelay zero setting first.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds 4 BIT ECC support in the DaVinci NAND
driver. Tested on both the DM355 and DM365.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND
chips. This ECC mode is similar to NAND_ECC_HW, with the exception of
read_page API that first reads the OOB area, reads the data in chunks,
feeds the ECC from OOB area to the ECC hw engine and perform any
correction on the data as per the ECC status reported by the engine.
This patch has been accepted by Andrew Morton and can be found at
http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-new-ecc-mode-ecc_hw_oob_first.patch
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch adds a new "page" parameter to all NAND read_page/read_page_raw
APIs. The read_page API for the new mode ECC_HW_OOB_FIRST requires the
page information to send the READOOB command and read the OOB area before
the data area.
This patch has been accepted by Andrew Morton and can be found at
http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-page-parameter-to-all-read_page-read_page_raw-apis.patch
WE would like this to become part of the u-boot GIT as well
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Remove unused read_spareram and add unlock_all as kernel does
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The compile error was caused by a recent patch. Affected platforms -
M5253DEMO.h, M5253EVBE.h, and M54455EVB.h. Adding the _IO_BASE
automatically defined to 0 in asm-m68k/io.h if it isn't set in
platform configuration file.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
see http://www.jedec.org/download/search/jep106Z.pdf
Add some second source legacy flash chips 256x8.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
- changed CONFIG_DRIVER_CS8900 to CONFIG_CS8900
- changed CS8900_BASE to CONFIG_CS8900_BASE
- changed CS8900_BUS?? to CONFIG_CS8900_BUS??
- cleaned up line lengths
- modified VCMA9 command function that accesses the device
- removed MAC address initialization from lib_arm/board.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
This chooses 4kB data size for both TFTP and NFS, as an example
about how to use support for IP fragments.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
In the process, also remove backward-compatiblity macros BIN_TO_BCD and
BCD_TO_BIN and update the sole board using them to use the new bin2bcd
and bcd2bin instead
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Add support for the DEKA Research and Development galaxy5200 board
The galaxy5200 is an Freescale mpc5200 based embedded industrial
control board.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Some boards have fallen out of sync by defining CONFIG_ENV_IS_EMBEDDED
manually. While it is useful to have this available to the build system,
let's do it automatically rather than forcing people to opt into it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The SPI controller on the S3C24X0 has 8 bit registers, not 32 bit.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Newer revisions of these boards have slightly larger flashes, so increase
the configured number of sectors so that U-Boot works on all revisions.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Start a common header file for common linker script code (such as
workarounds for older linkers) rather than doing this in the build system.
As fallout, we no longer execute the linker every time config.mk is
included by a build file (which can easily be 70+ times), but rather only
execute it once.
This also fixes a bug in the major version checking by creating a macro to
easily compare versions and keep people from making the same common
mistake (forgetting to check major and minor together).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
linux mpc83xx_defconfig kernels are getting bigger, accommodate for
their growth by adjusting default load and fdt addresses.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
when using Linus' 83xx_defconfig, the mpc8377rdb would hang at boot
at either:
NET: Registered protocol family 16
or the
io scheduler cfq registered
message. Fixing up these DDR settings appears to fix the problem.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
commit 9993e196da "mpc83xx: convert all
remaining boards over to 83XX_GENERIC_PCI" remapped pci windows on
tqm834x to make it more consistent with the other 83xx boards. During
that time however, the author failed to realize that FLASH_BASE was
occupying the same range as what PCI1_MEM_BASE was being assigned.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Wolfgang Denk <wd@denx.de>
This was introduced with the MPC8349EMDS board, and then copied to
a couple other boards by nature of being the reference implementation.
u-boot$git grep CONFIG_SYS_MID_FLASH_JUMP
include/configs/MPC8349EMDS.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
include/configs/sbc8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
include/configs/vme8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
u-boot$
It currently isn't used, so delete it before it spreads further.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, which isn't really user friendly.
This adds the typical PCI make targets to the toplevel Makefile
in accordance with what is being done with other boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
The name of the atmel nand driver in the kernel changed from at91_nand
to atmel_nand back in June 2008, but the at91-based boards config files
still refer to at91_nand. This patch updates them with the new name
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
In commit 187af954cf there
was a typo that offset all the ecc registers by 4 bytes, fixed that.
Signed-off-by: Ben Goska <goskab@onid.oregonstate.edu>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
This patch fixes the "chip_config" command for I2C bootstrap EEPROM
configuration. First it changes the I2C bootstrap EEPROM address to
0x54 as this is used on Arches (instead of 0x52 on Canyonlands/
Glacier). Additionally, the NAND bootstrap settings are removed
for Arches since Arches doesn't support NAND-booting.
Signed-off-by: Stefan Roese <sr@denx.de>
Current code for the Monahans CPU defined OSCR_CLK_FREQ as 3.250 (MHz)
which caused floating point operations to be used. This resulted in
unresolved references to some FP related libgcc functions when using
U-Boot's private libgcc functions.
Change the code to use fixed point math only.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch updates zlib to the latest stable version.
Only relevant zlib parts were ported to u-boot tree, as already did for the
current zlib (0.95). New zlib guarantees a faster inflate performances
other then others improvements as explained at www.zlib.net.
It also includes Alessandro Rubini's patches to allow 0 as destination pointer
and to call watchdog reset if required by architecture.
Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Reviewed-by: Angelo Castello <angelo.castello@st.com>
Reviewed-by: Alessandro Rubini <rubini-list@gnudd.com>
This patch adds an FTMAC100 ethernet driver for Faraday A320 evaluation board.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
For some reason the MPC8544 enabled BEDBUG if PCI was enabled and that
got copied int the MPC8536, MPC8572 and P2020 DS boards. The BEDBUG
support has never been made to work completely on e500/85xx so we
just disable it to save space and match the other FSL 85xx boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This is a port of Linux driver for SDHC host controller hardware
found on Freescale's MX2 and MX3 processors. Uses new generic MMC
framework (CONFIG_GENERIC_MMC) and it looks like there are some
problems with a framework (at least on LE cpus). Some of these
problems are addressed in the following patches.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
It was brought to our attention that U-Boot contains code derived from the
IBM OpenBIOS source code originally provided with some of the older PowerPC
4xx development boards. As a result, the original license of this code has
been carried in the various files for a number of years in the U-Boot project.
IBM is dual-licensing the IBM code contributions already present in U-Boot
under either the terms of the GNU General Public License version 2, or the
original code license already present.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
replace variable types in ctrl_structs for omap3 by those with
fixed size (u8, u16, u32).
Additional ifndef-protection is needed by examples which do not
compile when including asm/types.h
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Based on Intel PRO/1000 Network Driver 7.3.20-k2
Add Intel E1000 PCIE card support. The following cards are added:
INTEL_82571EB_COPPER
INTEL_82571EB_FIBER,
INTEL_82571EB_SERDES
INTEL_82571EB_QUAD_COPPER
INTEL_82571PT_QUAD_COPPER
INTEL_82571EB_QUAD_FIBER
INTEL_82571EB_QUAD_COPPER_LOWPROFILE
INTEL_82571EB_SERDES_DUAL
INTEL_82571EB_SERDES_QUAD
INTEL_82572EI_COPPER
INTEL_82572EI_FIBER
INTEL_82572EI_SERDES
INTEL_82572EI
INTEL_82573E
INTEL_82573E_IAMT
INTEL_82573L
INTEL_82546GB_QUAD_COPPER_KSP3
INTEL_80003ES2LAN_COPPER_DPT
INTEL_80003ES2LAN_SERDES_DPT
INTEL_80003ES2LAN_COPPER_SPT
INTEL_80003ES2LAN_SERDES_SPT
82571EB_COPPER dual ports,
82572EI single port,
82572EI_COPPER single port PCIE cards
and
82545EM_COPPER,
82541GI_LF
pci cards are tested on both P2020 board
and MPC8544DS board.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
In the previous enetaddr refactoring, the assumption with commit 56b555a644
was that the eth layer would handle the env -> device enetaddr syncing.
This was not the case as eth_initialize() is called only once and the sync
occurs there. So make sure the eth_init() function does the env -> device
sync with every network init.
Reported-by: Andrzej Wolski <awolski@poczta.fm>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Embedd chip select configuration into struct for gpmc config
instead of having it completely separated as suggested by
Wolfgang Denk on
http://lists.denx.de/pipermail/u-boot/2009-May/052247.html
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
For some reason the AT91rm9200 lowlevel init writes to a bunch of
reserved or read-only addresses. All the boards seem to define the
value-to-be-written values as zero ... but they shouldn't actually
be writing *anything* there.
No documented erratum justifies these accesses. It looks like maybe
some pre-release BDI-2000 setup code has been carried along by cargo
cult programming since at least late 2004 (per GIT history).
Here's a patch disabling what seems to be bogosity. Tested on a
csb337; there were no behavioral changes.
Signed-off-by: David Brownell <david-b@pacbell.net>
on RM9200ek
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch moves the load addresses for kernel, fdt and ramdisk to higher
addresses (>= 16MB). This enables booting of bigger kernel images (e.g.
lockdep enabled).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes CONFIG_SYS_BOOTMAPSZ from 8MB to 16MB which is the
initial TLB on 40x PPC's in the Linux kernel. With this change even bigger
Linux kernels (> 8MB) can be booted.
This patch also sets CONFIG_SYS_BOOTM_LEN to 16MB (default 8MB) to enable
decompression of bigger images.
Signed-off-by: Stefan Roese <sr@denx.de>
These defines have been subplanted by the equivelent defines in
include/twl4030.h
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
Because twl4030 now has its own device files, move and rename
twl4030_mmc_config.
twl4030_mmc_config initializes the twl4030 power setting to
the mmc device. Because it is in the twl4030 power domain, move
it out of drivers/mmc/omap3_mmc.c and into drivers/power/twl4030.c.
The function was renamed to twl4030_power_mmc_init because all
the functions in this file are to have the format
twl4030_power_<device>_<action>
In this case the suffix is mmc_init so
device : mmc
action : init
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
Because twl4030 now has its own device files, move exiting
omap3 power_init_r to a new location.
power_init_r is the only function in board/omap3/common.
It initializes the twl4030 power for the board and enables
the led.
The power part of the the function is moved to twl4030_power_init in
drivers/power/twl4030.c The power compilation is conditional on the
existing config variable CONFIG_TWL4030_POWER.
The led part is moved to twl4030_led_init in the new file
drivers/misc/twl4030_led.c The led compilation is conditional on
the new config variable CONFIG_TWL4030_LED
The directory board/omap3/common was removed because power_init_r
was the only function in it.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
Commit 2b3f12c2 added support for configurable SMC Rx buffer length on
8xx systems. Enable this feature on TQM8xx* based boards.
This fixes the problem that pasting text in the middle of a line
(i. e. inserting in edit mode) did not work - only the first two
characters got inserted, the rest was lost.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The Zoom2 power reset button is on the top right side of the
main board. Press and hold for about to 8 seconds to completely
reset the board.
Some of the beta boards have a hardware problem that prevents
using this feature. If is difficult to further characterize the
boards that fail. So disable resetting for all beta boards.
The Zoom1 reset button is the red circle on the top right,
front of the board. Press and hold the button for 8 seconds to
completely reset the board.
After analyzing beagle, it was determined that other boards
that use the twl4030 for power managment can also make use
this function.
The resetting is done by the power management part of the twl4030.
Since there is no existing drivers/power, add one.
The compilation of power/twl4030.h is controlled by the config
variable CONFIG_TWL4030_POWER
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
The TWL4030 supplies many peripherals for OMAP3 boards. These include
power management, usb and, keyboard.
The product description is found here:
http://focus.ti.com/docs/prod/folders/print/tps65950.html
Product reference document, tps65950.pdf, is found here:
http://www.ti.com/lit/gpn/tps65950
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
This problem is seen on Zoom1 and Zoom2 in the startup and
when i2c probe is used
Before :
In: serial
Out: serial
Err: serial
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_pin: I2C_STAT=1000
I2C read: I/O error
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot: 0
OMAP3 Zoom1# i2c probe
Valid chip addresses:timed out in wait_for_bb: I2C_STAT=1000
02 03 04 05 06 07 08 09 0A 0B 0C 0D <snip>
After :
In: serial
Out: serial
Err: serial
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot: 0
OMAP3 Zoom1# i2c probe
Valid chip addresses: 48 49 4A 4B
The addresses are for the twl4030.
The prescalar that converts the function clock to the sampling
clock is hardcoded to 0. The reference manual recommends 7
if the function clock is 96MHz.
Instead of just changing the hardcoded values, the prescalar
is calculated from the value I2C_IP_CLK.
The i2c #defines are in kHz. The speed passed into the
i2c init routine is in Hz. To be consistent, change the
defines to be in Hz.
The timing calculations are based on what is done in the
linux 2.6.30 kernel in drivers/i2c/buses/i2c_omap.c as
apposed to what is done in TRM.
The major variables in the timing caculations are
specified as #defines that can be overriden as required.
The variables and their defaults are
I2C_IP_CLK SYSTEM_CLOCK_96
I2C_INTERNAL_SAMPLING_CLK 19200000
I2C_FASTSPEED_SCLL_TRIM 6
I2C_FASTSPEED_SCLH_TRIM 6
I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLH I2C_FASTSPEED_SCLH_TRIM
This was runtime verified on Zoom1, Zoom2, Beagle and Overo.
The 400kHz and 3.4M cases were verifed on test Zoom1,
Zoom2, Beagle and Overo configurations.
Testing for omap2 will be done in a second step as Nishanth
and Jean-Christophe commented.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
DDR2 Auto-calibration needs to be disabled on the NAND booting PPC4xx
targets. Otherwise the configured fixed init values for some DDR2
controller registers (e.g. RQDC) are not initialized at all resulting
in a non working SDRAM.
Signed-off-by: Stefan Roese <sr@denx.de>
Board support for the Guntermann & Drunck CompactCenter and
DevCon-Center.
Based on the AMCC Canyonlands board support by Stefan Roese.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the esd VME8349 board equipped with the
MPC8349. It's a VME PMC carrier board equipped with the Tundra
TSI148 VME-bridge.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Up to this point in time, the sbc8349 board was storing the u-boot
image in flash 2x. One for the HRCW value at the beginning of
flash (0xff80_0000), and once close to the end of flash (0xfff8_0000)
for the actual image that got executed.
This moves the TEXT_BASE to be the beginning of flash, which makes
the second copy of the image redundant, and frees up the flash
from the end of the environment storage to the end of the flash
device itself.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Commit 7024aa14 was supposed to fix the #ifdef/#endif pairing in
include/configs/at91cap9adk.h, but did not cate all problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The reordering of include/common.h by commit fcd3c87e49 broke
boards with status LED support, resulting in
error: #error Status LED configuration missing
errors. Undo this reordering to avoid this issue.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 70ebf316 factored out the ROUND() macro into include/common.h,
not realizing that the primary use of this macro on AT91 systems was
in start.S where common.h was not included, and could not be included
because it contains a lot of C code which the assembler doesn't
understand.
This patch wraps such code in common.h in a "#ifndef __ASSEMBLY__"
construct, and then adds an include to cpu/arm926ejs/start.S thus
solving the problem.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch updates the support for EB+MCF-EV123 board and needs
the [PATCH 1/2 V3] new video driver for bus vcxk framebuffers
* remove the board framebuffer driver
* use the common bus_vcxk framebuffer driver
* adds bmp support
* adds splashimage support
* fix serveral cosmetical errors
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
[agust@denx.de: fixed some style issues before applying]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This patch adds a new video driver
* adds common bus_vcxk framebuffer driver
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
[agust@denx.de: fixed lots of style issues before applying]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
include/lcd.h has different vidinfo for different platforms,
and several extern declaration, but one for the default case was
missing. This makes them a single extern declaration for everyone.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
This patch adds support for the AVR32 LCD controller. This patch is
based off the latest u-boot-video.
A quick summary of what's going on:-
Enable LCDC pixel clock
Enable LCDC port pins
Add framebuffer pointer to global_data struct
Allocate framebuffer
To use the new code, update your board config to include something like
this:-
#define CONFIG_LCD 1
#if defined(CONFIG_LCD)
#define CONFIG_CMD_BMP
#define CONFIG_ATMEL_LCD 1
#define LCD_BPP LCD_COLOR16
#define CONFIG_BMP_16BPP 1
#define CONFIG_FB_ADDR 0x10600000
#define CONFIG_WHITE_ON_BLACK 1
#define CONFIG_VIDEO_BMP_GZIP 1
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144
#define CONFIG_ATMEL_LCD_BGR555 1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
#define CONFIG_SPLASH_SCREEN 1
#endif
The standard U-Boot BMP and Splash-screen features should just work.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
[agust@denx.de: fixed some style issues]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This moves some extern declaration from lcd.c to lcd.h, removing
unneeded ifdef around a pair of them. Additionally, since
gunzip_bmp() was declared static in cmd_bmp.c but extern in lcd.c, I
removed the static. The extra "#include <lcd.h>" in cmd_bmp.c is
added to ensure the header is consistent with the source.
This has been compile-tested on both ARM (at91 boards) and PowerPC
(HH405_config, TQM823L_LCD_config, mcc200_config), to test all use
combinations.
Signed-off-by: Alessandro Rubini <rubini@gnudd.it>
[agust@denx.de: removed gunzip_bmp() fixes as commit c01171ea did it]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This reverts commit b201171f2b.
The commit caused problems for example when unpacking kernel images:
Uncompressing Kernel Image ... Error: inflate() returned -2
GUNZIP: uncompress, out-of-mem or overwrite error - must
RESET board to recover
Conflicts:
include/u-boot/zlib.h
lib_generic/zlib.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch removes the "alterpll" command and replaces it with the now
ppc4xx standard "chip_config" command to configure the I2C bootstrap
EEPROM.
Signed-off-by: Stefan Roese <sr@denx.de>
Kilauea has an AT24C02 EEPROM which has an 8 byte page. Without defining
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS to 3 the "eeprom" command doesn't
work correctly.
Additionally the page write delay (CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
is set to a more defensive value of 10ms.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds a generic command for programming I2C bootstrap
eeproms on PPC4xx. An implementation for Canyonlands board is
included.
The command name is intentionally chosen not to be PPC4xx specific.
This way other CPU's/SoC's can implement a similar command under
the same name, perhaps with a different syntax.
Usage on Canyonlands:
=> chip_config
Available configurations (I2C address 0x52):
600-nor - NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100
600-nand - NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100
800-nor - NOR CPU: 800 PLB: 200 OPB: 100 EBC: 100
800-nand - NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100
1000-nor - NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100
1000-nand - NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100
1066-nor - NOR CPU:1066 PLB: 266 OPB: 88 EBC: 88 ***
1066-nand - NAND CPU:1066 PLB: 266 OPB: 88 EBC: 88
=> chip_config 600-nor
Using configuration:
600-nor - NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100
done (dump via 'i2c md 52 0.1 10')
Reset the board for the changes to take effect
Other 4xx boards will be migrated to use this command soon
as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
The XPedite1000 is an X-ES product thus it can be put in board/xes along
with other X-ES boards. Along with the move, the board was renamed to
XPedite1000 from XPedite1K to fit X-ES's standard naming convention.
Maintainership was also transfered to Peter Tyser.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The XPedite1000 only has 2 available ethernet ports:
ppc_4xx_eth2 (EMAC2) and ppc_4xx_eth3 (EMAC3)
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Previously an I2C EEPROM was used. The EEPROM had size, reliability,
and access issues which are resolved by storing the environment in
flash.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The XPedite1000 can be built with 4 total flashes:
- 512KB AMD socketed
- 16MB Intel soldered
- 2 x 32MB AMD MirrorBit flashes
Add support for the optional 2 32MB CFI-compliant AMD flashes
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
By default, the XPedite1000 comes installed with xMon, a proprietary
bootloader. xMon stores its MAC address in an onboard EEPROM. Rather
than requiring a non-standard location in the EEPROM to be reserved for
MAC addresses, store the MAC addresses in U-Boot's standard environment.
A U-Boot application or OS application can be used to migrate xMon MAC
addresses to U-Boot's environment if necessary.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Using the CFI flash driver will allow write access to the 16MB Intel
StrataFlash present on the XPedite1000. The 512KB socketed (non
CFI-compliant flash) will no longer be writable.
The mapping of the 16MB Strata flash was moved to 0xff000000 and the
512KB AMD socketed flash was moved to 0xfe000000.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds I2C support for mvBC-P and defines flash layout
matching the shipped product.
Signed-off-by: Andr Schwarz <andre.schwarz@matrix-vision.de>
This patch updates zlib to the latest stable version.
Only relevant zlib parts were ported to u-boot tree, as was done for
the previously used version of zlib (0.95). New zlib gives faster
inflate performance and other improvements, see www.zlib.net
Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Reviewed-by: Angelo Castello <angelo.castello@st.com>
Edited commit message
Signed-off-by: Wolfgang Denk <wd@denx.de>
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
- changed CONFIG_DRIVER_SMC911X* to CONFIG_SMC911X*
- cleaned up line lengths
- modified all boards that override weak function in this driver
- added
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Mike Frysinger <vapier@gentoo.org>
On 04 Oct 2008 Pieter posted a dns implementation for U-Boot.
http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg10216.html
>
> DNS can be enabled by setting CFG_CMD_DNS. After performing a query,
> the serverip environment var is updated.
>
> Probably there are some cosmetic issues with the patch. Unfortunatly I
> do not have the time to correct these. So if anybody else likes DNS
> support in U-Boot and has the time, feel free to patch it in the main tree.
Here it is again - slightly modified & smaller:
- update to 2009-06 (Pieter's patch was for U-Boot 1.2.0)
- README.dns is added
- syntax is changed (now takes a third option, the env var to store
the result in)
- add a random port() function in net.c
- sort Makefile in ./net/Makefile
- dns just returns unless a env var is given
- run through checkpatch, and clean up style issues
- remove packet from stack
- cleaned up some comments
- failure returns much faster (if server responds, don't wait for
timeout)
- use built in functions (memcpy) rather than byte copy.
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The net code is mostly consistent in using 'Packet' rather than 'Pkt', so
rename the minor detractor to follow suite.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This is Marvell's 88F6281_A0 based reference design board
This patch is tested for-
1. Boot from DRAM/NAND flash/NFS
2. File transfer using tftp and loadb
3. NAND flash read/write/erase
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Use the MPC8572's eLBC to access 1 GB (or greater) onboard NAND flash
via the 'nand' command.
Previously, the XPedite5370's NAND chip selects were properly
configured, but NAND support was not enabled.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Increasing CONFIG_SYS_BOOTM_LEN from 8 MB to 16 MB is necessary to
support uncompressing images larger than 8 MB when using the bootm
command.
Note that recent Linux kernels for the 85xx and 86xx map greater than
16MB of memory on bootup, but we use 16MB to maintain compatibility with
older Linux kernels for now.
Signed-off-by: Nate Case <ncase@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Buffered writes are possible on the XPedite5200 and XPedite5370 and greatly
improve NOR flash write speeds
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match
the 86xx user's manual and other Freescale architectures
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".
The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The MPC8641HPCN board is capable of swizzling the upper address bit of
the NOR flash we boot out of which creates the concept of "virtual"
banks. This is useful in that we can flash a test of image of u-boot
and reset to one of the virtual banks while still maintaining a
working image in "bank 0".
The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
A large number of boards (all AT91 based) duplicated the ROUND()
macro in their board specific config files. Add the definition to
include/common.h and clean up the board config files.
Signed-off-by: Wolfgang Denk <wd@denx.de>
We have always mapped at least 16M in the kernel and we have seen cases
with new kernel features that a kernel image needs more than 8M of
memory.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
CONFIG_SYS_MALLOC_LEN is defined in the board config, and
the keymile-common.h, which collects common options used
by all keymile-boards. This results in a compile error
when compiling the kmeter1 board. So remove this define
in the board config file.
Signed-off-by: Heiko Schocher <hs@denx.de>
This patch adds the possibility to call a board specific
i2c bus reset routine for the fsl_i2c bus driver, and adds
this option for the keymile kmeter1 board.
The deblock sequence for this board is implemented and
tested in the following way:
CR = 0x20 (release SDA and SCL pin)
CR = 0xa0 (start read)
dummy read
dummy read
if 2. dummy read == 0x00
3. dummy read
CR = 0x80 (SDA and SCL now 1 SR = 0x86)
CR = 0x00 (Modul reset SR=0x81)
CR = 0x80 (SDA and SCL = 1, SR = 0x81)
Signed-off-by: Heiko Schocher <hs@denx.de>
- CONFIG_SYS_MAX_I2C_BUS changed to 1
We use only one I2C hardwarecontroller on this boards, so
change the CONFIG_SYS_MAX_I2C_BUS to 1.
- common: dont print errormsg if second IVM Block lacks.
- 82xx, mgcoge: fix double mtdpart entry in environment
- 82xx, mgcoge: activate on second Flash the second bank.
- common: CONFIG_ENV_SIZE 0x4000 for all keymile boards
- common: Change malloc size to 1MByte for all Keymile boards
We need a bigger malloc area for the environment support (128k)
on some Keymile boards (kmeter1) and the upcoming UBI support.
Change it to 1MB for all Keymile boards to be on the save side.
Also define CONFIG_SYS_64BIT_VSPRINTF which is needed for
UBI/UBIFS support.
- Add UBI support to all Keymile boards
- change manner of writing "/localbus/ranges" node
instead of writting the complete "/localbus/ranges" node
before booting Linux, only update the ranges entries
which gets dynamical detected (size of flashes).
This is needed, because keymile adds in the DTS
"/localbus/ranges" node entries, which u-boot must
not overwrite/delete.
- kmeter, mgcoge: define 2 seperate regions needed for the Intel P30 chips
The Intel P30 chip has 2 non-identical chips on
one die, so we need to define 2 seperate regions
that are scanned by physmap_of independantly.
- kmeter1: Add MTD concat support to Keymile boards
- 82xx, mgcoge: add "unlock=yes" to default environment
- added CONFIG_MTD_DEVICE to get in sync with mainline code
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds unaligned.h for ARM (needed to build with LZO
compression). The file is taken from the linux kernel, but includes
u-boot headers instead.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Stefan Roese <sr@denx.de>
Shove a lot of the HOSTCC and related #ifdef checking crap into the new
compiler.h header so that we can keep all other headers nice and clean.
Also introduce custom uswap functions so we don't have to rely on the non
standard implementations that a host may (or may not in the case of OS X)
provide. This allows mkimage to finally build cleanly on an OS X system.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Commit 2419169f removed support for legacy NAND and disk on chip but
missed to update the code for a few boards. This patch fixes the
resulting build issues.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds unaligned.h for ARM (needed to build with LZO
compression). The file is taken from the linux kernel, but includes
u-boot headers instead.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Stefan Roese <sr@denx.de>
This patch adds a SATA harddisk driver for the canyonlands.
This patch is kernel driver's porting.
This patch corresponded to not cmd_scsi but cmd_sata.
This patch divided an unused member with ifndef __U_BOOT__ in the structure.
[environment variable, boot script]
setenv bootargs root=/dev/sda7 rw
setenv bootargs ${bootargs} console=ttyS0,115200
ext2load sata 0:2 0x400000 /canyonlands/uImage
ext2load sata 0:2 0x800000 /canyonlands/canyonlands.dtb
fdt addr 0x800000 0x4000
bootm 0x400000 - 0x800000
If you drive SATA-2 disk on Canyonlands, you must change parts from
PI2PCIE212 to PI2PCIE2212 on U25. We confirmed to boot by using
following disks:
1.Vendor: Fujitsu Type: MHW2040BS
2.Vendor: Fujitsu Type: MHW2060BK
3.Vendor: HAGIWARA SYS-COM:HFD25S-032GT
4.Vendor: WesternDigital Type: WD3200BJKT (CONFIG_LBA48 required)
5.Vendor: WesternDigital Type: WD3200BEVT (CONFIG_LBA48 required)
6.Vendor: Hitachi Type: HTS543232L9A300 (CONFIG_LBA48 required)
7.Vendor: Seagate Type: ST31000333AS (CONFIG_LBA48 required)
8.Vendor: Transcend Type: TS32GSSD25S-M
9.Vendor: MTRON Type: MSD-SATA1525-016
Signed-off-by: Kazuaki Ichinohe <kazuichi at fsi.co.jp>
From: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
This patch adds support for the Tundra TSI148 VME-bridge. It's used on
the upcoming esd VME8349 board.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
While the 1.0 and 1.2 spin of the bf533-stamp boards can handle the higher
SCLK speeds just fine, the 1.1 spin cannot due to the bugs introduced with
the shortened SDRAM traces. So lower the SCLK speed down to a value that
all three can handle.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Part of the mini Blackfin ABI with operating systems is that they can use
0x4f0-0x4f8 to pass log buffers to/from bootloaders. So add support to
U-Boot for reading the log buffer.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Commit 8d2effea added a warning for configurations that use NAND
without defining the (then necessary) CONFIG_SYS_64BIT_VSPRINTF but
failed to fix the affected boards.
This patch covers the non-PPC boards that were missed in the previous
patch (commit 170c1972).
Signed-off-by: Wolfgang Denk <wd@denx.de>
This is Marvell's 88F6281_A0 based custom board developed
for wireless access point product
This patch is tested for-
1. Boot from DRAM/SPI flash/NFS
2. File transfer using tftp and loadb
3. SPI flash read/write/erase
4. Booting Linux kernel and RFS from SPI flash
5. Boot from USB supported
Reviewed-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Reference:
http://plugcomputer.org/http://openplug.org/plugwiki/index.php/Das_U-boot_plug_support
This patch is tested for-
1. Boot from DRAM/NAND flash
2. File transfer using tftp
3. NAND flash read/write/erase
4. Linux kernel and RFS Boot from NAND
5. Enabled USB PHY init for kernel need
6. Boot from USB supported
Note: to boot Kirkwood kernel with USB support,
you should add "usb start" in the boot sequence
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Commit 8e55258f created function uec_standard_init() to initialize
all UEC interfaces for 83xx and 85xx but failed to provide a
prototype for it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 8d2effea added a warning for configurations that use NAND
without defining the (then necessary) CONFIG_SYS_64BIT_VSPRINTF but
failed to fix the affected boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
So far the console API uses the following naming convention:
======Extract======
typedef struct device_t;
int device_register (device_t * dev);
int devices_init (void);
int device_deregister(char *devname);
struct list_head* device_get_list(void);
device_t* device_get_by_name(char* name);
device_t* device_clone(device_t *dev);
=======
which is too generic and confusing.
Instead of using device_XX and device_t we change this
into stdio_XX and stdio_dev
This will also allow to add later a generic device mechanism in order
to have support for multiple devices and driver instances.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
A bug was introduced by commit e94e460c6e
which affected non-MPC83xx/85xx/86xx ppc boards which had CONFIG_DDR_ECC
defined and resulted in errors such as:
Configuring for canyonlands board...
fsl_dma.c:50:2: error: #error "Freescale DMA engine not supported on your
processor"
make[1]: *** No rule to make target `.depend', needed by `libdma.a'. Stop.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
arranged configurations in alphabetical order
CONFIG_CMD_FLASH moved under ifndef CONFIG_SYS_NO_FLASH
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Legacy NAND had been scheduled for removal. Any boards that use this
were already not building in the previous release due to an #error.
The disk on chip code in common/cmd_doc.c relies on legacy NAND,
and it has also been removed. There is newer disk on chip code
in drivers/mtd/nand; someone with access to hardware and sufficient
time and motivation can try to get that working, but for now disk
on chip is not supported.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This is needed for the MPC512x NAND driver (fsl_nfc_nand.c) which already
defines such a 4k plus 218 bytes ECC layout.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch simply converts the board to the hwconfig infrastructure.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
fdt_fixup_esdhc() will either disable or enable eSDHC nodes, and
also will fixup clock-frequency property.
Plus, since DR USB and eSDHC are mutually exclusive, we should
only configure the eSDHC if asked through hwconfig.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds support for eSDHC on MPC837XERDB boards. The WP
switch doesn't seem to work on RDB boards though, the WP pin is
always asserted (can see the pin state when it's in GPIO mode).
FSL DR USB and FSL eSDHC are mutually exclusive because of pins
multiplexing, so user should specify 'esdhc' or 'dr_usb' options
in the hwconfig environment variable to choose between the
devices.
p.s.
Now we're very close to a monitor len limit (196 bytes left using
gcc-4.2.0), so also increase the monitor len by one sector (64 KB).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
This patch implements fdt_fixup_esdhc() function that is used to fixup
the device tree.
The function adds status = "disabled" propery if esdhc pins muxed away,
otherwise it fixups clock-frequency for esdhc nodes.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
This patch implements simple hwconfig infrastructure: an
interface for software knobs to control a hardware.
This is very simple implementation, i.e. it is implemented
via `hwconfig' environment variable. Later we could write
some "hwconfig <enable|disable|list>" commands, ncurses
interface for Award BIOS-like interface, and frame-buffer
interface for AMI GUI[1] BIOS-like interface with mouse
support[2].
Current implementation details/limitations:
1. Doesn't support options dependencies and mutual exclusion.
We can implement this by integrating apt-get[3] into the
u-boot. But I didn't bother yet.
2. Since we don't implement hwconfig command, i.e. we're working
with the environement directly, there is no way to tell that
toggling a particular option will need a reboot to take
an effect. So, for now it's advised to always reboot the
target after modifying hwconfig variable.
3. We support hwconfig options with arguments. For example,
set hwconfig dr_usb:mode=peripheral,phy_type=ulpi
That means:
- dr_usb - enable Dual-Role USB controller;
- dr_usb:mode=peripheral - USB in Function mode;
- dr_usb:phy_type=ulpi - USB should work with ULPI PHYs;
The purpose of this simple implementation is to define some
internal API and then we can continue improving user experience
by adding more mature interface, like hwconfig command with
bells and whistles. Or not adding, if we feel that current
interface fits its needs.
[1] http://en.wikipedia.org/wiki/American_Megatrends
[2] Regarding ncurses and GUI with mouse support -- I'm just
kidding.
[3] The comment regarding apt-get is also a joke, meaning that
dependency tracking could be non-trivial. For example, for
enabling HW feature X we may need to disable Y, and turn Z
into reduced mode (like RMII-only interface for ethernet,
no MII).
It's quite trivial to implement simple cases though.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Saving the environment leads to overwriting u-boot itself,
bricking boards. Increase u-boot's image size so the environment
base address doesn't end up overlapping u-boot text.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
When enabling NAND support for a board, one must also define
CONFIG_SYS_64BIT_VSPRINTF because this is needed in nand_util.c
for correct output.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Dave Liu <daveliu@freescale.com>
Cc: Ron Madrid <ron_madrid@sbcglobal.net>
Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
Remove individual CPU specific DSPI driver.
Add required feature for the common DSPI driver in cpu_init and
in platform configuration file.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Update serial boot DRAM's Internal RAM, vector table and DRAM in
start.S, serial flash's read status command over SPI and NOR
flash.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Remove dead code that was obviously a left-over from copy & paste.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>