brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-10-01 00:50:43 +09:00
Code Issues Projects Releases Wiki Activity

4xx: add missing CONFIG_SYS_SRAM_SIZE definition

Browse Source 
A number of boards define CONFIG_SYS_SRAM_BASE but fail to define
CONFIG_SYS_SRAM_SIZE which is needed when cleaning up the code that
prints this information with the bdinfo command.

Add the missing deinitions.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Wolfgang Denk 2010-09-10 23:04:05 +02:00
parent 07517e7f4f
commit bf56080769
5 changed files with 5 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
include/configs/bubinga.h
View File

@ -179,6 +179,7 @@
* (Set up by the startup code)
*/
#define CONFIG_SYS_SRAM_BASE 0xFFF00000
#define CONFIG_SYS_SRAM_SIZE (256 << 10)
#define CONFIG_SYS_FLASH_BASE 0xFFF80000
/*-----------------------------------------------------------------------

1
include/configs/canyonlands.h
View File

@ -111,6 +111,7 @@
#define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 64k */
#define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */
#define CONFIG_SYS_SRAM_SIZE (256 << 10)
#define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000
#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal peripherals */

1
include/configs/intip.h
View File

@ -93,6 +93,7 @@
#define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 64k */
#define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */
#define CONFIG_SYS_SRAM_SIZE (256 << 10)
#define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000
#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal periph. */

1
include/configs/luan.h
View File

@ -53,6 +53,7 @@
#define CONFIG_SYS_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */
#define CONFIG_SYS_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */
#define CONFIG_SYS_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */
#define CONFIG_SYS_SRAM_SIZE (1 << 20)
#define CONFIG_SYS_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */
#define CONFIG_SYS_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */

1
include/configs/t3corp.h
View File

@ -86,6 +86,7 @@
#define CONFIG_SYS_OCM_BASE 0xE7000000 /* OCM: 64k */
#define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */
#define CONFIG_SYS_SRAM_SIZE (256 << 10)
#define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000
#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal periph. */