fsl_esdhc: Always stop clock before changing frequency

We need to stop the clocks on 83xx/85xx as well as imx.  No need to make
this code conditional to just imx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Kumar Gala 2010-03-18 15:51:05 -05:00
parent ffa37fc98d
commit cc4d122658
2 changed files with 4 additions and 10 deletions

View File

@ -1,5 +1,5 @@
/*
* Copyright 2007, Freescale Semiconductor, Inc
* Copyright 2007,2010 Freescale Semiconductor, Inc
* Andy Fleming
*
* Based vaguely on the pxa mmc code:
@ -265,18 +265,13 @@ void set_sysctl(struct mmc *mmc, uint clock)
clk = (pre_div << 8) | (div << 4);
/* On imx the clock must be stopped before changing frequency */
if (cfg->clk_enable)
esdhc_clrbits32(&regs->sysctl, SYSCTL_CKEN);
esdhc_clrbits32(&regs->sysctl, SYSCTL_CKEN);
esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
udelay(10000);
clk = SYSCTL_PEREN;
/* On imx systems the clock must be explicitely enabled */
if (cfg->clk_enable)
clk |= SYSCTL_CKEN;
clk = SYSCTL_PEREN | SYSCTL_CKEN;
esdhc_setbits32(&regs->sysctl, clk);
}

View File

@ -2,7 +2,7 @@
* FSL SD/MMC Defines
*-------------------------------------------------------------------
*
* Copyright 2007-2008, Freescale Semiconductor, Inc
* Copyright 2007-2008,2010 Freescale Semiconductor, Inc
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@ -148,7 +148,6 @@
struct fsl_esdhc_cfg {
u32 esdhc_base;
u32 no_snoop;
u32 clk_enable;
};
/* Select the correct accessors depending on endianess */