I do not understand the change made to this file by
commit 691d719db7 ("common: Drop init.h from common header").
git show 691d719db7 -- arch/arm/mach-uniphier/dram/umc-pxs2.c
This file does not call or define any functions declared in <init.h>
Simply revert the change made to this file.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
I do not understand the changes made to this file by
commit 90526e9fba ("common: Drop net.h from common header").
git show 90526e9fba -- arch/arm/mach-uniphier/micro-support-card.c
The necessary declaration is already included by <netdev.h> at line 112.
It also moved the <dm/of.h> inclusion, but I do not understand the
motivation of doing so, either.
Simply revert the changes made to this file.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
I do not understand the change made to this file by
commit 90526e9fba ("common: Drop net.h from common header").
git show 90526e9fba -- arch/arm/mach-uniphier/arm32/psci.c
It added <asm/cache.h> while this file does not call the standard cache
functions at all.
All the uniphier-specific cache functions, uniphier_cache_*() are
declared in cache-uniphier.h, which is already included from this file.
Including <asm/system.h> is sensible to fix the -Wmissing-prototypes
warnings because this file defines psci_cpu_on and psci_system_reset().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[ Linux commit 9afbe7c0140f663586edb6e823b616bd7076c00a ]
If the write protect signal from this IP is connected to the NAND
device, this IP can handle the WP# pin via the WRITE_PROTECT
register.
The Denali NAND Flash Memory Controller User's Guide describes
this register like follows:
When the controller is in reset, the WP# pin is always asserted
to the device. Once the reset is removed, the WP# is de-asserted.
The software will then have to come and program this bit to
assert/de-assert the same.
1 - Write protect de-assert
0 - Write protect assert
The default value is 1, so the write protect is de-asserted after
the reset is removed. The driver can write to the device unless
someone has explicitly cleared register before booting the kernel.
The boot ROM of some UniPhier SoCs (LD4, Pro4, sLD8, Pro5) is the
case; the boot ROM clears the WRITE_PROTECT register when the system
is booting from the NAND device, so the NAND device becomes read-only.
Set it to 1 in the driver in order to allow the write access to the
device.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
drivers/net/smc911x.c has been converted to DM.
select DM_ETH to enable it for all the UniPhier platform boards.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This CONFIG option is only used in denali_spl.c
Move it close to SPL_NAND_DENALI, and make it depend on SPL_NAND_DENALI.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
- Add DM_ETH support for lx2160aqds, ls2080aqds, ls1088aqds
- QSI related fixes on ls1012a, ls2080a, ls1046a, ls1088a, ls1043a based
platforms
- Bug-fixes/updtaes related to ls1046afrwy, fsl-mc, msi-map property
Enable these two options to let compiler eliminate unused code.
On R2Dplus, this results in considerable amount of saved space:
text data bss dec hex filename
- 266580 13196 39076 318852 4dd84 u-boot
+ 220214 12797 38745 271756 4258c u-boot
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
Enable DDR52 modes, since the SD core supports correct switching now.
For completeness, list HS200 modes, however those were already enabled.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable OpTee support on R-Car Gen3, so that U-Boot would copy the
OpTee /firmware and /reserved-memory nodes into the Linux DT.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
The prior-stage firmware generates DT fragment containing the /firmware
node, /reserved-memory node and /memory@ nodes. Merge these nodes into
the U-Boot DT, so U-Boot can use this information.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reserve 4 kiB of space in R-Car Gen3 DTs when those DTs are compiled
to permit patching in OpTee-OS /firmware node, /reserved-memory node
and possibly also additional /memory@ nodes.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Add weak function which is called right after fdtdec_setup() configured
the U-Boot DT. This permits board-specific adjustments to the U-Boot DT
before U-Boot starts parsing the DT. This could be used e.g. to patch in
various custom nodes or merge in DT fragments from prior-stage firmware.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
This function is useful to merge a subset of DT into another DT, for
example if some prior-stage firmware passes a DT fragment to U-Boot
and U-Boot needs to merge it into its own DT. Export this function
to permit implementing such functionality.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
This driver is safe to use in SPL without relocation. Denying
DM_FLAG_PRE_RELOC prevents its usability for verifying the main U-Boot
or other artifacts from the SPL unless needless enabling the full driver
set (SPL_OF_PLATDATA).
Fixes: 17e1174085 ("drivers: crypto: rsa_mod_exp: avoid DM_FLAG_PRE_RELOC")
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Quite a few tests still use ut_assertok(memcmp(...)) and variants. Modify
them to use the macro designed for this purpose.
Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
the mpc83xxx suvd3 variant is not longer used, so
remove it.
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This macro is only used (tested for existence) in mpc83xx.c, which
unconditionally includes mpc83xx.h where it is unconditionally
defined. Removing it makes the remaining code easier to read.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the
LS2080AQDS board.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add support for selecting the appropriate DTS file depending on the
SERDES protocol used.
The fsl-ls2080a-qds DTS will be used by default if there isn't a DTS
file specifically made for the current SERDES protocol.
This patch adds the necessary DPMAC nodes (DPMAC 1-8) for
protocol 42 (0x2A) on SD#1.
Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled
implement the board_fit_config_name_match() function in order to choose
the appropriate DTS.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2
Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH
is activated. Also, force the PCI devices to be enumerated at probe
time.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the
LS1088AQDS board.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2
Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH
is activated. Also, force the PCI devices to be enumerated at probe
time.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add support for selecting the appropriate DTS file depending on the
SERDES protocol used. The fsl-ls2088a-qds DTS will be used by default if
there isn't a DTS file specifically made for the current SERDES
protocol.
This patch adds support for the on-board ports (DPMAC 1,2 and 4,5) found
on the SERDES protocols 21(0x15) and 29(0x1d) for SD#1.
On the LS1088AQDS board EMDIO1 is used with two onboard RGMII PHYs
(Realtek RTL8211FD-CG), as well as 2 input/output connectors for
mezzanine cards. Configuration signals from the Qixis FPGA control the
routing of the external MDIOs.
Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one
of the 2 IO slots. As a consequence, a new node is added to
describe register 0x54 as a MDIO mux controlled with child nodes
describing all the IO slots as MDIO buses.
Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled
implement the board_fit_config_name_match() function in order to choose
the appropriate DTS.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
ls1046afrwy does not support sata boot.
So Override default BOOT_TARGET_DEVICES
and support only mmc, usb and dhcp as boot targets.
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The DPC fixup for MAC address and enet_if is not made if
/board/ports node is missing in DPC file.
Add /board/ports or /ports nodes if them are missing.
Signed-off-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Ioana Ciornei <Ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
CONFIG_MTD_NOR_FLASH flag needs to be enable for all
boot sources,as all flash drivers need to compile in
TFA Boot.Probe ifc nor flash only when there is nor
flash available on board.So needs to detect ifc-nor
flash at run-time for probing.
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable CONFIG_DM_ETH and CONFIG_DM_MDIO and related configs for the
LX2160AQDS board.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled implement the
board_fit_config_name_match() function in order to choose the
appropriate DTS for the current SERDES protocol configuration.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In case CONFIG_DM_ETH is enabled, no hardcoding is necessary for DPAA2
Ethernet devices. Compile out any unnecessary setup when CONFIG_DM_ETH
is activated. Also, force the PCI devices to be enumerated at probe
time.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add device trees describing possible uses of mezzanine cards depending
on the SERDES protocol employed.
This patch adds DPAA2 networking support for the following protocols on
each SERDES block:
* SD #1: 3, 7, 19, 20
* SD #2: 11
Each SERDES block has a different device tree file per protocol
supported, where the IO SLOTs used are enabled and PHYs located on the
mezzanine cards are described. Also, dpmac nodes are edited and their
associated phy-connection-type and phy-handle are added.
Top DTS files are also added for each combination of protocol on the 3
SERDES blocks.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The LX2160A processor has two external MDIO interfaces, described in the
DTS as emdio1 and emdio2.
On the LX2160AQDS board EMDIO1 is used with two onboard RGMII PHYs
(Realtek RTL8211FD-CG), as well as eight input/output connectors for
mezzanine cards. Configuration signals from the Qixis FPGA control the
routing of the external MDIOs.
Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one
of the 8 IO slots. As a consequence, a new node is added to
describe register 0x54 as a MDIO mux controlled with child nodes
describing all the IO slots as MDIO buses.
Also, DPMAC 17 and 18 are updated to reference the on-board PHYs.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add nodes for DPMACs 1, 2 and 5-6 which were missing from the
description. These will be later used on the LX2160AQDS specific DTS.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Similarly to iommu-map, the msi-map property must also be fixed up
in the device tree, in order for the icid -> streamid translation
be possible in the MSI case as well.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Diana Craciun <diana.craciun@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Bus callback functions for read/write/reset need to be set only for
DM_ETH, moving endif a bit lower.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Commit 323d3af59f ("configs: ls1012ardb: Enable
CONFIG_SYS_RELOC_GD_ENV_ADDR") enables the config only for LS1012ARDB.
Apart from LS1012A-RDB, other platforms such as LS1012A-FRWY, LS2088A
and LS1046A-RDB/FRWY also require this config to be enabled. This also
helps in resolving booting crash observed in flash environment.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
All LS1012A board variants have same CONFIG_ENV_SECT_SIZE and
CONFIG_ENV_SIZE values. If both config values are same, flash
environment cannot be saved. Since, CONFIG_ENV_SECT_SIZE needs to be
same as that of flash sector size, this entry cannot be changed.
Reduce CONFIG_ENV_SIZE value to 0x2000. This also helps in making config
value aligned with other boards environemt size.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.kumar@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
CONFIG_SYS_MALLOC_LEN is currently set to low value and leaves very less
space to do malloc in flash environmet. Increase the value to get more
memory and also make it align with other boards(ls1046a, ls1043a etc.)
config values.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
BOOT command currently access spi-nor flash memory directly. As per spi-mem
framework, flash memory access via absolute addresses is no more possible.
Use flash APIs to access memory instead of directly using it.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
MC_INIT command currently access spi-nor flash memory directly. As per
spi-mem framework, flash memory access via absolute addresses is no more
possible. Use flash APIs to access memory instead of directly using it.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
CONFIG_ENV_ADDR helps in picking environment from flash before DDR init.
The macro value is already defined in ls1046ardb_tfa_defconfig, also
define the value as 0x40300000 in qspi_defconfig.
ls1046aqds has one spansion flash "S25FL128S_64K" of size 16M with
sector size 64K. Correct ENV_ADDR and ENV_SECT_SIZE value for QSPI and
TFA defconfigs of the board.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
CONFIG_ENV_ADDR helps in picking environment from flash before DDR init.
QSPI region in LS2088ARDB and LS2088AQDS starts from 0x20000000 offset.
Correct the config value i.e 0x80500000 -> 0x20500000.
Also, define config value as 0x20300000 in qspi defconfig.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
CONFIG_ENV_ADDR helps in picking environment from flash before DDR init.
QSPI region starts from 0x20000000 offset.
Correct the config value i.e 0x80500000 -> 0x20500000.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
According to new qspi driver, some properties like "bus-num, num-cs,
big-endian" are no longer used. Device endiannes can be determined from
device-type data in driver.
Now use board specific compatibles, generic node names and specific
labels to align with linux device-tree properties.
Also consolidate spi-max-frequency to 50Mhz treewide.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable CONFIG_SPI_FLASH_SPANSION in defconfigs of LS1046ARDB and
LS1046AQDS which have two spansion flases i.e s25fs512s each of size
64M.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
