Commit Graph

204 Commits

Author SHA1 Message Date
Jagan Teki
ac97a9ece1 phy: rockchip: Add Rockchip USB2PHY driver
Add Rockchip USB2PHY driver with initial support.

This will help to use it for EHCI controller in host
mode, and USB 3.0 controller in otg mode.

More functionality like charge, vbus detection will
add it in future changes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29 18:13:19 +08:00
Vignesh Raghavendra
28ff144662 drivers: Descend to drivers/soc unconditionally
Descend to drivers/soc directory unconditionally for SPL and U-Boot
builds. Individual drivers can have their own config to check what needs
to be built for SPL. There should be no increase in SPL code size
due to this change.

This is required on K3 SoCs to support DMA in SPL.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
74326a320a Kconfig: Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA
Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA. This allows to use
macros such as CONFIG_IS_ENABLED() that allow conditional compilation of
code for SPL and U-Boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-15 19:50:27 -05:00
Tom Rini
7086de4948 Pull request for UEFI sub-system for efi-2020-04-rc1
This pull request provides:
 
 * support for FIT images for UEFI binaries
 * drivers for hardware random number generators
 * an implementation of the EFI_RNG_PROTOCOL
 * a sub-command for efidebug to display configuration tables
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Merge tag 'efi-2020-04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-04-rc1

This pull request provides:

* support for FIT images for UEFI binaries
* drivers for hardware random number generators
* an implementation of the EFI_RNG_PROTOCOL
* a sub-command for efidebug to display configuration tables
2020-01-08 18:57:11 -05:00
Tom Rini
ce022f2857 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2020-01-08 15:23:49 -05:00
Sughosh Ganu
a248768400 dm: rng: Add random number generator(rng) uclass
Add a uclass for reading a random number seed from a random number
generator device.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 18:08:21 +01:00
Jean-Jacques Hiblot
8c86f96d20 drivers: board: Make the board drivers available in SPL
Make the board driver available in the SPL too. The board driver is a way
to provide useful information about the board and that can be useful in
the SPL too.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 11:13:24 -05:00
Ley Foon Tan
5c9c71b660 spl: Allow cache drivers to be used in SPL
Add an option for building cache drivers in SPL.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Simon Glass
3b65ee34b9 x86: sandbox: Add a PMC emulator and test
Add a simple PMC for sandbox to permit tests to run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:11 +08:00
Rick Chen
31dae22faa spl: cache: Allow cache drivers in SPL
When ax25-ae350 try to enable v5l2 cache
driver in SPL configuration, it need this
option for cache support in SPL.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Miquel Raynal
fb4384490d mtd: Makefile: deep cleanup
Move MTD-related lines out of the root Makefile. Put them in their
respective directories. Enclose some of these new lines to skip them
when building the SPL. MTD core files and some MTD device drivers are
compiled in a mtd.o object and included in the final object only if
MTD support is required (there are two different symbols for that, one
for U-Boot and one for the SPL).

Now that all defconfigs have been fixed, we can stop the logic where
enabling a command selects the core files to compile. This logic is
broken since selecting a symbol with a 'depends on' will not enforce
this secondary dependency.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-12-04 17:10:51 -05:00
Faiz Abbas
7feafb0ae4 ufs: Add Initial Support for UFS subsystem
Add Support for UFS Host Controller Interface (UFSHCI) for communicating
with Universal Flash Storage (UFS) devices. The steps to initialize the
host controller interface are the following:

- Initiate the Host Controller Initialization process by writing to the
Host controller enable register.
- Configure the Host Controller base address registers by allocating a
host memory space and related data structures.
- Unipro link startup procedure
- Check for connected device
- Configure UFS host controller to process requests

Also register this host controller as a SCSI host controller.

Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported to
U-boot.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-10-23 20:47:12 -04:00
Simon Glass
9e5616dea9 Drop PCMCIA
This is no-longer used in U-Boot and has not been converted to driver
model. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 19:27:41 -04:00
Simon Goldschmidt
a8b5031108 spl: kconfig: separate sysreset and firmware drivers from misc
This adds separate kconfig options for drivers/sysreset and
drivers/firmware.

Up to now, CONFIG_SPL_DRIVERS_MISC_SUPPORT added drivers/misc to SPL
build but also added drivers/firmware and drivers/sysreset at the same
time.

Since that is confusing, this patch uses CONFIG_SPL_SYSRESET for
drivers/sysreset and adds CONFIG_SPL_FIRMWARE for
drivers/firmware (and accordingly for the TPL options).

CONFIG_SPL_DRIVERS_MISC_SUPPORT stays for including drivers/misc into
the SPL build (and accordingly for TPL) since there are boards using
non-DM (non UCLASS_MISC) files from drivers/misc. Such boards don't
have CONFIG_SPL_MISC enabled, so cannot use this to include
drivers/misc into the SPL build.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-07-21 12:47:13 +02:00
Ramon Fried
914026d258 drivers: pci_ep: Introduce UCLASS_PCI_EP uclass
Introduce new UCLASS_PCI_EP class for handling PCI endpoint
devices, allowing to set various attributes of the PCI endpoint
device, such as:
* configuration space header
* BAR definitions
* outband memory mapping
* start/stop PCI link

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-07-11 10:05:15 -04:00
Tom Rini
6984044d05 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Assorted stratix10 fixes.
- DDR driver DM migration.
2019-05-07 09:37:11 -04:00
Ley Foon Tan
5918afda9d ddr: altera: Compile ALTERA SDRAM in SPL only
Compile ALTERA_SDRAM driver in SPL only.
Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06 12:44:17 +02:00
Dinh Nguyen
84b124db35 dm: cache: Create a uclass for cache
The cache UCLASS will be used for configure settings that can be found
in a CPU's L2 cache controller.

Add a uclass and a test for cache.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2019-05-05 08:48:50 -04:00
Simon Glass
c882163b09 x86: sandbox: pch: Add a CONFIG option for PCH
At present this uclass is selected only on x86. In order to add a test for
it, it must also support sandbox. Create a new CONFIG_PCH option and
enable it on x86 and sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-20 15:25:30 +08:00
Andrew F. Davis
2d59ec8482 dfu: Make DFU support more SPL friendly
Do this by using $(SPL_) in Makefiles and CONFIG_IS_ENABLED in C code.
This ensures the files and features are only built into the right build
for which they are enabled. Using the macros to simplify this patch was
made possible by the config symbol rename done in the last patch.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-26 08:13:55 -05:00
Andrew F. Davis
6536ca4d66 spl: Kconfig: Drop the _SUPPORT postfix from SPL_DFU
The symbol CONFIG_SPL_DFU_SUPPORT in SPL build has the same
meaning as CONFIG_DFU in regular U-Boot. Drop the _SUPPORT
to allow for cleaner use in code.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2019-01-26 08:13:54 -05:00
Jean-Jacques Hiblot
f811e9763f Kconfig: rename CONFIG_SPL_USB_GADGET_SUPPORT as CONFIG_SPL_USB_GADGET
The SPL option for USB gadget should be named after the option for u-boot
(CONFIG_USB_GADGET)

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-01-10 18:52:55 +01:00
Tom Rini
522e035441 imx for 2019.01
- introduce support for i.MX8M
 - fix size limit for Vhybrid / pico boards
 - several board fixes
 - w1 driver for MX2x / MX5x
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Merge tag 'u-boot-imx-20190101' of git://www.denx.de/git/u-boot-imx

imx for 2019.01

- introduce support for i.MX8M
- fix size limit for Vhybrid / pico boards
- several board fixes
- w1 driver for MX2x / MX5x
2019-01-01 10:01:00 -05:00
Peng Fan
e3963c0943 drivers: ddr: introduce DDR driver for i.MX8M
Introduce DDR driver for i.MX8M. The driver will be used by SPL to
initialze DDR PHY and DDR Controller.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01 14:12:18 +01:00
Jean-Jacques Hiblot
9a1dde58f5 spl: drivers: Link usb common library to SPL if USB gadget is enabled
Some drivers might need to access common USB functions such as
usb_get_maximum_speed() or usb_get_dr_mode().

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-14 17:59:09 +01:00
Sekhar Nori
d50d6817b5 spl: fix build failure with !CONFIG_SPL_PCI_SUPPORT
Building U-Boot with CONFIG_PCI and CONFIG_DM_PCI enabled, but
CONFIG_SPL_PCI_SUPPORT disabled, results in following linker
error:

lib/built-in.o: In function `fdtdec_get_pci_bar32':
lib/fdtdec.c:305: undefined reference to `dm_pci_read_bar32'
fdtdec.c:305:(.text.fdtdec_get_pci_bar32+0x24): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `dm_pci_read_bar32'

This is because reference to dm_pci_read_bar32() remains in lib/fdtdec.c
while SPL build does not descend into drivers/pci directory in
drivers/Makefile if CONFIG_SPL_PCI_SUPPORT is not enabled.

Fix this by applying appropriate #define guards in lib/fdtdec.c.
It looks like ns16550.c has the same problem, so fixed that too.

To simplify this, CONFIG_SPL_PCI_SUPPORT is renamed to CONFIG_SPL_PCI
(enables use of CONFIG_IS_ENABLED() macro).

Suggested-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-12 12:14:23 -05:00
Tom Rini
91ff686562 blk: Rework guard around part_init call
The function part_init() will only be built when we have both
CONFIG_PARTITIONS and CONFIG_HAVE_BLOCK_DEVICE set.  Protect the call to
this function with both of these tests now.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Vanessa Maegima <vanessa.maegima@nxp.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Adam Ford <aford173@gmail.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-12 12:14:22 -05:00
Benjamin Gaignard
7f84fc670b dm: Add Hardware Spinlock class
This is uclass for Hardware Spinlocks.
It implements two mandatory operations: lock and unlock
and one optional relax operation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:32 -05:00
Simon Glass
2d424eb0cd spl: Support hash, input, pch, pci, rtc, tpm in SPL
At present these subsystems are only supported in U-Boot proper but it is
sometimes necessary to support them in SPL, or even TPL. Update the
Kconfig and Makefile to support this. Also adjust GPIO so that it can be
used in TPL if required.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-26 08:25:33 -05:00
Bin Meng
8fb49b4c7a dm: Add a new uclass driver for VirtIO transport devices
This adds a new virtio uclass driver for “virtio” [1] family of
devices that are are found in virtual environments like QEMU,
yet by design they look like physical devices to the guest.

The uclass driver provides child_pre_probe() and child_post_probe()
methods to do some common operations for virtio device drivers like
device and driver supported feature negotiation, etc.

[1] http://docs.oasis-open.org/virtio/virtio/v1.0/virtio-v1.0.pdf

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14 09:16:27 -08:00
Jens Wiklander
9ff4a31175 Add UCLASS_TEE for Trusted Execution Environment
Adds a uclass to interface with a TEE (Trusted Execution Environment).

A TEE driver is a driver that interfaces with a trusted OS running in
some secure environment, for example, TrustZone on ARM cpus, or a
separate secure co-processor etc.

The TEE subsystem can serve a TEE driver for a Global Platform compliant
TEE, but it's not limited to only Global Platform TEEs.

The over all design is based on the TEE subsystem in the Linux kernel,
tailored for U-Boot.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Tom Rini
592cd5defd Merge branch 'master' of git://git.denx.de/u-boot-spi
This is the PR for SPI-NAND changes along with few spi changes.

[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-02 17:01:46 -04:00
Tom Rini
d24c1d0f4d Merge git://git.denx.de/u-boot-dm 2018-09-30 18:16:51 -04:00
Mario Six
5381c2856d drivers: Add board uclass
Since there is no canonical "board device" that can be used in board
files, it is difficult to use DM function for board initialization in
these cases.

Hence, add a uclass that implements a simple "board device", which can
hold devices not suitable anywhere else in the device tree, and is also
able to read encoded information, e.g. hard-wired GPIOs on a GPIO
expander, read-only memory ICs, etc. that carry information about the
hardware.

The devices of this uclass expose methods to read generic data types
(integers, strings, booleans) to encode the information provided by the
hardware.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-29 11:49:35 -06:00
Maxime Ripard
c924ee25aa W1-EEPROM: Add an W1-EEPROM uclass for 1 wire EEPROMs
We might want to access data stored onto one wire EEPROMs.
Create a framework to provide a consistent API.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: reworked patch]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:35 -04:00
Maxime Ripard
d3e19cf919 w1: Add 1-Wire uclass
We might want to use 1-Wire devices connected on boards such as EEPROMs in
U-Boot.

Provide a framework to be able to do that.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: reworked]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:34 -04:00
Miquel Raynal
a430fa06a4 mtd: move NAND files into a raw/ subdirectory
NAND flavors, like serial and parallel, have a lot in common and would
benefit to share code. Let's move raw (parallel) NAND specific code in a
raw/ subdirectory, to ease the addition of a core file in nand/ and the
introduction of a spi/ subdirectory specific to SPI NANDs.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-09-20 20:10:49 +05:30
Lokesh Vutla
08c45314a8 spl: Allow remoteproc drivers to be used within SPL
Add an option for building remoteproc drivers within SPL.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Lokesh Vutla
880274192c spl: Allow mailbox drivers to be used within SPL
Add an option for building mailbox drivers within SPL.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11 08:32:55 -04:00
Mario Six
a63e54ab5f drivers: Add AXI uclass
Add a uclass for AXI (Advanced eXtensible Interface) busses, and a
driver for the gdsys IHS AXI bus on IHS FPGAs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-11 08:07:36 +02:00
Peng Fan
e13278c943 power: Add CONFIG_SPL_POWER_DOMAIN config
Add CONFIG_SPL_POWER_DOMAIN config entry.
Build drivers/power/domain if this config is selected.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-08-06 11:51:10 +02:00
Ramon Fried
7b384eccc7 dm: SMEM (Shared memory) uclass
This is a uclass for Shared memory manager drivers.

A Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-07-19 16:31:37 -04:00
Ley Foon Tan
bfc6bae8fa reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use
CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-09 15:25:43 -04:00
Tom Rini
809e0e398a Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-06-04 08:55:00 -04:00
Alex Kiernan
d2df2abbcd fastboot: Extract fastboot_okay/fail to fb_common.c
Add drivers/fastboot/fb_common.c, where fastboot_okay/fail are implemented
so we can call them from a non-USB implementation.

Introduce fastboot_response which takes varargs parameters so we can
use it to generate formatted response strings. Refactor fastboot_okay/fail
to use it.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
312a10f16b fastboot: Move fastboot to drivers/fastboot
Separate CMD_FASTBOOT from FASTBOOT and move code and configuration to
drivers/fastboot.

Switch dependencies on FASTBOOT to USB_FUNCTION_FASTBOOT as anyone who wants
FASTBOOT before this series wants USB_FUNCTION_FASTBOOT. Split
USB_FUNCTION_FASTBOOT from FASTBOOT so they retain their existing
behaviour.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Jagan Teki
6768594326 phy: Add Allwinner A64 USB PHY driver
USB PHY implementation for Allwinner SOC's can be handling
in to single driver with different phy configs.

This driver handle all Allwinner USB PHY's start from 4I to
50I(except 9I). Currently added A64 compatibility more will
add in next coming patches.

Current implementation is unable to get pinctrl, clock and reset
details from DT since the dm code on these will add it future.

Driver named as phy-sun4i-usb.c since the same PHY logic
work for all Allwinner SOC's start from 4I to A64 except 9I
with different phy configurations.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Lukasz Majewski
afa9609eca bootcount: spl: Enable bootcount support in SPL
New, SPL related config option - CONFIG_SPL_BOOTCOUNT_LIMIT has been
added to allow drivers/bootcount code re-usage in SPL.

This code is necessary to use and setup bootcount in SPL in the case of
falcon boot mode.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-05-10 20:37:05 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Patrick Delaunay
0e373c0ade spl: add SPL_RESET_SUPPORT
Add option to include RESET driver and uclass in SPL.
That can be useful to handle IP reset with same driver
in U-Boot and in SPL.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:20 -04:00