- Timeout counter value is set as DTOCV bits in SYSCTL register
For counter value set as timeout,
Timeout period = (2^(timeout + 13)) SD Clock cycles
- As per 4.6.2.2 section of SD Card specification v2.00, host should
cofigure timeout period value to minimum 0.25 sec.
- Number of SD Clock cycles for 0.25sec should be minimum
(SD Clock/sec * 0.25 sec) SD Clock cycles
= (mmc->tran_speed * 1/4) SD Clock cycles
- Calculating timeout based on
(2^(timeout + 13)) >= mmc->tran_speed * 1/4
Taking log2 both the sides and rounding up to next power of 2
=> timeout + 13 = log2(mmc->tran_speed/4) + 1
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We had an extra '0x' in the output of the LAWAR header that would cause
output like:
LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d
intead of:
LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add waiting for receiving Ethernet gadget state on the Windows host
side before dropping pullup, but keep it for debug.
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Port USB gadget RNDIS protocol support from linux-2.6.26
(.27 gadget stack actually has composite drivers).
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Disconnecting USB gadget with pending interrupt may cause its wrong
handling in the next time when interface will be started again
(especially actual for RNDIS). This interrupt may force the gadget
to queue unexpected response before setup stage.
Despite the fact that such interrupt handled after dropped pullup
also may add pending response, this will not bring to any issues due to
usb_ep_disable (which clears the queue) called on gadget unregistering.
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
This adds support for using USB Ethernet dongles in host mode. This is just
the framework - drivers will come later. A new config option called
CONFIG_USB_HOST_ETHER can be defined in board config files to switch this
on.
The was originally written by NVIDIA and was cleaned up for release by the
Chromium authors.
Signed-off-by: Simon Glass <sjg@chromium.org>
Changed both to use a common timeout for URB submission, since they were using
different values and EHCI's was too short.
Also fixed EHCI to actually check if urb submission succeeded, rather than
silently continuing into the weeds.
Change-Id: I7f71499ffaa05187d8e5618db2419e1606007b82
Signed-off-by: Simon Glass <sjg@chromium.org>
Added this for mmc_spi driver. Though altera spi core does not
support programmable speed. It is fixed when configured in
sopc-builder.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8,
and 12. Program one more than the desired value: 4 -> 5, 8 -> 9, 12 -> 13.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some CPU needs cache handling. So this patch add the config of
CONFIG_SH_ETHER_CACHE_WRITEBACK, and it calls wback function.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Added arch/arm/cpu/arm926ejs/davinci/et1011c.c for handling
ET1011C gigabit phy. which overrides get_link_speed function
from default implementation. This enables output of 125 MHz
reference clock on SYS_CLK pin.
Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Adds "DaVinci-EMAC" as the name of the device so that
it gets printed as "Using DaVinci-EMAC device"
during network access (dhcp, tftp) instead of empty name
in "Using" statement.This name also gets
reflected in 'ethact' env variable.
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Enabling the gigabit was overwriting the
previous configuration by setting up only GIGAFORCE and
GIG bits of MAC control register.
Modified to retain previous configuration while
gigabit enabling.
Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Added support for MMC/SD cards for Davinci. This feature is enabled by
CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC
options. This is tested on DM355 and DM365 EVMs with both the available mmc
controllers.
Signed-off-by: Alagu Sankar <alagusankar@embwise.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Drop warnings due to unused variables.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
This patch cleans driver code replacing all accesses
to registers with fixed offsets with a corresponding
structure.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The MXC SPI driver didn't calculate the SPI clock up to
now and just used highest possible divider 512 for DATA
RATE in the control register. This results in very low
transfer rates.
The patch adds code to calculate and setup the SPI clock
frequency for transfers.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
We need to shift only one time in each cycle in the swapping loop
for unaligned tx case. Currently two byte shift operations are
performed in each loop cycle causing zero gaps in the transmited
data, so not all data scheduled for transmition is actually
transmited.
The proper swapping in unaligned rx case is missing, so add it
as we need to put the received data into the rx buffer in the
correct byte order.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
The patch adds helper funtions for basic access to the registers
of the MC9sdz60 chip (multifunctional device with RTC and CAN) via
I2C interface.
Signed-off-by: Stefano Babic <sbabic@denx.de>
There is sporadic failures when more as one I2C slave
is on the bus and the processor tries to communicate
with more as one slave.
The problem was seen on a mx35pdk (two I2C slaves,
PMIC controller and CAN/RTC chip).
The current driver uses the IIF bit in the status register
to check if the bus is busy or not. According to the manual,
this is not correct, because the IIB bit should be checked.
Not only, to check if a transfer is finished must be checked
the ICF bit, and this is not tested at all.
This patch comes from analyse with a corresponding driver
provided by Freescale as part of the LTIB tool. Comparing
the two drivers, it appears that the current u-boot driver checks
the wrong bits, and depending on race condition, the transfer
can be successful or not.
The patch gets rid also of own debug function (DPRINTF),
replaced with the general debug().
Tested on Freescale mx35pdk.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
This driver accesses to processor's register
via __REG macros, that are removed (or are planned
to be removed) and replaced by C structures.
This patches replaces all occurrencies of __REG macros.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Make at91 header includes in soft_i2c depend only on CONFIG_AT91FAMILY
rather than individual SoCs.
Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Acked-by: Reinhard Meyer<u-boot@emk-elektronik.de>
Faraday's ftpmu010 is a power managemnet unit which support cpu
sleep and frequency scaling. It has been integrated into many SoC.
This patch also move ftpmu010 to a proper place for later enhancement.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced the following
compiler warnings in the uec ethernet driver:
In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0,
from uec.c:32:
/local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined
uec_phy.h:34:0: note: this is the location of the previous definition
/local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined
uec_phy.h:35:0: note: this is the location of the previous definition
In file included from /local/home/galak/git/u-boot-85xx/include/miiphy.h:37:0,
from uec_phy.c:27:
/local/home/galak/git/u-boot-85xx/include/linux/mii.h:133:0: warning: "LPA_1000FULL" redefined
uec_phy.h:34:0: note: this is the location of the previous definition
/local/home/galak/git/u-boot-85xx/include/linux/mii.h:134:0: warning: "LPA_1000HALF" redefined
uec_phy.h:35:0: note: this is the location of the previous definition
Fix them be removing the duplication in the uec code and utlizing the
linux/mii.h version instead.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add new headers that capture common defines for a given SoC/processor
rather than duplicating that information in board config.h and random
other places.
Eventually this should be handled by Kconfig & defconfigs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Add P2040 SoC specific information:
* SERDES Table
* Added p2040 to cpu_type_list and SVR list
* Added number of LAWs for p2040
* Set CONFIG_MAX_CPUS to 4 for p2040
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The P1014 is similar to the P1010 processor with the following differences:
- 16bit DDR with ECC. (P1010 has 32bit DDR w/o ECC)
- no eCAN interface. (P1010 has 2 eCAN interfaces)
- Two SGMII interface (P1010 has 3 SGMII)
- No secure boot
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Key Features include of the P1010:
* e500v2 core frequency operation of 500 to 800 MHz
* Power consumption less than 5.0 W at 800 MHz core speed
* Dual SATA 3 Gbps controllers with integrated PHY
* Dual PCI Express controllers
* Three 10/100/1000 Mbps enhanced triple-speed Ethernet controllers (eTSECs)
* TCP/IP acceleration and classification capabilities
* IEEE 1588 support
* Lossless flow control
* RGMII, SGMII
* DDR3 with support for a 32-bit data interface (40 bits including ECC),
up to 800 MHz data rate 32/16-bit DDR3 memory controller
* Dedicated security engine featuring trusted boot
* TDM interface
* Dual controller area networks (FlexCAN) controller
* SD/MMC card controller supporting booting from Flash cards
* USB 2.0 host and device controller with an on-chip, high-speed PHY
* Integrated Flash controller (IFC)
* Power Management Controller (PMC)
* Four-channel, general-purpose DMA controller
* I2C controller
* Serial peripheral interface (SPI) controller with master and slave support
* System timers including a periodic interrupt timer, real-time clock,
software watchdog timer, and four general-purpose timers
* Dual DUARTs
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Calling eth_bind at usb_eth_init time causes renaming of the network
device from 'usb_ether' to 'usb0'. Fixing this to keep the first name.
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Since the ether may not be the only one usb gadget would be used
in the uboot, it is neccessary to do the register each time the
eth begin to work to make usb gadget driver less confussed when
we want to use two different usb gadget at the same time.
Usb gadget driver could simple ignore the register operation, if
it find the driver has been registered already.
Signed-off-by: Lei Wen <leiwen@marvell.com>
There's no compelling reason to have the output on bootup or the
"flinfo" command print "flash" in uppercase, so use the proper case
where appropriate.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The default value of the SRS, VS18 and VS30 and ADMAS fields in the host
controller capabilities register (HOSTCAPBLT) are incorrect. The default
of these bits should be zero instead of one.
Clear these bits out when we read HOSTCAPBLT.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Do not issue a manual asynchronous CMD12. Instead, use a (software)
synchronous CMD12 or AUTOCMD12 to abort data transfer.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This change does the following:
- Adds printing of negotiated link width. This information can be
useful when debugging PCIe issues.
- Makes it optional for boards to implement board_serdes_name().
Previously boards that did not implement it would print unsightly
output such as "PCIE1: Connected to <NULL>..."
- Rewords the PCIe boot output to reduce line length and to make it
clear that the "base address XYZ" value refers to the base address of
the internal processor PCIe registers and not a standard PCI BAR
value.
- Changes "PCIE" output to the standard "PCIe"
Before change:
PCIE1: connected to <NULL> as Root Complex (base addr ef008000)
01:00.0 - 10b5:8518 - Bridge device
02:01.0 - 10b5:8518 - Bridge device
02:02.0 - 10b5:8518 - Bridge device
02:03.0 - 10b5:8518 - Bridge device
PCIE1: Bus 00 - 05
PCIE2: connected to <NULL> as Endpoint (base addr ef009000)
PCIE2: Bus 06 - 06
After change:
PCIe1: Root Complex of PEX8518 Switch, x4, regs @ 0xef008000
01:00.0 - 10b5:8518 - Bridge device
02:01.0 - 10b5:8518 - Bridge device
02:02.0 - 10b5:8518 - Bridge device
02:03.0 - 10b5:8518 - Bridge device
PCIe1: Bus 00 - 05
PCIe2: Endpoint of VPX Fabric A, x2, regs @ 0xef009000
PCIe2: Bus 06 - 06
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Since all the PCIe controllers are connected over SERDES on the SoCs we
can utilize is_serdes_configured() to determine if a controller is
enabled. After which we can setup the ATMUs and LAWs for the controller
in a common fashion and allow board code to specify what the controller
is connected to for reporting reasons.
We also provide a per controller (rather than all) for some systems that
may have special requirements.
Finally, we refactor the code used by the P1022DS to utilize the new
generic code.
Based on patch by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Previously we passed in a specifically named struct pci_controller to
determine if we had setup the particular PCI bus. Now we can search for
the struct so we dont have to depend on the name or the struct being
statically allocated.
Introduced new find_hose_by_cfg_addr() to get back a pci_controller struct
back by searching for it means we can do things like dynamically allocate
them or not have to expose the static structures to all users.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Some new platform's esdhc pins don't share with other function.
The eSDHC shouldn't be disabled, even if "esdhc" isn't defined
in hwconfig env variable.
Use CONFIG_FSL_ESDHC_PIN_MUX to fix this problem.
Signed-off-by: Chenhui Zhao <b26998@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch sync with David's patch on Linux for handling nand_scan_ident.
commit 5e81e88a4c140586d9212999cea683bcd66a15c6
Author: David Woodhouse <David.Woodhouse@intel.com>
Date: Fri Feb 26 18:32:56 2010 +0000
mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident()
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Lei Wen <leiwen@marvell.com>
This patch add addition suffix to nand write to give the uboot
the power to directly burn the yaffs image to nand.
Signed-off-by: Lei Wen <leiwen@marvell.com>
The eth_device.name field length is limited by NAMESIZE,
which is 16 defined in include/net.h. Unfortunately, two
of the names in lan91c96.c are beyond that.
Signed-off-by: YanJun Yang <yangyj.ee@gmail.com>
This adds support for for the PCA9535/PCA9539 family of gpio devices which
have 16 output pins.
To let the driver know which devices are 16-pin it is necessary to define
CONFIG_SYS_I2C_PCA953X_WIDTH in your board config file. This is used to
create an array of {chip, ngpio} tuples that are used to determine the
width of a particular chip. For backwards compatibility it is assumed that
any chip not defined in CONFIG_SYS_I2C_PCA953X_WIDTH has 8 pins.
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
The include/miiphy.h header duplicates a lot of things from linux/mii.h.
So punt all the things that overlap to keep the API simple and to make
merging between U-Boot and Linux simpler.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The flash_verbose logic is only used by the CFI MTD layer, so if we aren't
using that, disable the logic completely.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The serial of ap325rxa has it of two kinds, and the setting of
the clock is different.
Because there was a problem by function to judge serial kind,
this revised it.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
I copied the setting of CPU from Linux kernel and commonized it.
By this, we can communalize a kernel and information.
And added the serial setting of many CPU's.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
It can be optimised out by the compiler otherwise resulting
in obscure errors like a board not booting.
This has been documented in README since 2006 when these were
first fixed up for GCC 4.x.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Fix some additional places.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-By: Albert ARIBAUD <albert.aribaud@free.fr>
The current code use all the voltage range support by the host
controller to do the validation. This will cause problem when
the host supports Low Voltage Range. Change the validation
voltage to be based on board setup.
Signed-off-by: Li Yang <leoli@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The max clock of MMC is 52MHz
Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
After booting the u-boot, and first using some SD card (such as Sandisk 2G SD
card), because the field 'clock' of struct mmc is zero, this will cause
the read transfer is always active and SDHC DATA line is always active,
therefore, driver can't handle the next command.
Therefore, we use mmc_set_clock to setup both the data structure and HW
to the initial clock speed of 400000Hz.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This is part of the timer cleanup effort.
In the future we only use get_timer() in its intended way to
program timeout loops.
reset_timer() shall not be used anymore.
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Fix clock divider for COM57H5M10XRC display.
The previous setting caused flicker.
Tested on Qong (EVBLite with COM57H5M10XRC).
Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
PT7C4338 chip is being manufactured by Pericom Technology Inc.
It is a serial real-time clock which provides:
1)Low-power clock/calendar.
2)Programmable square-wave output.
It has 56 bytes of nonvolatile RAM.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
While we're here, cut out the useless id defines too.
Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds the possibility to (optinally) write to the
flash configuration register. The Intel style CFI chips support
such a register that can be used to configure the operation
mode to a non-default value.
This method will be used by the t3corp board, which needs to
configure the DS617 Xilinx flash for async read mode.
Signed-off-by: Stefan Roese <sr@denx.de>
The function sector_erased() is modified to not use pointer
access, but to use the correct accessor functions. This fixes a
problem on the t3corp board with the Xilinx DS617 flash chips. Here
a board specific accessor function is needed to read from flash
in 32bit mode. This patch enables such an operation mode.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds some calls to set the flash chip in the read-status-
register- or read-id-mode before the corresponding register is
read back. This problem was detected while porting the common CFI
driver to support the Xilinx DS617 flash chips.
Signed-off-by: Stefan Roese <sr@denx.de>
ARMADA 100 SoCs has NS16550 compatible UART peripheral
This patch enables the same for ARMADA100 platforms
Signed-off-by: Mahavir Jain <mjain@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
On some processors this ier register configuration is different
for ex. Marvell Armada100
This patch introduce CONFIG_SYS_NS16550_IER macro support to
unconditionally initialize this register.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Most of the Marvell SoCs has Multi Function Pin (MFP) configuration registers
For ex. ARMADA100.
These registers are programmed to expose the specific functionality
associated with respective SoC Pins
This driver provides configuration APIs,
using them, configuration need to be done in board specific code
for ex- following code configures MFPs 107 and 108 for UART_TX/RX functionality
int board_early_init_f(void)
{
u32 mfp_cfg[] = {
/* Console on UART1 */
MFP107_UART1_RXD,
MFP108_UART1_TXD,
MFP_EOC /*End of configureation*/
};
/* configure MFP's */
mfp_config(mfp_cfg);
return 0;
}
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
eSDHC host controller reset results in clearing of snoop bit also.
This patch sets the SNOOP bit after the completion of host controller reset.
Without this patch mmc reads are not consistent.
Signed-off-by: P.V.Suresh <pala@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
According to Freescale reference manuals (eg section "13.4.4.2
Programming the UPMs" of the P4080 Reference Manual):
"Since the result of any update to the MxMR/MDR register must be in
effect before the dummy read or write to the UPM region, a write to
MxMR/MDR should be followed immediately by a read of MxMR/MDR."
The UPM on a custom P4080-based board did not work without performing
a read of MxMR/MDR after a write.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The following commit:
commit 46e91674fb
Author: Peter Tyser <ptyser@xes-inc.com>
Date: Tue Nov 3 17:52:07 2009 -0600
tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode
Removed setting Auto-Neg by default, however this is believed to be
proper default configuration for initialization of the TBI interface.
Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the
XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require
Auto-Neg to be disabled to function properly.
This addresses a breakage on the P2020 DS & MPC8572 DS boards when used
with an SGMII riser card. We also remove setting
CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the
default setting is sufficient for them.
Additionally, we clean up the code a bit to remove an unnecessary second
define.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
CC: Ruslan N. Araslanov <byaaka@yandex.ru>
Signed-off-by: Ruslan Araslanov <ruslan.araslanov@vitecmm.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Add battery charging support twl6030 driver.
Add support for battery voltage and current measurements.
Add command to get battery status and start/stop battery charging from USB.
Signed-off-by: Balaji T K <balajitk@ti.com>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The attached patch fixes wrong timing default values and adds the
possibility to specify board specific timing value in the board config file.
Signed-off-by: David Mueller <d.mueller@elsoft.ch>
Since the driver is used not only on Freescale boards,
we move it to a common place for video drivers as
suggested by Wolfgang. The patch also cleans up the
top level Makefile.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Use C structs for registers, and use readl/writel instead of custom
accessors.
Acked-by: Michael Brandt <michael.brandt@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Currently the hardware was left in an undefined state in case Spartan3
serial load failed. This patch adds Xilinx_abort_fn to give the board
a possibility to clean up in this case.
Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
This patch is a port of the work by Sudhakar Rajeshekhara in commit
ab3effbcad8851cc65dc5241a01c064d2030a3b2 of
git://arago-project.org/git/people/sandeep/u-boot-davinci.git.
The da850 UI board has on it an RMII PHY which can be used if the MDC line
to the MII PHY on the baseboard is disabled and the RMII PHY is enabled by
configuring the values of some GPIO pins on the IO expander of the UI board.
This patch implements disabling that line via GPIO2[6], configuring the UI
board's IO expander and setting only the pinmux settings that are needed for
RMII operation.
Tested on da850evm by adding a define for CONFIG_DRIVER_TI_EMAC_USE_RMII.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
commit ec50a8e389
"cfi_flash: handle 'chip size exceeds address window' situation"
added 3rd argument to flash_get_size() but didn't fix all the
function calls from the board specific code. Many boards have
their own flash_get_size() definitions in the board code and
use them there, but some boards (e.g. tqm834x, tqm85xx, pdm360ng)
use flash_get_size() from the cfi_flash.c driver.
The bug shows up if the value of the "max_size" argument (which
is not defined when calling the function with two arguments)
happens to be less than "info->size". In this case on the
affected boards we end up with a bank of reduced size and
in the worst case might even be not able to update U-Boot or
to boot the kernel from flash:
=> fli
Bank # 1: CFI conformant FLASH (32 x 16) Size: 0 kB in 1 Sectors
AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 3 ms, buffer size: 64 bytes
Sector Start Addresses:
F0000000 RO
Bank # 2: CFI conformant FLASH (32 x 16) Size: 128 MB in 512 Sectors
AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 3 ms, buffer size: 64 bytes
Sector Start Addresses:
F8000000 F8040000 F8080000 F80C0000 F8100000
F8140000 F8180000 F81C0000 F8200000 F8240000
...
E.g., updating U-Boot is not possible now:
=> protect off ${u-boot_addr} +${u-boot_size}
Error: end address (0xf007ffff) not in flash!
Bad address format
=> era ${u-boot_addr} +${u-boot_size}
Error: end address (0xf007ffff) not in flash!
Bad address format
This patch removes the 3rd argument of flash_get_size() again
and sets "max_size" in the function itself instead of passing
it as a function argument.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This is needed for the canyonlands_nand build target. Without it
the resulting image won't fit into 4k.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
Get rid of compiler warning:
e1000.c: In function 'e1000_transmit':
e1000.c:5028: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Calling usb_dev_init() from within the EHCI host driver is wrong.
The EHCI host driver should have no dependency/interconnection to the
USB device driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
This patch fixes a problem noticed on lwmon5 (PPC440EPx) using the
common EHCI driver, when "usb reset" is issued multiple times.
Upon the 2nd (and further) "usb reset" command, the command fails
with the following messages:
=> usb reset
(Re)start USB...
USB: Register 1111 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 5 USB Device(s) found
scanning bus for storage devices... 2 Storage Device(s) found
=> usb reset
(Re)start USB...
USB: EHCI fail to reset
Error, couldn't init Lowlevel part
This patch fixes this problem. Now "usb reset" can be called multiple
times.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
This watchdog reset call is needed here, otherwise the lwmon5 board
(PPC440EPx based) will reset upon the "usb reset" command.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Checking the status field of the qTD token in the current code
do not take into acount cases where endpoint stall (halted) bit
is set together with XactErr status bit. As a result clearing
stall on an endpoint won't be done if this status bit was also
set. Check for halted bit and report USB_ST_STALLED status
if the host controller also indicates endpoit stall condition.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The patch is to support getting FEC MAC address from fuse bank.
Signed-off-by: Jason Liu <r64343@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Having a loop with a counter is no timing guarentee for timing
accuracy or compiler optimizations. For e.g. the same loop counter
which runs when the MPU is running at 600MHz will timeout in around
half the time when running at 1GHz. or the example where GCC 4.5
compiles with different optimization compared to GCC 4.4. use timer
to keep track of time elapse and we use an emperical number - 1sec
for a worst case timeout. This should never happen, and is adequate
imaginary condition for us to fail with timeout.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Previously with archive libraries fdt.o was compiled and included in
qe.a and then discarded by the linker. With partial linking this
results in unresolved symbols, which this commit fixes.
This commit also cleans up a now-useless conditional in fdt.c.
Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
Tested-by: Wolfgang Denk <wd@denx.de>
Before this commit, weak symbols were not overridden by non-weak symbols
found in archive libraries when linking with recent versions of
binutils. As stated in the System V ABI, "the link editor does not
extract archive members to resolve undefined weak symbols".
This commit changes all Makefiles to use partial linking (ld -r) instead
of creating library archives, which forces all symbols to participate in
linking, allowing non-weak symbols to override weak symbols as intended.
This approach is also used by Linux, from which the gmake function
cmd_link_o_target (defined in config.mk and used in all Makefiles) is
inspired.
The name of each former library archive is preserved except for
extensions which change from ".a" to ".o". This commit updates
references accordingly where needed, in particular in some linker
scripts.
This commit reveals board configurations that exclude some features but
include source files that depend these disabled features in the build,
resulting in undefined symbols. Known such cases include:
- disabling CMD_NET but not CMD_NFS;
- enabling CONFIG_OF_LIBFDT but not CONFIG_QE.
Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
When CONFIG_PCI_SCAN_SHOW is defined U-Boot prints out PCI devices as
they are found during bootup, eg:
PCIE1: connected as Root Complex
01:00.0 - 10b5:8518 - Bridge device
02:01.0 - 10b5:8518 - Bridge device
03:00.0 - 10b5:8112 - Bridge device
04:01.0 - 8086:1010 - Network controller
04:01.1 - 8086:1010 - Network controller
02:02.0 - 10b5:8518 - Bridge device
02:03.0 - 10b5:8518 - Bridge device
06:00.0 - 10b5:8518 - Bridge device
07:00.0 - 10b5:8518 - Bridge device
08:00.0 - 1957:0040 - Processor
07:01.0 - 10b5:8518 - Bridge device
09:00.0 - 10b5:8112 - Bridge device
07:02.0 - 10b5:8518 - Bridge device
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
0d:00.0 - 1957:0040 - Processor
PCIE2: Bus 0c - 0d
This information is useful, but its difficult to determine the PCI bus
topology. To things clearer, we can use indention to make it more
obvious how the PCI bus is organized. For the example above, the
updated output with this change is:
PCIE1: connected as Root Complex
01:00.0 - 10b5:8518 - Bridge device
02:01.0 - 10b5:8518 - Bridge device
03:00.0 - 10b5:8112 - Bridge device
04:01.0 - 8086:1010 - Network controller
04:01.1 - 8086:1010 - Network controller
02:02.0 - 10b5:8518 - Bridge device
02:03.0 - 10b5:8518 - Bridge device
06:00.0 - 10b5:8518 - Bridge device
07:00.0 - 10b5:8518 - Bridge device
08:00.0 - 1957:0040 - Processor
07:01.0 - 10b5:8518 - Bridge device
09:00.0 - 10b5:8112 - Bridge device
07:02.0 - 10b5:8518 - Bridge device
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
0d:00.0 - 1957:0040 - Processor
PCIE2: Bus 0c - 0d
In the examples above, an MPC8640 is connected to a PEX8518 PCIe switch
(01:00 and 02:0x), which is connected to another PEX8518 PCIe switch
(06:00 and 07:0x), which then connects to a MPC8572 processor (08:00).
Also, the MPC8640's PEX8518 PCIe switch is connected to a PCI ethernet
card (04:01) via a PEX8112 PCIe-to-PCI bridge (03:00).
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This change does the following:
- Removes the printing of the PCI interrupt line value. This is
normally set to 0 by U-Boot on bootup and is rarely used during
everyday operation.
- Prints out the PCI function number of a device. Previously a device
with multiple functions would be printed identically 2 times, which is
generally confusing. For example, on an Intel 2 port gigabit Ethernet
card the following was displayed:
...
04 01 8086 1010 0200 00
04 01 8086 1010 0200 00
...
- Prints a text description of each device's PCI class instead of the
raw PCI class code. The textual description makes it much easier to
determine what devices are installed on a PCI bus.
- Changes the general formatting of the PCI device output.
Previous output:
PCIE1: connected as Root Complex
04 01 8086 1010 0200 00
04 01 8086 1010 0200 00
03 00 10b5 8112 0604 00
02 01 10b5 8518 0604 00
02 02 10b5 8518 0604 00
08 00 1957 0040 0b20 00
07 00 10b5 8518 0604 00
09 00 10b5 8112 0604 00
07 01 10b5 8518 0604 00
07 02 10b5 8518 0604 00
06 00 10b5 8518 0604 00
02 03 10b5 8518 0604 00
01 00 10b5 8518 0604 00
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
0d 00 1957 0040 0b20 00
PCIE2: Bus 0c - 0d
Updated output:
PCIE1: connected as Root Complex
04:01.0 - 8086:1010 - Network controller
04:01.1 - 8086:1010 - Network controller
03:00.0 - 10b5:8112 - Bridge device
02:01.0 - 10b5:8518 - Bridge device
02:02.0 - 10b5:8518 - Bridge device
08:00.0 - 1957:0040 - Processor
07:00.0 - 10b5:8518 - Bridge device
09:00.0 - 10b5:8112 - Bridge device
07:01.0 - 10b5:8518 - Bridge device
07:02.0 - 10b5:8518 - Bridge device
06:00.0 - 10b5:8518 - Bridge device
02:03.0 - 10b5:8518 - Bridge device
01:00.0 - 10b5:8518 - Bridge device
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
0d:00.0 - 1957:0040 - Processor
PCIE2: Bus 0c - 0d
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Previously fsl_pci_init_port() always assumed that a port was a PCIe
port and would incorrectly print messages for a PCI port such as the
following on bootup:
PCI1: 32 bit, 33 MHz, sync, host, arbiter
Scanning PCI bus 00
PCIE1 on bus 00 - 00
This change corrects the output of fsl_pci_init_port():
PCI1: 32 bit, 33 MHz, sync, host, arbiter
Scanning PCI bus 00
PCI1 on bus 00 - 00
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
nic and hw structures are allocated via malloc i.e. return memory
is not zero initialized. Because of this few structure member like
"function pointers" are initialized with garbage values.
It may cause problem. for eg. during eth_initialize, dev->write_hwaddr
is used.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fixed typo.
Signed-off-by: Wolfgang Denk <wd@denx.de>
uli526x driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
tsi108_eth driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
pcnet driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
ns8382x driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
natsemi driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
This prevents access to the member of eth_device which is not initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
eepro100 driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
dc2114x driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
rtl8139 driver does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
rtl8169 does not have write_hwaddr function.
However, eth stuff executes write_hwaddr function
because eth_device structure has not been initialized.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Supports most types that support Read-Id and the FM25H20.
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds multi-block read support for the generic MMC
driver. Large reads are broken into chunks of 65535 blocks to
ensure that the code works with controllers having a 16 bit block counter.
This patch results in a significant performance improvement.
Time to read a 45 MB file went from 36 seconds to 9 seconds on Overo
Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The current mmc write implementation is type ulong, but returns int values.
Some of the printf's are terminated with /n/r, one has none.
This patch fixes these issues and also removes some unnecessary local
variables.
Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
By now, the majority of architectures have working relocation
support, so the few remaining architectures have become exceptions.
To make this more obvious, we make working relocation now the default
case, and flag the remaining cases with CONFIG_NEEDS_MANUAL_RELOC.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
This patch adds generic support for the Samsung s3c2440 processor.
Global s3c24x0 changes to struct members converting from upper case to
lower case.
Signed-off-by: Craig Nauman <cnauman@diagraph.com>
Cc: kevin.morfitt@fearnside-systems.co.uk
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Constraint the mmc framework to only send no more than 65535
blocks in one go during the multi-write command. This constraint
comes due to the limitation of 16bit width block counter register
at some hardware.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
On OMAP36/37XX the standard on chip pullups are not sufficient to
ensure proper i2c operation without external pullups or switching
to high speed mode and enabling special on chip pullups.
This is an issue for Beagle xM, which does not have external pullups
on the expansion board i2c lines.
The issue manifests itself as an AL (arbitration lost) error when
probing for a non-existent device (i.e. on a Beagle xM with no expansion
boards attached). This issue does not occur on expansion boards that
include pullups or on Overo 37XX COM's since they include pull-ups.
This patch fixes the issue by checking for the AL bit in the i2c_probe
function.
Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
On some boards we have flash mapped high in the address space with
considerably small window (say 0xFE000000 and 32MB). When we install
bigger chip (say 64MB) on such a board strange things happen
(flash_write() doesn't work at all, for ex). That's because cfi_flash
driver doesn't care about window size at all.
Of course, cleanest solution would probably be to just extend address
window to be able to map the whole flash but for legacy/compatibility
reasons some people prefer just truncate the flash size and never use
the upper part.
This patch adds an option for cfi_flash driver to handle this situation
properly. To achieve this we add the new function cfi_flash_bank_size()
which can be provided by the board code and weak-aliased to default
implementation that returns value from the CONFIG_SYS_FLASH_BANKS_SIZES
array if it's defined or 0 otherwise (the last case is added for
compatibility).
If non-zero flash bank size is provided and detected chip size is bigger
than provided address window size the warning will be displayed and
flash chip will be truncated.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Changed cfi_flash_bank_size() return type to unsigned long
to match caller function.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch solves a problem with USB hanging under higher load on a
i.MX31 board. It falls into class of typical USB problems and fixes:
if you don't understand the real cause, add a delay somewhere.
The problem appeared after introduction of ELF relocation, which
results in smaller code, which appears to run faster (probably because
it fits better in the cache); turning off the instruction cache,
adding debug printf()s and increasing the delay have all been found to
make the problem go away.
Moving the original "udelay(1)" up in the code to it's new place made
the problem appear much less frequently. Increasing the delay to 2
microseconds then made the code run reliably in all (hour-long) tests.
To be on the safe side, we set it to 5 microseconds here.
Signed-off-by: Heiko schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
Commit 3ed1607 "USB: sync Queue Element Transfer Descriptor against
EHCI spec" added an "__attribute__ ((aligned (32)))" to the
declaration of struct qTD, as used for example in the Linux kernel as
well.
However, it turns out that this attribute causes errors in "usb start"
(like "ERROR: NOT USB_CONFIG_DESC 7b" and similar). Drop the attribute
again.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Dan Lykowski <lykowdk@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
It is useful to know the EHCI-PCI hccr, hcor and hc_lenght to make sure it was
successfully registered, and at the correct location.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add a new 'pci enum' command which re-enumerates the PCI buses. This
command is enabled via the CONFIG_CMD_PCI_ENUM define and can be useful
in boards with FPGAs connected via PCI/PCIe, boards that support PCI
hot-plugging, or during PCI debug.
Also enable the 'pci enum' command for X-ES's Freescale-based boards.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Add framebuffer driver for the MX51 processor
working on the IPUv3 internal graphic processor.
The port is based on the driver found in the kernel
delivered by Freescale as part of i.MX BSP:
[kernel 2.6.31 commit cc4fe714041805997b601fe8e5dd585d8a99297f]
[agust@denx.de: some style fixes and dead code removal]
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The patch is a porting of the IPU Linux driver
developed by Freescale to have framebuffer
functionalities in u-boot. The port is based on
kernel 2.6.31 commit cc4fe714041805997b601fe8e5dd585d8a99297f,
as delivered by Freescale [i.MX BSP].
Most features are dropped from the original driver and
only LCD support is the goal of this porting.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Add missing codes according to original datasheet.
This patch also makes ftrtc010 could be adapted to PCLK and EXT_CLK.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
This patch removes the "magic number" delays and instead
monitors state changes in the status register bits.
Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Heiko Schocher <hs@denx.de>
This patch removes the "magic number" delays and instead
monitors state changes in the status register bits.
Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Heiko Schocher <hs@denx.de>
This patch removes the "magic number" delays and instead
monitors state changes in the status register bits.
Signed-off-by: Steve Sakoman <steve.sakomanlinaro.org>
Tested-by: Heiko Schocher <hs@denx.de>
This patch matches the poll interval (1 millisecond) and timeout (1 second)
used in the linux driver. It also adds a return value of 0 in the event of
a timeout error and cleans up some formatting errors in that section of the
code.
Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Heiko Schocher <hs@denx.de>
Have a common enum for phy types that we use in the UCC driver. We will
also use this enum for dealing with phy connection fixup in the device
tree.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Appendix B "EHCI 64-Bit Data Structures" of the "Enhanced Host
Controller Interface Specification for Universal Serial Bus" (Rev.
1.0, March 12, 2002) defines additional fields which were missing in
U-Boot's struct qTD; as these are also present in recent versions of
struct ehci_qtd in the Linux kernel, we add them here, too.
This fixes some nasty memory corruption problems.
Reported-by: Dan Lykowski <lykowdk@gmail.com>
See http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/76942
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Dan Lykowski <lykowdk@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Call fec_set_hwaddr in init routine to setup MAC address so when ethaddr is set
late via setenv the change will propagate to the hw.
Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Ben Warren <biggerbadderben@gmail.com>
This patch is for s5pc210 support.
Due to the resigter of baudrate is changed from slot to value,
add both of them to uart structure.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
This Patch do support 8-bit bus width for s5p
So we add parameter for bus_width (in s5p_mmc_init(), s5p_mmc_initialize())
If want to use 8-bit bus width, only change (0, 8) instead of (0, 4).
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Commit 3b8ac464 "FPGA: add support for downloading Lattice bitstream"
added support for Lattice devices, but failed to add #ifdef's that are
needed when building for non-Lattice devices, which results in build
failures like these:
Configuring for GEN860T board...
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dev_info':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:145: undefined reference to `lattice_info'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dump':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:269: undefined reference to `lattice_dump'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_load':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:233: undefined reference to `lattice_load'
make: *** [u-boot] Error 1
Add the missing code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Sometimes a usb tree is not popolated after a system reset.
It seems a delay is required after setting the USB ports
for the MX.31 before resetting the ehci controller.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The ECC calculations were started by writing 1 << 13 to the nand FCR register;
that value is also defined as DAVINCI_NANDFCR_4BIT_CALC_START in emif_defs.h.
This patch substitutes the macro DAVINCI_NANDFCR_4BIT_CALC_START for the
magic number '1 << 13'.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
OMAP boards currently use a legacy mmc driver. This patch adds a new
mmc driver which will work with the generic mmc driver in u-boot.
This new driver will work with both OMAP3 and OMAP4 boards.
This patch does not remove the old driver. It should remain in the
tree until all boards that use it switch to the new driver.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
The current mmc driver returns erroneous capacity information for
eMMC. The capacity of eMMC devices is available only in the ext-CSD
register. This patch add code to read the ext-CDSD register and
correctly calculate eMMC capacity.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
Call watchdog_reset() upon newline. This is done here in putc
since the environment code uses a single puts() to print the complete
envrironment upon "printenv". So we can't put this watchdog call
in puts().
This is needed for boards with a very short watchdog timeout, like the
lwmon5 with a 100ms timeout. Without this patch this board resets in the
commands with long outputs, like "printenv" or "fdt print".
Note that the image size is not increased with this patch when
CONFIG_HW_WATCHDOG or CONFIG_WATCHDOG are not defined since the compiler
optimizes this additional code away.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix typo in comment.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The patch adds support to load a Lattice's bitstream
image (called VME file) into a Lattice FPGA. The code
containing the state machine delivered as part of
Lattice's ispVMtools is integrated.
The FPGA is programmed using the JTAG interface. The
board maintainer must provide accessors to drive the
JTAG signals TCK, TMS, TDI and to get the value of the
input signal TDO.
Signed-off-by: Stefano Babic <sbabic@denx.de>
This is a change similar to what is already in the Linux driver. We
should only program the CLRDATATOG bit when the current mode indicates
that it is needed.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
After gadget reinitializaton (after tftp has been done once)
packet_received may become equal to 1 due to nuking OUT_EP
while disabling it in eth_reset_config.
rx_submit called from usb_eth_init queues rx_req first time.
But the first call of usb_eth_recv from NetLoop queues rx_req
again due to packet_received = 1.
The following flow shows the path of functions calls when
this happens:
net/net.c:NetLoop
|
+-net/eth.c:eth_init
| ether.c:usb_eth_init
| |
| +-udc_driver:usb_gadget_handle_interrupts
| | udc_driver:...
| | ether.c:eth_setup
| | ether.c:eth_set_config
| | ether.c:eth_reset_config
| | udc_driver:usb_ep_disable
| | udc_driver:nuke
| | ether.c:rx_complete
| | ether.c: packet_received = 1;
| |
| +-ether.c:rx_submit
| udc_driver:usb_ep_queue --- The first time when rx_req is queued
|
+-net/eth.c:eth_rx
ether.c:usb_eth_recv
|
+-udc_driver:usb_gadget_handle_interrupts
| udc_driver:... --- no interrupts, returning
+-ether.c: if (packet_received) { ...
ether.c:rx_submit
udc_driver:usb_ep_queue --- The second time!
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Remove and fix needless and destructive operations with tx/rx_req.
1) 'req' in rx_complete is always not NULL and always equals to rx_req
2) Free allocated tx_req if rx_req allocation has failed
3) Do not zero out tx/rx_req in usb_eth_init, leave this for
eth_reset_config which will be called at the next use of usb0
4) Additional check in usb_eth_recv is not required
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
This fixes TIMEOUT with my Kingston 32GB USB3.0 flashdrive, which I experienced
on my PXA270 (USB 1.1) Vpac270 board.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
The pl01x serial driver was lacking the code to switch baudrates from the
command line. Fixed by simply saving the new baudrate and calling
serial_init() again. Also fixed CamelCase variables, I/O accessors and
comment style.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
mvsata_ide_initialize_port(): adjust init sequence (SStatus
should be checked only after all writes to SControl) and
return success/failure to ide_preinit().
Also, as some tests showed init durations in the hundreds
of us, raise the time-out to 01 ms to be on the safe side.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
This allows for arbitrarily long manufacturer ids following the JEDEC
standard of 0x7f continuation bytes. It also makes adding new entries
easier as it's just one element in an array. The downside is that it
increases code size a bit, but we're talking ~50 bytes.
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Split the display command into generic interface and hardware-specific
realization for PDSP188x LED display found on hmi1001 and manroland
boards. Simple interface for LED displays is defined in
include/led-display.h and described in doc/README.LED_display.
Driver-specific implementation was moved into drivers/misc/pdsp188x.c
file (enabled with CONFIG_PDSP188x set).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
When a CFI flash chip could not be detected an error message similar to
the following would be printed on bootup:
FLASH: ## Unknown FLASH on Bank 1 - Size = 0x01000000 = 0 MB
The printf incorrectly converted the flash size into megabytes. This
patch fixes the printing of the flash size in megabytes:
FLASH: ## Unknown FLASH on Bank 1 - Size = 0x01000000 = 16 MB
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add smc_write_hwaddr() to set mac address.
Clear dev before use.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch proposes to migrate the davinci_emac driver to using the
eth_device->write_hwaddr function pointer as suggested by Ben Warren.
All the davinci boards had the behaviour, prior to this patch, of
sync'ing the environment variable enetaddr with the MAC address read
from non-volatile storage on boot -- when the two locations disagreed,
the environment variable value took precendence. This patch keeps the
same behaviour but lets eth_initialize take care of it.
This patch refactors davinci_emac setup in the boards so that the MAC
address is read from non-volatile storage into the environment variable
and then the environment variable value is use in eth_intialize. The
only exception is the direct call to davinci_eth_set_mac_addr made by
the da830evm board init which was changed into an assignment of the
enetaddr field.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Tested-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Emaclite was using old net api that's why
this patch move emaclite to NET_MULTI api.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some boards need their board-specific PHY quirks to be called
to PHY to work normally. As mpc5xxx_fec driver uses on demand
PHY initialization and can even reinit PHY during normal operation
we can't count on reset_phy() call from arch/<arch>/lib/board.c
(it is most likely called _before_ we init the PHY from the
driver) so we need to add call to reset_phy() directly in the
driver.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some return values pretended correct pass. This patch changes them according
to README.drivers.net. This patch changes e.g. command 'dhcp' to stop after
errorneous autonegotiation.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch increases timeout for autonegotiation from 1 second to 3 seconds.
Some boards (e.g. at91rm9200ek) did not negotiate within 1 second.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
V3: further refinements:
- use priv member instead of container method
- allow setting of MAC address by write_hwaddr method
- avoid shutting down link between commands
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Instead of always performing an autoneg, check if the PHY
already has a link and if it matches one of the requested
modes. Initially only 100MbFD is optimized this way.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This udelay looks bogus and doesn't help my board.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
uec_init() adds an udelay(100000) even though
the PHY status read went well, don't do that.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch is required before the upcoming new enc28j60 driver
using SPI framework patch can be applied:
- Move legacy enc28j60.c to enc28j60_lpc2292.c.
- Change Makefile and the two affected boards' definition files.
Tested with ./MAKEALL ARM7 that both boards still compile.
Signed-off-by: Reinhard Meyer<info@emk-elektronik.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch adds the Numonyx manufacturer code (0x20) to
onenand manufacturers.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
Consolidate some code in mtd_get_len_incl_bad(), and fix a condition
where a valid partition could be reported as truncated if it has a
good block at the end of the device (unlikely, since the BBT is usually
there).
Fix mid-block declarations in net_part_size().
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Ben Gardiner <bengardiner@nanometrics.ca>
The logic to 'spread' mtd partitions needs to calculate the length in
the mtd device, including bad blocks.
This patch introduces a new function, mtd_get_len_incl_bad that can
return both the length including bad blocks and whether that length
was truncated on the device. This new function will be used by the
mtdparts spread command later in this series. The definition of the
function is #ifdef'd out in configurations that do not use the new
'mtdparts spread' command.
Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca>
CC: Scott Wood <scottwood@freescale.com>
Get rid of the several "#if 0" sections that were keeping around Linux
code that isn't relevant to U-Boot. Besides cluttering the code, these
sections make tracking upstream changes harder, rather than easier.
It's easy to discard obviously irrelevant diff hunks that patch rejects,
but it's not as easy to notice hunks that apply cleanly to the #if 0
section, but *are* relevant to U-Boot and require modification elsewhere.
Also remove suspend/resume, as this is not applicable to U-Boot. Removal
saves 232 bytes on powerpc.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
A while back, in http://lists.denx.de/pipermail/u-boot/2009-June/054428.html,
Michele De Candia posted a patch to not count bad blocks toward the
requested size to be erased. This is desireable when you're passing in
something like $filesize, but not when you're trying to erase a partition.
Thus, a .spread subcommand (named for consistency with
http://lists.denx.de/pipermail/u-boot/2010-August/075163.html) is introduced
to make explicit the user's desire to erase for a given amount of data,
rather than to erase a specific region of the chip.
While passing $filesize to "nand erase" is useful, accidentally passing
something like $fliesize currently produces quite unpleasant results, as the
variable evaluates to nothing and U-Boot assumes that you want to erase
the entire rest of the chip/partition. To improve the safety of the
erase command, require the user to make explicit their intentions by
using a .part or .chip subcommand. This is an incompatible user interface
change, but keeping compatibility would eliminate the safety gain, and IMHO
it's worth it.
While touching nand_erase_opts(), make it accept 64-bit offsets and sizes,
fix the percentage display when erase length is rounded up, eliminate
an inconsistent warning about rounding up the erase length which only
happened when the length was less than one block (rounding up for $filesize
is normal operation), and add a diagnostic if there's an attempt to erase
beginning at a non-block boundary.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
The underlying code in nand_base.c already supports non-page-aligned reads
and writes, but the block-skipping wrapper code did not.
With block skipping, an unaligned start address is not useful since you
really want to be starting at the beginning of a partition -- or at least
that's where you want to start checking for blocks to skip, but we don't
(yet) support that. So we still require the start address to be aligned.
An unaligned length, though, is useful for passing $filesize to the
read/write command, and handling it does not complicate block skipping.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
This patch introduces an extra mask-field in spansion_spi_flash_params
to support flash chips with 1-byte extended ID (like the S25FL032P).
Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The spansion_erase currently only works when the sector size is 64KB.
cmd[1] should contain the higher 8 bit of the 24 bit address of the
sector to be erased. Currently it is holding the sector index to be
erased which happens to be the same thing when the sector size is
64KB.
Signed-off-by: Marc-Andre Hebert <marc-andre.hebert@humanware.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Fix bug where signed data was processed as unsigned. The bug previously
resulted in negative temperature readings wrapping around, eg -10 became
245.
Signed-off-by: Jeff Dischler <jdischler@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Poll the ds1621 NV Memory Busy bit instead of waiting a static amount of
time for register writes.
Also add config retister bit defines.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Adds support for Winbond's W25Q64 SPI flash. These devices are used on
(among others) Xilinx' SP601 and SP605 Spartan-6 evaluation boards.
Tested with "sf" commands.
Signed-off-by: Graeme Smecher <graeme.smecher@mail.mcgill.ca>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch replaces the unnecessary waiting in at91emac_read() and
at91emac_write() by checking the IDLE flag.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch also removes conditional nameing of at91_emac driver whether it's
connection to PHY is RMII or MII.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Simplify the command setup and status checking steps, and add a proper
timeout to the status polling code to avoid possible infinite hangs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This moves the last piece from the old spi_flash driver to the new SPI
framework -- optional DMA RX support. This typically cuts speeds by ~40%
at the cost of additional ~300 bytes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The actual SPI driver for i.MX31 and i.MX51 controller
use a wrong byte ordering, because it is supposed
to work only with Freescale's devices, as the Power
Controllers (PMIC). The driver is not suitable for
general purposes, because the buffers passed to spi_xfer
must be 32-bit aligned, as it is used mainly to send
integer to PMIC devices.
The patch drops any kind of limitation and makes the
driver useful with devices controlled sending commands
composed by single bytes (or by a odd number of bytes), such as
spi flash, sensor, etc.
Because the byte ordering is changed,
any current driver using this controller must be adapted, too.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The handling of the SPI_CPOL bit inside the SPI
driver was wrong. As reported by the manual,
the meaning of the SSPOL inside the
configuration register is the same as reported
by SPI specification (0 if low in idle, 1 is high
on idle). The driver inverts this logic.
Because this patch sets the logic as specified, it is required
to clear the CPOL bit in the configuration file to adapt
to the correct logic.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: David Jander <david.jander@protonic.nl>
The patch adds support for setting gpios to the
MX51 processor and change name to the corresponding
functions for MX31. In this way, it is possible to get rid
of nasty #ifdef switches related to the processor type.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Commit 2ee951ba (UBI: Enable re-initializing of the "ubi part" command)
reset mtd_devs in ubi_exit() but missed ubi_init()'s failure path.
Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
CONFIG_UART1_CONSOLE was a PPC4xx specific implementation and is now
removed since the move from the 4xx UART driver to the common NS16550
UART driver. Let's remove all references to this define now.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch starts a bit PPC4xx header cleanup. First patch mostly
touches PPC440 files. A later patch will touch the PPC405 files as well.
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.
Signed-off-by: Stefan Roese <sr@denx.de>
Linux uses an offset of 8 to switch from hardware cs to a gpio cs,
so have u-boot use the same value. Also make sure it is public
for boards to access.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Add support for 4bpp bitmaps, currently only for GDF_32BIT_X888RGB
frame buffer format.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Fixes most of checkpatch warnings and errors in USB gadget stack.
The most frequently encountered problems are:
1) "(foo*)", "foo * bar", "foo* bar"
2) C99 // comments
3) No spaces before/after/around '?', ':', '=', '==', ',', '&', '('
4) Spaces before '['
5) Spaces between function names and '('
6) Block braces in wrong places
7) Spaces before tabs
8) Macros with complex values not enclosed in parenthesis
9) Multiline comments start just after /*
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
The patch removes an endless loop in the usb_eth_send
if the tx_complete is not called before going
in the loop. The driver interrupt routine is called
allowing the driver to check if the TX is completed.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The buffer for the status request must be word aligned
because it is accessed with 32 bit pointer in the
eth_status_complete function.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The patch is based on commit bb9496c6f7e853e5d4edd5397c9d45f1968d623c
(done by Julia Lawall <julia@diku.dk>) from linux-2.6.git.
Since num is unsigned, it would seem better to use simple_strtoul that
simple_strtol.
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Fix potential oops on rare error path.
The patch is based on commit e7b13ec9235b9fded90f826ceeb8c34548631351
(done by David Brownell <david-b@pacbell.net>) from linux-2.6.git.
Description of the issue taken from linux kernel bugzilla:
(https://bugzilla.kernel.org/show_bug.cgi?id=9594)
The potential error can be tracked down as follows:
(1) line 807: let the second conjunct on the "if" statment be false
meaning "dev->status_ep" is null. This means the "if" evaluates
to false.
follow thru the code until...
(2) line 808: usb_ep_disable(dev->status_ep) passes in a null argument,
however "usb_ep_disable" cannot handle that:
(from include/linux/usb/gadget.h)
191 static inline int
192 usb_ep_disable (struct usb_ep *ep)
193 {
194 return ep->ops->disable (ep);
195 }
--
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Fix possible oops on stat_req->buf initialization and fix ep0 and
status_ep confusion (last one is just intended for stat_req keeping).
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Fix in_ep and out_ep confusion (rx_req was allocated from out_ep, not
from in_ep) and add lost dev->req freeing.
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Add lost 'qmult' definition for High Speed devices and make it
configurable through CONFIG_USB_ETH_QMULT.
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Prohibit simultaneous usage of both old and new gadget stacks and
allow UDC drivers to be dependent on CONFIG_USB_ETHER.
Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
The MUSB_TXCSR_MODE register setting isn't supported on Blackfin musb
parts, so stub it out to 0. This matches Linux behavior.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that the defines are moved to header files we don't need this
conditional compilation any more. Remove it.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By
moving these optional variables and defines into the common code, board
specific code is minimized. Currently only the following board use
this feature:
APC405, IDS8247, TQM834x
And IDS8247 doesn't seem to really need this feature, since its not
updating the bank number variable at all. So this patch removes the
definition of CONFIG_SYS_MAX_FLASH_BANKS_DETECT from this board port.
This new framework will be used by the upcoming lwmon5 update as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
cfi_flash_bank_addr(int bank_nr) returns the base addresses of the
requested bank. Introducing this weak default enables boards to override
this functions with a board specific version when required.
This feature will be used in the lwmon5 board update, supporting runtime
detection of 2 board revisions with different flash layouts.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes an unecessary check in the return statement. This is
not needed, since "info" is initializes to NULL. And "info" will not be
written to again, if the flash address is not found.
Additionally "info" is not initialized to "0" but to "NULL".
Signed-off-by: Stefan Roese <sr@denx.de>
Recent changes caused that the HMI10 board now is included in the
boards built by MAKEALL, which revealed that compilation for this
board has been broken for a long time:
ps2ser.c: In function 'ps2ser_init':
ps2ser.c:155: error: 'UART_LCR' undeclared (first use in this function)
ps2ser.c:155: error: (Each undeclared identifier is reported only once
ps2ser.c:155: error: for each function it appears in.)
ps2ser.c:156: error: 'UART_DLL' undeclared (first use in this function)
ps2ser.c:157: error: 'UART_DLM' undeclared (first use in this function)
ps2ser.c:159: error: 'UART_IER' undeclared (first use in this function)
ps2ser.c:160: error: 'UART_MCR' undeclared (first use in this function)
ps2ser.c:161: error: 'UART_FCR' undeclared (first use in this function)
ps2ser.c:162: error: 'UART_FCR_ENABLE_FIFO' undeclared (first use in this function)
ps2ser.c:166: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_putc':
ps2ser.c:198: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c:200: error: 'UART_TX' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_getc_hw':
ps2ser.c:224: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c:225: error: 'UART_RX' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_interrupt':
ps2ser.c:293: error: 'UART_IIR' undeclared (first use in this function)
The board is orphaned, and AFAICT has reached EOL.
Drop support for it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit d2bf29e3 caused a number of compiler warnings:
mmc.c: In function 'mmc_bwrite':
mmc.c:97: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'long unsigned int'
mmc.c:97: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'lbaint_t'
mmc.c: In function 'mmc_bread':
mmc.c:229: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'long unsigned int'
mmc.c:229: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'lbaint_t'
Fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Lei Wen <leiwen@marvell.com>
The CURSOR_ON, CURSOR_OFF, and CURSOR_SET macros are defined incorrectly. If
cursor support is disabled, then these macros are defined to nothing, but
then they are used like this:
if (console_col < CONSOLE_COLS)
CURSOR_OFF
console_row++;
which was compiled like this:
if (console_col < CONSOLE_COLS)
console_row++;
This is obviously not what was intended.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Due to a register glitch (result code <4 might show up right after the
start-calculation-bit was set), make sure the ECC has really started.
See 1c3275b656045aff9a75bb2c9f3251af1043ebb3 in the kernel.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
The Blackfin implementation of musb has a TXCOUNT register that needs to
be programmed when transmitting data.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This printk was added recently and results in ugly output on systems
with no NAND:
NAND: nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00, Chip ID: 0x00 0 MiB
instead of:
NAND: 0 MiB
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds a function to allow one to easily set the target
voltage for the TWL4030 regulators. It also modifies the existing
code to use this new function. Applicable definitions are moved
out of the driver file and into the header file so that they are
generally accessible
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This rewrite of the mvtwsi driver is 25% smaller and much
faster and simpler than the previous code.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar<prafulla@marvell.com>
Acked-by: Heiko Schocher<hs@denx.de>
This driver is not kirkwood-specific and can also be used
e.g. by orion5x. Rename to a SoC-neutral name.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar<prafulla@marvell.com>
Acked-by: Heiko Schocher<hs@denx.de>
Because of peripheral devices can select clock sources,
separate the peripheral clocks. (pwm, uart and so on)
It just return the pclk at s5pc1xx SoC,
but s5pc210 SoC must be calculated by own clock register setting.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Make the header guard to be generic to stop conflicting with
omap2 i2c header file arch/arm/include/asm/arch-omap24xx/i2c.h
Cc: Steve Sakoman <steve@sakoman.com>
Cc: Heiko <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Wolfang Denk <wd@denx.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
I have "ported" U-boot to a in house made board with Numonyx Axcell P33/P30
256-Mbit 65nm flash chips.
After some time :( searching for bugs in our board or soft, we have
discovered that those chips have a small but annoying bug, documented in
"Numonyx Axcell P33/P30 256-Mbit Specification Update"
It states :
When customer uses [...] block unlock, the block lock status might be
altered inadvertently. Lock status might be set to either 01h or 03h
unexpectedly (00h as expected data), which leads to program/erase failure
on certain blocks.
A working workaround is given, which I have applied and tested with success :
Workaround: If the interval between 60h and its subsequent command
can be guaranteed within 20us, Option I is recommended,
otherwise Option II (involves hardware) should be selected.
Option I: The table below lists the detail command sequences:
Command
Data bus Address bus Remarks
Sequence
1 90h Block Address
Read Lock Status
2 Read Block Address + 02h
(2)(3) (1)
3 60h Block Address
(2)(3) (1) Lock/Unlock/RCR Configuration
4 D0h/01h/03h Block Address
Notes:
(1) Block Address refers to RCR configuration data only when the 60h
command sequence is used to set RCR register combined with 03h
subsequent command.
(2) For the third and fourth command sequences, the Block Address must
be the same.
(3) The interval between 60h command and its subsequent D0h/01h/2Fh/03h
commands should be less than 20us.
And here is a log comparison of a simple (destructive) flash test without
and with the workaround.
diff without-numonyx-workaround.log with-numonyx-workaround.log
-U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:07:47)
+U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:25:19)
CPU: Freescale MCF5484
CPU CLK 200 MHz BUS CLK 100 MHz
Board: Macq Electronique ME2060
I2C: ready
DRAM: 64 MiB
FLASH: 32 MiB
In: serial
Out: serial
Err: serial
Net: FEC0, FEC1
-> flinfo
Bank # 1: CFI conformant FLASH (16 x 16) Size: 32 MB in 259 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8922
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 5 ms, buffer size: 1024 bytes
Sector Start Addresses:
FE000000 RO FE008000 RO FE010000 RO FE018000 RO FE020000 RO
FE040000 RO FE060000 RO FE080000 RO FE0A0000 RO FE0C0000 RO
...
FFF80000 RO FFFA0000 RO FFFC0000 RO FFFE0000 RO
-> protect off all
Un-Protect Flash Bank # 1
................... done
-> erase all
Erase Flash Bank # 1
................... done
-> cp.b 1000000 fe000000 2000000
-Copy to Flash... Flash not Erased
+Copy to Flash... done
->
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch does the following:
- Extract code to detect if sector is erased into function
sector_erased().
- Because of this, we don't have variable declarations inside the
sector loop in flash_print_info()
- Change "return" to "break" in the "if (ctrlc()) statement:
This fixes a problem with the resulting output. Before this
patch the output was:
Sector Start Addresses:
FC000000 FC020000 FC040000 =>
With this patch it is now:
Sector Start Addresses:
FC000000 FC020000 FC040000
=>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
Fix reading and printing of CFI flashes 16-bit devices identifiers
Nowadays CFI flashes have a 16-bit device identifier. U-boot still
print them and read them as if they were only 8-bit wide. Fix that.
Before:
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1B
After:
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x881B
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is intended to prepare the other S5P SoC. (s5pc210)
If use SoC specific defines then can't share with other SoC.
So, make the accessor functions for access the base address by common way.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
The OMAP3 block read function is not following API and always returning
1 instead of read block count, fix it. Also to simplify code, merge it
with with a helper function, which was only called from the block read
function.
After this patch ext2 filesystem can be used properly.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Make driver local variables and functions static and
remove them from the arch header.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
AM35x supports only 32bit read operations so we need to have
workaround for 8bit and 16bit read operations.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
This patch adds support for the display controller in
the MB86R0x SoCs.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
Commit 6e37b1a3a25004d3df5867de49fff6b3fc9c4f04 modifies several net calls
to take a (const char *) parameter instead of (char *), but in some cases
the modified functions call other functions taking (char *). The end result
is warnings about discarding the const qualifier.
This patch fixes these other function signatures.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The driver name does not need to be writable, so constify it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
continuation of commit 2ecc2262d66a286e3aac79005bcb5f461312dea8
"net ppc: fix ethernet device names with spaces" (currently in
u-boot-net.git) for QE based parts.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
since commit 1384f3bb8a ethernet names
with spaces drop a
Warning: eth device name has a space!
message. This patch fix it for:
- "FEC ETHERNET" devices found on
mpc512x, mpc5xxx, mpc8xx and mpc8220 boards.
renamed to "FEC".
- "SCC ETHERNET" devices found on
mpc8xx, mpc82xx based boards. Renamed to "SCC".
- "HDLC ETHERNET" devices found on mpc8xx boards
Renamed to "HDLC"
- "FCC ETHERNET" devices found on mpc8260 and mpc85xx based
boards. Renamed to "FCC"
Tested on the kup4k board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
After discussion on the ML it is suggested to drop unrequired
and not useful characters from the device name.
This patch changes the name for the fec_mxc driver from
"FEC_MXC" to "FEC".
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This driver only provides initialization code; actual driving
is done by cmd_ide.c using the ATA compatibility mode of the
Marvell SATAHC controller.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Some commands (like 'mii') use this name to select devices, but they
break when those names contain spaces. So drop the space from
Ethernet driver names (cf. commit 1384f3bb).
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
This patch add the basic infrastructure for the TWL6030 driver and enables
support in the two existing OMAP4 boards, Panda and OMAP4430 SDP
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch modifies the init routine to follow the TRM
recommendations. It also modifies the i2c_read_byte function
to reflect subtle differences between the i2c controller in
OMAP3 and OMAP4.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Acked-by: Nishanth Menon <menon.nishanth@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
While running from flash, i. e. before relocation, we have only a
limited C runtime environment without writable data segment. In this
phase, some configurations (for example with environment in EEPROM)
must not use the normal getenv(), but a special function. This
function had been called getenv_r(), with the idea that the "_r"
suffix would mean the same as in the _r_eentrant versions of some of
the C library functions (for example getdate vs. getdate_r, getgrent
vs. getgrent_r, etc.).
Unfortunately this was a misleading name, as in U-Boot the "_r"
generally means "running from RAM", i. e. _after_ relocation.
To avoid confusion, rename into getenv_f() [as "running from flash"]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
This patch adds support mmc driver for s5p SoC
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Lots of code use this construct:
cmd_usage(cmdtp);
return 1;
Change cmd_usage() let it return 1 - then we can replace all these
ocurrances by
return cmd_usage(cmdtp);
This fixes a few places with incorrect return code handling, too.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Since the vast majority of GPIO I2C implementations behave the same way,
support the common GPIO framework with default settings.
This adds two new defines CONFIG_SOFT_I2C_GPIO_{SCL,SDA} so that boards
which want GPIO I2C support need only define these.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added p3041 to cpu_type_list and SVR list
* Added number of LAWs for p3041
* Set CONFIG_MAX_CPUS to 4 for p3041
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added p5020 & p5010 to cpu_type_list and SVR list
* Added number of LAWs for p5020
* Set CONFIG_MAX_CPUS to 2 for p5020
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Previously we used an alias the pci node to determine which node to
fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to
find the node to update.
Additionally, we replace the code in each board with a single macro call
that makes assumes uniform naming and reduces duplication in this area.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add printing of LAWBARH/LAWBARL for FSL_CORENET platforms.
Signed-off-by: Becky Bruce <Beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The current code redefines functions based on FSL_CORENET_ vs not -
create macros/inlines instead that hide the differences.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.
To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.
In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.
I have done a successful ppc build all and tested a board or two from
each processor family.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some commands (like 'mii') use this name to select devices, but they break
when those names contain spaces. So drop the space from the Blackfin EMAC
driver.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than only support the pins dedicated as chip selects, utilize the
gpio framework to support any gpio pin.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
Rather than bang MMRs directly, use the new portmux framework to handle
the details. While we're doing this, let boards declare the exact list
of pins they need in case there is one or two they don't actually have
hooked up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Add definitions and initialization in orion5x for mvgbe.
Add orion5x in mvgbe SoC includes.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Rename all references to kirkwood in mvgbe symbols
throughout the whole codebase.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Rename kirkwood_egiga.* to mvgbe.* and adjust makefile
and #include accordingly.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This configuration option allows SoCs without random
generation capability to fill in local MACs with a fixed
rather than random value
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch adds the gpio usage request. The polarity is changed to
positive as suggested by Mike Frysinger.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* the following problems are met :
config was set to use the new driver as a default but
- RMII was not enabled for the new driver
- the new driver didn't compile with RMII enabled
- the new driver initialize a PHY at address O when the PHY of
this board is at 1 thus we get "AT91 EMAC RMII: No PHY present"
* to fix these problems, this patch :
- enable RMII for the new driver
- fix the wrong define used in the at91_emac.c
- allow the config file to set a default phy address (and use
0 as a default as in the actual at91_emac.c driver)
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The current dm9000x driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
Blackfin systems as the accesses can get out of order. So convert the
direct volatile dereferences to use the normal in/out macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The current OUTW function is always defined as a 16bit function, but this
doesn't work correctly when using the 32bit access mode. So define it as
a 32bit function when in 32bit mode so things work correctly on Blackfin
32bit LE systems.
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some places in the current code equate the Marvell 88E1111 PHY as the family
when in reality it's a subpart of the Alaska family. So once we generalize
that, add support for the 88E1118 PHY.
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The Ethernet initialization functions are supposed to return the number of
devices initialized, so fix tsec_eth_init() so that they returns the number of
TSECs initialized, instead of just zero. This is safe because the return value
is currently ignored by all callers, but now they don't have to ignore it.
In general, if an function initializes only one device, then it should return
a negative number if there's an error. If it initializes more than one device,
then it should never return a negative number.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Device names should not contain non-printable characters like newlines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
No compiled code change here, just drop the local PHY defines in favor of
the common standard ones.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Rather than hardcode specific phy addresses, search the possible phy
address space to find the first available phy. Also respect the normal
CONFIG_PHY_ADDR option for board porters to pick a specific address.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
DRAM window mapping uses kirkwood-provided functions instead
of global gd as do other drivers--fix this.
Also, fix a typo in a comment
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Designware network driver support added.
This is a Synopsys ethernet controller
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Insert isb() sequence points to ensure DMA descriptors
are filled in and set up before actual DMA occurs.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
By defining CONFIG_M88E1111_DISABLE_FIBER boards can configure the
M88E1111 PYH to disable fiber. This is needed for an upcoming PPC460GT
based board, which has fiber/copper auto-selection enabled by default.
This doesn't seem to work. So we disable fiber in the PHY register.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The DM9000 in/out helper functions were casting the register address when
it was accessing things directly (pre commit a45dde2293). But
when it was changed to using the in/out helpers, those casts were dropped
because those functions don't take pointers. Even more recently, those
functions were then changed to use the read/write helpers, but the casts
were not re-added. This is necessary because the read/write helpers do
take pointers. Otherwise we get a lot of warnings like:
dm9000x.c: In function 'dm9000_inblk_8bit':
dm9000x.c:172: warning: passing argument 1 of 'readb'
makes pointer from integer without a cast
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
remove below warnings
serial_s5p.c: In function 'serial_getc_dev':
serial_s5p.c:136: warning: dereferencing type-punned pointer will break strict-aliasing rules
serial_s5p.c: In function 'serial_putc_dev':
serial_s5p.c:152: warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Make it easy to use GPIOs for the DEV_READY pin by using the common GPIO
framework. Also make the NAND_PLAT_INIT() define optional.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
The Toshiba TC58NVG0* parts are 128Mbytes x 8 bits 3.3V parts with the 0xD1
identifier. Add these to the list of known devices IDs.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
When the NAND part is not supported, it is useful to show the manufacturer
and device ID to help debugging and reporting.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Two Indentation fixes.
Catch requests for full-duplex transfers when driver configured for
half-duplex operation only.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
this eliminates compiler warnings when cmd_mmc.c is built with CONFIG_SYS_MMC_SET_DEV
the mmc_set_dev implementation in omap3_mmc.c is also tweaked to match
the new prototype in parameter naming and type
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch modifies the omap24xx driver so that it will also work with OMAP4.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The architecture independent header is moved to drivers/mmc, and the architecture
dependent headers reside in asm/arch-omap3 and asm/arch-omap4
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds support for the second and third mmc channels on OMAP3
processors
Boards wishing to use this feature should define CONFIG_SYS_MMC_SET_DEV
in the board config
Tested on Overo
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Tested-by: Philip Balister <philip@opensdr.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands. Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".
This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:
int main (int argc, char **argv)
{
while (--argc > 0 && **++argv == '-') {
/* ====> */ while (*++*argv) {
switch (**argv) {
case 'd':
debug++;
break;
...
default:
usage ();
}
}
}
...
}
The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell. With the modification, the compiler will prevent this with
an
error: increment of read-only location '*argv'
N.B.: The code above can be trivially rewritten like this:
while (--argc > 0 && **++argv == '-') {
char *arg = *argv;
while (*++arg) {
switch (*arg) {
...
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
At the moment, the default SPI flash subsystem is quite terse. Errors and
successes both result in a generic message. So move the useful errors and
useful successes to printf output by default.
While we're here, also convert the messages to use print_size().
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some old STMicro parts do not support JEDEC ID (0x9f). This patch
uses RES (0xab) to get Electronic ID and translates it to JEDEC ID.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Mike Frysinger <vapier@gentoo.org>
This avoids a build warning that you see if anyone in the
header chain has included io.h (which is coming shortly). The previous
code redefined readl/writel; this patch renames it to be specific to
ohci. The defines are also moved from ohci-hcd.c to ohci.h.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
MUSB PHY on OMAP3EVM Rev >= E uses external Vbus supply to support
500mA of power.We need to program MUSB PHY to use external Vbus
for this purpose.
Adding 'extvbus' member in musb_config structure which should be set
by all the boards where MUSB interface is using external Vbus supply.
Also added ULPI bus control register read/write abstraction for
Blackfin processor as it doesn't have ULPI registers.
CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Changed musb_config initialization for omap3.c, davinci.c
and da8xx.c using name of structure fields. This would cause
the uninitialized field to be null by default and thus would
help in avoiding to init some flags required to be set only
for a few selected platforms.
CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards.
Note that according to errata from Atmel, OHCI is not operational
on the first revision of at91sam9g45 chip. So this patch enables
OHCI support for later revisions.
Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
ehci_submit_async() doesn't really zero out the QH transfer overlay (as the EHCI
specification suggests) which leads to the controller seeing the "token" field
as the previous call has left it, i.e.:
- if a timeout occured on the previous call (Active bit left as 1), controller
incorrectly tries to complete a previous transaction on a newly programmed
endpoint;
- if a halt occured on the previous call (Halted bit set to 1), controller just
ignores the newly programmed TD(s) and the function then keeps returning error
ad infinitum.
This turned out to be caused by the wrong orger of the arguments to the memset()
call in ehci_alloc(), so the allocated TDs weren't cleared either.
While at it, stop needlessly initializing the alternate next TD pointer in the
QH transfer overlay...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Remy Bohmer <linux@bohmer.net>
On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII.
Current TBI PHY settings for SGMII mode cause link problems on
this platform, link never comes up.
Fix this by making TBI PHY settings configurable and add a working
configuration for P2020RDB.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
The AmigaOneG3SE board has been orphaned or a very long time, and
broken for more than 12 releases resp. more than 3 years. As nobody
seems to be interested any more in this stuff we may as well ged rid
of it, especially as it clutters many areas of the code so it is a
continuous pain for all kinds of ongoing work.
Signed-off-by: Wolfgang Denk <wd@denx.de>
UBI: initialise update marker
The in kernel copy of a volume's update marker is not initialised from the
volume table. This means that volumes where an update was unfinnished will
not be treated as "forbidden to use". This is basically that the update
functionality was broken.
Signed-off-by: Peter Horton <zero@colonel-panic.org>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Stefan Roese <sr@denx.de>
The following restructuring and optimisations increase the SPI
read performance from 1.3MiB/s (on da850) to 2.87MiB/s (on da830):
Remove continual revaluation of driver state from the core of the
copy loop. State can not change during the copy loop, so it is
possible to move these evaluations to before the copy loop.
Cost is more code space as loop variants are required for each set
of possible configurations. The loops are simpler however, so the
extra is only 128bytes on da830 with CONFIG_SPI_HALF_DUPLEX
defined.
Unrolling the first copy loop iteration allows the TX buffer to be
pre-loaded reducing SPI clock starvation.
Unrolling the last copy loop iteration removes testing for the
final loop iteration every time round the loop.
Using the RX buffer empty flag as a transfer throttle allows the
assumption that it is always safe to write to the TX buffer, so
polling of TX buffer full flag can be removed.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
When set to PULL_NONE, gpio_set_pull function is returned without write the register.
This patch fixed it.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
For boards using sm501/sm502 on PCI bus some driver
functions normaly defined in the board code are not
needed and empty. Provide weak default functions for
them and do not enforce board code to define empty
functions.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Do not enforce drivers to provide empty video_set_lut()
if they do not implement indexed color (8 bpp) frame
buffer support. Add default function to the cfb_console
driver and remove empty video_set_lut() functions.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This patch enables PXAMCI support on PXA3xx CPUs. This patch only enables MMC1
though, MMC2 and PXA31x MMC3 will need further patch to be operational.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
In case the delays were set to 10000, the MMC card on PXA27X boards (and PXA3xx
boards) didn't initialize on first try. Increasing the delays and leaving just
those for PXA25x and 26x (that is 200000) fixes this problem.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
I have updated this patch based on the comments [1] by Wolfgang Denk and
removed unused variables.
[1][http://lists.denx.de/pipermail/u-boot/2010-May/071728.html]
Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and
take advantage of the TX buffer in the SPI module. On LogicPD OMAP-L138 EVM,
SPI read throughput goes up from ~0.8Mbyte/s to ~1.3Mbyte/s. Tested with a 2Mbyte image file.
Remove unused variables in the spi_xfer() function.
Signed-off-by: Delio Brignoli <dbrignoli@audioscience.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch adds the driver of altera spi controller, which is
used as epcs/spi flash controller. It also works with mmc_spi
driver.
This driver support more than one spi bus, with base list declared
#define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... }
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds a status led driver followed the GPIO access
conventions of Linux. The led mask is used to specify the gpio pin.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
The current Blackfin nand write function fills up the write buffer but
returns before it has had a chance to drain. On faster systems, this
isn't a problem as the operation finishes before the ECC registers are
read, but on slower systems the ECC may be incomplete when the core tries
to read it.
So wait for the buffer to drain once we're done writing to it.
Signed-off-by: Andrew Caldwell <Andrew.Caldwell@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current U-Boot UBI implementation is copied from Linux. In this
porting the UBI background thread was not handled correctly. Upon write
operations ubi_wl_flush() makes sure, that all queued operations, like
page-erase, are completed. But this is missing for read operations.
This patch now makes sure that such operations (like scrubbing upon
bit-flip errors) are not queued, but executed directly.
Signed-off-by: Stefan Roese <sr@denx.de>
Commit 77c1458d caused the following compiler warnings:
fsl_esdhc.c: In function 'esdhc_pio_read_write':
fsl_esdhc.c:142: warning: assignment discards qualifiers from pointer target type
fsl_esdhc.c: In function 'esdhc_setup_data':
fsl_esdhc.c:169: warning: unused variable 'wml_value'
fsl_esdhc.c: In function 'esdhc_pio_read_write':
fsl_esdhc.c:164: warning: control reaches end of non-void function
Fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Dipen Dudhat <dipen.dudhat@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
On the MPC85xx platform if we have SATA its connected on SERDES.
Determing if SATA is enabled via sata_initialize should not be board
specific and thus we move it out of the MPC8536DS board code.
Additionally, now that we have is_serdes_configured() we can determine
if the given SATA port is enabled and error out if its not in the
driver.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The x86 architecture exclusively uses Port-Mapped I/O (inb/outb) to access
the 16550 UARTs. This patch mimics how Linux selects between Memory-Mapped
and Port-Mapped I/O. This allows x86 boards to use CONFIG_SERIAL_MUTLI and
drop the custom serial port driver
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
In order to do this cleanly, the register accesses have to be converted to
a C struct (base pointer), so do that in the process.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The RTC is part of the Freescale's PMIC controller.
Use general function to access to PMIC internal registers.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
The patch add supports for the Freescale's Power
Management Controller (known as Atlas) used together with i.MX31/51
processors. It was tested with a MC13783 (MX31) and
MC13892 (MX51).
Signed-off-by: Stefano Babic <sbabic@denx.de>