Commit Graph

22120 Commits

Author SHA1 Message Date
Simon Glass
f8a2d191cf uuid: Add a comment for UUID_STR_LEN
This macro is the length of the string but excludes the terminator. Users
must add 1 when declaring a large-enough string. Add a comment to make
this clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
7d70116fc7 video: Allow syncing the entire framebuffer to the copy
In some cases so much of the framebuffer is updated that it is not worth
copying the changes piece by piece to the copy framebuffer. Add a function
to copy the whole thing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
9fe064646d bloblist: Support relocating to a larger space
Typically in TPL/SPL the bloblist is quite small. But U-Boot proper may
want to add a lot more to it, such as ACPI tables.

Add a way to expand the bloblist by relocating it in U-Boot proper, along
with the other relocation activities.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Simon Glass
09d9ba9097 spl: Add functions for next and previous phase
It is useful to be able to figure out which phase we are loading next and
which phase we came from. Add some functions to handle this as well as
returning the name of a phase. This allows messages like "Booting to x"
where x is the next phase.

At present, TPL says 'Jumping to U-Boot' at the end, when in fact it is
jumping to SPL. This is confusing, so use the new functions to correct
this.

Tests for this will come with an upcoming minor SPL test refactor.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-27 17:03:16 -05:00
Volodymyr Babchuk
b7cfe32e18 smccc: fix sign bit expansion
Signed ARM_SMCCC_FAST_CALL value is shifted to 31'st bit. Then, it is expanded
to 64 bit value, which results in 1s in higher 32 bits.

This causes corrupted values in 64-bit SMC IDs and issues in buggy handlers of
32-bit calls.

We need to make ARM_SMCCC_FAST_CALL unsigned long, so it would work properly
on 32 bit architectures.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-01-27 16:58:57 -05:00
Philippe Reynes
4d145f26dd bootcount: allow to use this feature on TPL
This commit add an option TPL_BOOTCOUNT_LIMIT to
use bootcount on TPL.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-27 16:58:57 -05:00
Tom Rini
8b195f4b71 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Disable slot when emmc is not present (Pali)
- DS414; config header cleanup (Phil)
- PCI: auto-config enhancement (Phil)
- pci_mvebu: Also map IO region (Phil)
- serial: a3720: Implement pending method for output direction (Pali)
- turris_mox: Enable a few commands (Marek)
- helios4 & ClearFog changes (Dennis)
- Plus some minor misc changes
2021-01-27 11:39:31 -05:00
Alex Nemirovsky
c34a927566 board: presidio-asic: Add CAxxxx Ethernet support
Add CAxxxx Ethernet support for the Cortina Access
Presidio Engineering Board

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
2021-01-27 10:47:52 -05:00
Abbie Chang
a70d7b0192 net: phy: ca_phy: Add driver for CAxxxx SoCs
Add phy driver support for MACs embedded inside Cortina Access SoCs

Signed-off-by: Abbie Chang <abbie.chang@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>

CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Tom Rini <trini@konsulko.com>
CC: Aaron Tseng <aaron.tseng@cortina-access.com>

Moved out PHY specific code out of Cortina NI Ethernet driver
and into a Cortina Access PHY interface driver
2021-01-27 10:47:47 -05:00
Phil Sutter
7d3c6c6e9f arm: mvebu: ds414: Config header mini-review
A few minor changes:

* Get rid of leftover comments, other commits removed the defines they
  referred to.

* CONFIG_SYS_NETA_INTERFACE_TYPE is not used anymore since commit
  e3b9c98a23 ("net: mvneta: Convert to driver model").

* Drop CONFIG_USB_MAX_CONTROLLER_COUNT: it is per-HCI type, so XHCI and
  EHCI could still both work be used.

* Unconditionally define CONFIG_EHCI_IS_TDI: it has no effect on XHCI so
  that conditional doesn't make any sense.

* Define a larger PHY_ANEG_TIMEOUT: In my test bed, the NIC is directly
  connected to some RTL8111 and the default 8s timeout was often too
  short.

Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-27 07:29:43 +01:00
Tom Rini
e262b2973e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- New Allwinner H616 SoC support (sans Ethernet & USB)
- H6 DT update
- Tanix TX6 TV box support
- OrangePi 3 support
- OrangePi Zero2 (H616) support
2021-01-25 19:46:02 -05:00
Jernej Skrabec
80b2c65bc2 arm: sunxi: add initial H616 DTSI and headers
This commit introduces H616 DTSI file and dt-bindings headers needed for
device tree files.

Files are taken from v3 Linux H616 support submission[1], as the
H616 .dtsi file is not merged upstream yet.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632082.html

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
8ec293e063 sunxi: Add support for H616 SoC
H616 is very similar to H6 so most of the infrastructure can be reused.
However, two big differences are that it doesn't have functional SRAM A2
which is usually used for TF-A and it doesn't have ARISC co-processor.
It also needs bigger SPL size - 48 KiB.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
44726096cf sunxi: Introduce common symbol for H6 like SoCs
It turns out that there are at least 2 other SoCs which have basically
the same memory map, similar clocks and other features as H6. It's very
likely that we'll see more such SoCs in the future. In order to ease
porting to new SoCs and lower ifdef clutter, introduce common symbol for
them.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
fbd37d8d28 sunxi: Add support for AXP305 PMIC
This PMIC can be found on H616 boards and it's very similar to AXP805
and AXP806.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Tom Rini
c99be953e7 - MIPS: add support for Mediatek MT7620 SoCs
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Merge tag 'mips-pull-2021-01-24' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips

- MIPS: add support for Mediatek MT7620 SoCs
2021-01-25 14:38:40 -05:00
Tom Rini
4057b98ff2 Changes for 2020.04
-------------------
 
 - new board:
 	Phytec phyCORE-i.MX8MP
 	i.MX8MN Beacon EmbeddedWorks devkit
 
 - Fixes:
 	several nanbcb fixes
 	fix for imx8mm_beacon
 - further switch to distro boot commands
 - DM:
 	DM Ether for MX6UL
 
 CI:
 
 https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
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Merge tag 'u-boot-imx-20210125' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Changes for 2020.04
-------------------

- new board:
	Phytec phyCORE-i.MX8MP
	i.MX8MN Beacon EmbeddedWorks devkit

- Fixes:
	several nanbcb fixes
	fix for imx8mm_beacon
- further switch to distro boot commands
- DM:
	DM Ether for MX6UL

CI:

https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
2021-01-25 09:02:35 -05:00
Tom Rini
7f10b8eed4 Pull request for documentation tag doc-2021-04-rc1 (2)
* Man-pages for sbi, exit, for, echo, loady, true, false, conitrace
 * Adjust suppression of newline in echo command.
 * Provide unit test for echo command.
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Merge tag 'doc-2021-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for documentation tag doc-2021-04-rc1 (2)

* Man-pages for sbi, exit, for, echo, loady, true, false, conitrace
* Adjust suppression of newline in echo command.
* Provide unit test for echo command.
2021-01-25 09:02:06 -05:00
Tom Rini
aee5bcce35 Second set of u-boot-atmel features for 2021.04 cycle
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Merge tag 'u-boot-atmel-2021.04-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

Second set of u-boot-atmel features for 2021.04 cycle

This feature set includes macb updates for all interfaces and new
sama7g5 variant support; micrel ksz9031 DLL support; a new board from
Giant based on Adafruit feather form factor which contains a SAMA5D27
SoC; several fixes regarding the NAND flash PMECC block; and pincontrol
drive strength support for pio4 controller.
2021-01-25 09:01:28 -05:00
Heinrich Schuchardt
a03185a3ec dm: core: describe uclass_root_s
'make htmldocs' creates a warning:

./include/asm-generic/global_data.h:443:
warning: Function parameter or member 'uclass_root_s'
not described in 'global_data'

Correct the member descriptions.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Weijie Gao
4075928c36 reset: mtmips: add reset controller support for MediaTek MT7620 SoC
This patch adds reset controller bits definition header file for MediaTek
MT7620 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
d9a5da72d7 clk: add clock driver for MediaTek MT7620 SoC
This patch adds a clock driver for MediaTek MT7620 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
dd4fdc0b14 mips: mtmips: add support for MediaTek MT7620 SoC
This patch adds support for MediaTek MT7620 SoC.
All files are dedicated for u-boot.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Adam Ford
8e95883e46 imx: Add support for i.MX8MN Beacon EmbeddedWorks devkit.
Beacon EmbeddedWorks is releasing a devkit based on the i.MX8M
Nano SoC consisting of baseboard + SOM.

The kit is based on the same design as the Beacon dev kit with
the i.MX8M Mini.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 14:01:49 +01:00
Alice Guo
5b3c76e888 imx8mq: configs: add support for distro boot commands
Supported boot device types in iMX8MQ: MMC, DHCP.

CONFIG_DISTRO_DEFAULTS is added for enabling the DISTRO_DEFAULTS option.

CONFIG_BOOTCOMMAND which is defined in include/configs/imx8mq_evk.h is
deleted because "run distro_bootcmd" is required to be the default boot
mode.

scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution.

kernel_addr_r is the location in RAM where the kernel will be loaded to.

Delete unnecessary environment variables because "run distro_bootcmd" is
set to be the default boot mode.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2021-01-23 13:40:29 +01:00
Teresa Remmet
c661c511e9 board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support
Add initial support PHYTEC phyCORE-i.MX8MP SOM.

    Supported features:
     - 2GB LPDDR4 RAM
     - eMMC
     - external SD
     - debug UART2
     - watchdog

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-23 11:30:32 +01:00
Marc Ferland
9452d58e10 arm: dart6ul: enable DM_ETH for the dart6ul
This patch converts the dart6ul ethernet support to DM_ETH and cleans
up the legacy ethernet code. The clean up, more specifically:

* moves the fec2 node and pin definition to the carrier board DTS
  since the phy associated with it is on the carrier board and not on
  the SoM;
* add the reset pin associated to each phy;
* separate the ethernet, mdio and reset pins of each fec so that they
  are easier to reference;
* add clock properties to the phy nodes since they are connected to the
  50Mhz ENET[12]_TX_CLK clock of the SoC;
* remove CONFIG_BOARD_EARLY_INIT_F since the function is now empty.

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
2021-01-23 11:30:31 +01:00
Adam Ford
4736871dc2 imx: imx8mm-beacon: Remove relocation restrictions
The system is capable of relocating RAM disks and the kernel.
Remove these restrictions to prevent it.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-01-23 11:30:31 +01:00
Alice Guo
9b162b1d1f imx8mp: configs: add support for distro boot commands
Supported boot device types in iMX8MP: MMC.

CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is
for command fstype.

scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution. kernel_addr_r is the location in RAM where
the kernel will be loaded to. Delete unnecessary environment variables
because "run distro_bootcmd" is set to be the default boot mode.

On the iMX8MP platform I used, "mmc1" represents SD card and "mmc2"
represents eMMC.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2021-01-23 11:30:31 +01:00
Alice Guo
2df8930bf9 imx8mm: configs: add support for distro boot commands
Supported boot device types in iMX8MM: MMC, DHCP.

CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is
for command fstype.

CONFIG_BOOTCOMMAND which is defined in include/configs/imx8mm_evk.h is
deleted because "run distro_bootcmd" is required to be the default boot
mode.

scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution.

kernel_addr_r is the location in RAM where the kernel will be loaded to.

Delete unnecessary environment variables.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
f89eb9be09 imx: imx8mn/p: drop CONFIG_SYS_[I,D]CACHE_OFF
Drop CONFIG_SYS_[I,D]CACHE_OFF, it is safe to run with caches enabled on
these platforms.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
54bd9ddf21 arm: dts: imx8mq: sync dts from Linux Kernel
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
cf8842bc29 arm: dts: imx8mp: sync dts from Linux Kernel
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
50d0953127 arm: dts: imx8mn: sync dts from Linux Kernel
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Peng Fan
6489dac3ab imx: imx8mn_evk: correct stack/malloc adress
Move SP to end of OCRAM space. Drop MALLOC_F to make it alloc from
stack space.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Peng Fan
48b90f86c5 imx: imx8mp_evk: enable eth support
Add board code to configure the network interface
Add net defconfig

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Heinrich Schuchardt
041f0af366 fs: fat: structure for name and extension
The short name and extension of FAT files are stored in adjacent fields of
the directory entry. For some operations like calculating a checksum or
copying both fields it is preferable to treat both as one structure.

Change the definition of the directory entry structure to include a
structure comprising the name and the extension field.

This resolves Coverity CID 316357, CID 316350, CID 316348.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-23 07:56:53 +01:00
Greg Gallagher
c69ba7b4a0 configs: sama5d27_som1_ek: Set FDT filename based on defconfig
Make the FDT file name based on the default on that is specified in the
defconfig file.

Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
417eca09bf pinctrl: at91-pio4: implement drive strength support
Implement drive strength support, by preserving the same bindings
as in Linux.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Eugen Hristev
7cdcf0cb69 dt-bindings: pinctrl: at91-pio4: update license to SPDX style
Update license header to SPDX style

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Tom Rini
404bbc809d Pull request for UEFI sub-system for efi-2021-04-rc1-2
* Provide a test tool for initial RAM disk provided via load file2 protocol.
 * Make more items configurable to reduce code size:
   * Boot manager
   * EFI_DT_FIXUP_PROTOCOL
   * EFI_DEVICE_PATH_UTILITIES_PROTOCOL
 * Bug fixes
   * avoid EFI runtime symbols in global symbol table
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Merge tag 'efi-2021-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-04-rc1-2

* Provide a test tool for initial RAM disk provided via load file2 protocol.
* Make more items configurable to reduce code size:
  * Boot manager
  * EFI_DT_FIXUP_PROTOCOL
  * EFI_DEVICE_PATH_UTILITIES_PROTOCOL
* Bug fixes
  * avoid EFI runtime symbols in global symbol table
2021-01-20 10:49:23 -05:00
Ilias Apalodimas
53e54bf50d efi_loader: Avoid emitting efi_var_buf to .GOT
Atish reports that on RISC-V, accessing the EFI variables causes
a kernel panic. An objdump of the file verifies that, since the
global pointer for efi_var_buf ends up in .GOT section which is
not mapped in virtual address space for Linux.

<snip of efi_var_mem_find>

0000000000000084 <efi_var_mem_find>:
  84:   715d                    addi    sp,sp,-80

* objdump -dr
0000000000000086 <.LCFI2>:
  86:   e0a2                    sd  s0,64(sp)
  88:   fc26                    sd  s1,56(sp)
  8a:   e486                    sd  ra,72(sp)
  8c:   f84a                    sd  s2,48(sp)
  8e:   f44e                    sd  s3,40(sp)
  90:   f052                    sd  s4,32(sp)
  92:   ec56                    sd  s5,24(sp)
  94:   00000497            auipc   s1,0x0
            94: R_RISCV_GOT_HI20    efi_var_buf
  98:   0004b483            ld  s1,0(s1) # 94 <.LCFI2+0xe>
            98: R_RISCV_PCREL_LO12_I    .L0
            98: R_RISCV_RELAX   *ABS*

* objdump -t
0000000000000084 g     F .text.efi_runtime  00000000000000b8 efi_var_mem_find

With the patch applied:

* objdump -dr
0000000000000086 <.LCFI2>:
  86:   e0a2                    sd  s0,64(sp)
  88:   fc26                    sd  s1,56(sp)
  8a:   e486                    sd  ra,72(sp)
  8c:   f84a                    sd  s2,48(sp)
  8e:   f44e                    sd  s3,40(sp)
  90:   f052                    sd  s4,32(sp)
  92:   ec56                    sd  s5,24(sp)
  94:   00000497            auipc   s1,0x0
            94: R_RISCV_PCREL_HI20  .LANCHOR0
            94: R_RISCV_RELAX   *ABS*
  98:   00048493            mv  s1,s1
            98: R_RISCV_PCREL_LO12_I    .L0
            98: R_RISCV_RELAX   *ABS*

* objdump -t
0000000000000008 l     O .data.efi_runtime  0000000000000008 efi_var_buf

On arm64 this works, because there's no .GOT entries for this
and everything is converted to relative references.

* objdump -dr (identical pre-post patch, only the new function shows up)
00000000000000b4 <efi_var_mem_find>:
  b4:   aa0003ee    mov x14, x0
  b8:   9000000a    adrp    x10, 0 <efi_var_mem_compare>
            b8: R_AARCH64_ADR_PREL_PG_HI21  .data.efi_runtime
  bc:   91000140    add x0, x10, #0x0
            bc: R_AARCH64_ADD_ABS_LO12_NC   .data.efi_runtime
  c0:   aa0103ed    mov x13, x1
  c4:   79400021    ldrh    w1, [x1]
  c8:   aa0203eb    mov x11, x2
  cc:   f9400400    ldr x0, [x0, #8]
  d0:   b940100c    ldr w12, [x0, #16]
  d4:   8b0c000c    add x12, x0, x12

So let's switch efi_var_buf to static and create a helper function for
anyone that needs to update it.

Fixes: e01aed47d6 ("efi_loader: Enable run-time variable support for tee based variables")
Reported-by: Atish Patra <atishp@atishpatra.org>
Tested-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
0a7e5165ec efi_loader: efi_size_in_pages() missing parentheses
Add parentheses around size to avoid possible operator precedence problems.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
19ea5e66de efi_loader: remove EFI_UNICODE_COLLATION_PROTOCOL
In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2
language codes existed. This protocol is not part of the UEFI specification
any longer. It was however required to run the UEFI Self Certification Test
(SCT) II, version 2.6, 2017. So we implemented it for the sole purpose of
running the SCT.

As the SCT does not need the protocol anymore it is time for removal.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:17:17 +01:00
Heinrich Schuchardt
ff2f532fad efi_loader: make the UEFI boot manager configurable
Some boards are very tight on the binary size. Booting via UEFI is possible
without using the boot manager.

Provide a configuration option to make the boot manager available.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-20 08:09:34 +01:00
Marek Vasut
6f1e668d96 net: dwc_eth_qos: Pad descriptors to cacheline size
The DWMAC4 IP has the possibility to skip up to 7 AXI bus width size words
after the descriptor. Use this to pad the descriptors to cacheline size and
remove the need for noncached memory altogether. Moreover, this lets Tegra
use the generic cache flush / invalidate operations.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-01-19 09:15:02 -05:00
Tim Harvey
2767d881f0 power: pmic: add driver for Monolithic Power mp5416
This adds basic register access and child regulator binding
for the Monolithic MP5416 Power Management IC which integrates
four DC/DC switching converters and five LDO regulators.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
4a84cf06aa aspeed: Add AST2600 platform support
Add low level platform initialization for the AST2600 SoC.
The 2-stage booting with U-Boot SPL are leveraged to support
different booting mode.

However, currently the patch supports only the booting from
memory-mapped SPI flash.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
9fc21086b7 reset: aspeed: Add AST2600 reset support
Add controller reset support through the
System Control Unit (SCU) of AST2600 SoC.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Ryan Chen
a3c85990c3 clk: aspeed: Add AST2600 clock support
This patch adds the clock control driver
for the AST2600 SoC.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2021-01-18 15:14:56 -05:00