Commit Graph

37744 Commits

Author SHA1 Message Date
Marek Vasut
569a191a86 arm: socfpga: Add samtec VIN|ING board
Add support for board based on the popular Altera Cyclone V SoC.
This board has the following properties:
 - 1 GiB of DRAM
 - 1 Gigabit ethernet
 - 1 USB gadget port
 - 1 USB host port with an on-board hub
 - 2 QSPI NORs connected to the Cadence QSPI core
 - Multiple I2C EEPROMs and one I2C temperature sensor

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
---
V2: Update the defconfig as per Tom's request
2016-06-01 22:44:14 +02:00
Lokesh Vutla
8b528709c5 spl: fit: Fix load address of fit header
When loading fit header, it should be loaded to a previous address
aligned to ARCH_DMA_MINALIGN and not 8. Fixing the same.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-06-01 07:12:38 -04:00
Tom Rini
da6e2fab5d Merge branch 'master' of git://git.denx.de/u-boot-mips 2016-05-31 10:26:14 -04:00
Tom Rini
653bb0d92e Merge git://www.denx.de/git/u-boot-marvell 2016-05-31 10:26:02 -04:00
Andreas Fenkart
14070e69ad tools/env: allow to pass NULL for environment options
If users of the library are happy with the default, e.g. config file
name. They can pass NULL as the opts pointer. This simplifies the
transition of existing library users.
FIXES a compile error. since common_args has been removed by
a previous patch

Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
2016-05-31 10:23:10 -04:00
Masahiro Yamada
6f41751f46 Revert "image.h: Tighten up content using handy CONFIG_IS_ENABLED() macro."
This reverts commit 56adbb3872.

Since commit 56adbb3872 ("image.h: Tighten up content using handy
CONFIG_IS_ENABLED() macro."), I found my boards fail to boot Linux
because the commit changed the logic of macros it touched.  Now,
IMAGE_ENABLE_RAMDISK_HIGH and IMAGE_BOOT_GET_CMDLINE are 0 for all
the boards.

As you can see in include/linux/kconfig.h, CONFIG_IS_ENABLE() (and
IS_ENABLED() as well) can only take a macro that is either defined
as 1 or undefined.  This is met for boolean options defined in
Kconfig.  On the other hand, CONFIG_SYS_BOOT_RAMDISK_HIGH and
CONFIG_SYS_BOOT_GET_CMDLINE are defined without any value in
arch/*/include/asm/config.h .  This kind of clean-up is welcome,
but the options should be moved to Kconfig beforehand.

Moreover, CONFIG_IS_ENABLED(SPL_CRC32_SUPPORT) looks weird.
It should be either CONFIG_IS_ENABLED(CRC32_SUPPORT) or
IS_ENABLED(CONFIG_SPL_CRC32_SUPPORT).  But, I see no define for
CONFIG_SPL_CRC32_SUPPORT anywhere.  Likewise for the other three.

The logic of IMAGE_OF_BOARD_SETUP and IMAGE_OF_SYSTEM_SETUP were
also changed for SPL.  This can be a problem for boards defining
CONFIG_SPL_OF_LIBFDT.  I guess it should have been changed to
IS_ENABLED(CONFIG_OF_BOARD_SETUP).

In the first place, if we replace the references in C code,
the macros IMAGE_* will go away.

  if (IS_ENABLED(CONFIG_OF_BOARD_SETUP) {
          ...
  }

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-31 10:20:14 -04:00
Wills Wang
f1b65c98b0 mips: ath79: ap143: Reset ethernet on boot
This patch reset the ethernet controller for ap143 board

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-31 10:17:54 +02:00
Wills Wang
ca09e66b04 mips: ath79: Use AR933X_PLL_SWITCH_CLOCK_CONTROL_REG macro define
Add AR933X_PLL_SWITCH_CLOCK_CONTROL_REG define for ar933x chip.

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-31 10:17:54 +02:00
Wills Wang
cdeb68e292 mips: ath79: Add support for ungating USB and ethernet on qca953x
Add code to ungate USB and ethernet controller on qca953x

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-31 10:17:54 +02:00
Wills Wang
ad5b48abfe mips: ath79: Use 8MB flash profile for mtd partition by default
Change bootm flash address and mtd partition table for 8MB flash profile.

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-31 10:17:54 +02:00
Wills Wang
04583c686e mips: ath79: ap121: Enable ethernet
This patch enable network function for ap121 board.

Signed-off-by: Wills Wang <wills.wang@live.com>
Acked-by: Marek Vasut <marex@denx.de>
2016-05-31 10:17:54 +02:00
Wills Wang
375239174c mips: ath79: Rename get_bootstrap into ath79_get_bootstrap
Add a platform prefix for function name in order to make more readable,
and move it into ath79.h

Signed-off-by: Wills Wang <wills.wang@live.com>
Acked-by: Marek Vasut <marex@denx.de>
2016-05-31 10:17:54 +02:00
Daniel Schwierzeck
d58de3157e MIPS: malta: add defconfigs for MIPS64
Add defconfigs for recently introduced MIPS64 support on
Malta boards to get more build coverage for MIPS64.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-31 09:49:08 +02:00
Paul Burton
fb64cda579 MIPS: Abstract cache op loops with a macro
The various cache maintenance routines perform a number of loops over
cache lines. Rather than duplicate the code for performing such loops,
abstract it out into a new cache_loop macro which performs an arbitrary
number of cache ops on a range of addresses. This reduces duplication in
the existing L1 cache maintenance code & will allow for not adding
further duplication when introducing L2 cache support.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-31 09:44:24 +02:00
Paul Burton
372286217f MIPS: Split I & D cache line size config
Allow L1 Icache & L1 Dcache line size to be specified separately, since
there's no architectural mandate that they be the same. The
[id]cache_line_size functions are tidied up to take advantage of the
fact that the Kconfig entries are always present to simply check them
for zero rather than needing to #ifdef on their presence.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
[removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-31 09:44:24 +02:00
Paul Burton
ace3be4f15 MIPS: Move cache sizes to Kconfig
Move details of the L1 cache line sizes & total sizes into Kconfig,
defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is
introduced to allow platforms to select auto-detection of cache sizes,
and it defaults to being enabled if none of the cache sizes are set by
the configuration (ie. sizes are all the default 0), and code is
adjusted to #ifdef on that rather than on the definition of the sizes
(which will always be defined even if 0).

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-31 09:44:24 +02:00
Daniel Schwierzeck
83b0face8c MIPS: remove dead code from asm/u-boot-mips.h
Those wrappers for linker symbols were once used in the MIPS
specific board.c implementation. Since the migration to generic
board.c, those wrappers are dead code and can be removed.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-31 09:38:11 +02:00
Marek Vasut
e40095f63b net: Add ag7xxx driver for Atheros MIPS
Add ethernet driver for the AR933x and AR934x Atheros MIPS machines.
The driver could be easily extended to other WiSoCs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wills Wang <wills.wang@live.com>
[fixed Kconfig dependency]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-31 09:38:11 +02:00
Daniel Schwierzeck
5f9cc363ed MIPS: add tune for MIPS 34kc
Add tune Kconfig option for MIPS 34kc.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-31 09:38:11 +02:00
Daniel Schwierzeck
07f5b966aa MIPS: provide a default u-boot-spl.lds
Provide a default linker script for SPL binaries. Start address
and size of text section and BSS section are configurable. All
sections are arranged in a way that only relevant sections are
kept in the code section for maximum size reduction. All other
sections are kept but moved outside the code section to help
with debugging.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2016-05-31 09:38:11 +02:00
Paul Burton
0f832b9cdc malta: Allow MIPS64 builds
Both real Malta boards & emulators that mimic Malta (eg. QEMU) can
support MIPS64 CPUs. Allow MIPS64 builds of U-Boot for such boards,
which enables the user to make use of the whole 64 bit address space.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-31 09:38:11 +02:00
Paul Burton
bed1ca322d net: pcnet: Fix init on big endian 64 bit
If dev->iobase is 64 bits wide then writing the value of the BAR into a
pointer to iobase will not work on big endian systems, where the BAR
value will incorrectly get written to the upper 32 bits of the 64 bit
variable. Fix this by reading the BAR into a u32, matching the type
expected by pci_read_config_dword.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-31 09:38:11 +02:00
Paul Burton
442d2e0149 net: pcnet: Make 64 bit safe
Fix the pcnet driver to build safely on 64 bit platforms, in preparation
for allowing MIPS64 builds for Malta boards.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-31 09:38:11 +02:00
Paul Burton
4677d665a7 net: pcnet: Stop converting kseg1->kseg0 addresses
Now that MIPS virt_to_phys can handle kseg1 addresses on MIPS32, stop
manually converting addresses to their kseg0 equivalents in the pcnet
driver.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-31 09:38:11 +02:00
Paul Burton
2e4cc1c5d4 MIPS: Use CPHYSADDR to implement mips32 virt_to_phys
Use CPHYSADDR to implement the virt_to_phys function for converting from
a virtual to a physical address for MIPS32, much as is already done for
MIPS64. This allows for virt_to_phys to work regardless of whether the
address being translated is in kseg0 or kseg1, unlike the previous
subtraction based approach which only worked for addresses in kseg0.
This allows for drivers to provide an address to virt_to_phys without
needing to manually ensure that kseg1 addresses are converted to
equivalent kseg0 addresses first.

This patch is equivalent to this Linux patch currently waiting to be
reviewed & merged:

    https://patchwork.linux-mips.org/patch/12564/

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-05-31 09:38:11 +02:00
Stefan Roese
e084fd922f arm: spear: x600: Remove EFI support to reduce image size
EFI is not needed on x600. So lets remove the EFI support to make it fit
into the 0x60000 image size limit again.

Signed-off-by: Stefan Roese <sr@denx.de>
2016-05-31 07:48:40 +02:00
Stefan Roese
f7c32e8ece arm: spear: x600: Add support for Micrel KSZ9031 PHY
As the old ethernet PHY is not available any more, the x600 board has
been redesigned with the Micrel KSZ9031 PHY. This patch adds support
to autodetect the PHY and configure the Micrel PHY correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
2016-05-31 07:48:34 +02:00
Peter Robinson
452b3813f9 clearfog: add HUSH parser
In the big move of CONFIG_HUSH_PARSER to config files the clearfog
somehow missed out.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-05-31 07:43:51 +02:00
Tom Rini
f3c264f9de Merge branch 'master' of git://git.denx.de/u-boot-x86 2016-05-30 13:56:26 -04:00
Bin Meng
d3d664725b x86: baytrail: acpi: Fix I/O APIC ID in the MADT table
So far this is hardcoded to 2, but it should really be read
from the I/O APIC register.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-30 10:21:12 +08:00
Bin Meng
e6ddb6b013 x86: galileo: Enable ACPI table generation
Enable ACPI table generation by creating a DSDT table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-30 10:21:12 +08:00
Bin Meng
7ee371063f x86: quark: Generate ACPI FADT/MADT tables
Generate quark platform-specific FADT/MADT tables.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-30 10:21:12 +08:00
Bin Meng
48cf8b8346 x86: quark: Add platform ASL files
This adds basic quark platform ASL files. They are intended to be
included in dsdt.asl of any board that is based on this platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-30 10:21:12 +08:00
Bin Meng
ec37913221 x86: quark: Prepare device.h for inclusion by ASL
There is a device.h for quark on-chip devices, mainly for definitions
of internal PCI device numbers, but it's not ready to be included by
ASL files. Update to use hex numbers for PCI dev and __ASSEMBLY__.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-30 10:21:12 +08:00
Bin Meng
6683584c08 acpi: Pass -D__ASSEMBLY__ when compiling ASL files
ASL files may include various U-Boot header files, but IASL compiler
does not understand any C language embedded in these header files.
To reuse those header files for ASL compiling, use __ASSEMBLY__ in
the header files to exclude everything that is not liked by IASL.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-30 10:21:12 +08:00
Bin Meng
3498cc9775 x86: acpi: Make irqroute.asl common
The irqroute.asl file is already common enough to all x86 platforms.
Platform ASL files need only provide a irqroute.h to describe how
internal PCI devices and PCIe downstream port devices' INTx pins are
routed to which PIRQ pin.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-30 10:21:12 +08:00
Bin Meng
0d71511a2a x86: acpi: Create a common irqlinks ASL file
Move the irqlinks.asl file currently in the BayTrail directory to
a common place to be shared among all x86 platforms. As the PIRQ
routing control programming interface is common to Intel chipsets,
leave the common part in the common file, and move the platform
specific part to the platform files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-30 10:21:12 +08:00
Tom Rini
e4a94ce4ac Merge git://git.denx.de/u-boot-dm
For odroid-c2 (arch-meson) for now disable designware eth as meson
now needs to do some harder GPIO work.

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	lib/efi_loader/efi_disk.c

Modified:
	configs/odroid-c2_defconfig
2016-05-27 20:34:12 -04:00
Tom Rini
378f9134eb Merge git://git.denx.de/u-boot-rockchip 2016-05-27 15:48:53 -04:00
Lokesh Vutla
9b77b19178 ARM: OMAP4+: Fix DPLL programming sequence
All the output clock parameters of a DPLL needs to be programmed before
locking the DPLL. But it is being configured after locking the DPLL which
could potentially bypass DPLL. So fixing this sequence.

Reported-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2016-05-27 15:47:57 -04:00
Robert P. J. Day
87c2f76f3f tools: Add entry for generated tools/bin2header to tools/.gitignore
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2016-05-27 15:47:56 -04:00
Masahiro Yamada
d339df522b tools/genboardscfg.py: remove bogus import subprocess
Since f6c8f38ec6 ("tools/genboardscfg.py: improve performance more
with Kconfiglib"), this tool does not use the subprocess module.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-27 15:47:56 -04:00
Robert P. J. Day
56adbb3872 image.h: Tighten up content using handy CONFIG_IS_ENABLED() macro.
In order for CONFIG_IS_ENABLED(FOO) to work we need to move the changes
that CONFIG_FIT_DISABLE_SHA256 makes to be prior to the evaluation by
CONFIG_IS_ENABLED(foo)

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
[trini: Move CONFIG_FIT_DISABLE_SHA256 parts to fix build breakage]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-05-27 15:47:55 -04:00
Masahiro Yamada
ba9eb6c7eb arm64: rename __asm_flush_dcache_level to __asm_dcache_level
Since 1e6ad55c05 ("armv8/cache: Change cache invalidate and flush
function"), this routine can be used for both cache flushing and
cache invalidation.  So, it is better to not include "flush" in
this routine name.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-27 15:47:55 -04:00
Masahiro Yamada
1a021230d3 arm64: fix comment "flush & invalidate"
We should say "clean & invalidate", or simply "flush".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-27 15:47:55 -04:00
Masahiro Yamada
2582858841 arm64: optimize __asm_{flush, invalidate}_dcache_all
__asm_dcache_all can directly return to the caller of
__asm_{flush,invalidate}_dcache_all.

We do not have to waste x16 register here.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-27 15:47:54 -04:00
Lokesh Vutla
3d16389c90 board: am335x: Allow to choose serial device dynamically
Different AM335x based platforms have different serial consoles. As serial
console is Kconfig option a separate defconfig has to be created for each
platform. So pass the serial device dynamically.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-05-27 15:47:54 -04:00
Lokesh Vutla
73ec696059 ARM: dts: AM335x-ICEv2: Add minimal dts support
Add minimal dts support for AM335x-ICEv2 board

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
2016-05-27 15:47:53 -04:00
Lokesh Vutla
426af3848f config: env: Set AM335x-ICEv2 board specific env
Populate the right dtb file and console for AM335x-ICEv2 board.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-05-27 15:47:53 -04:00
Lokesh Vutla
97f3a178b2 board: AM335x-ICEv2: Add cpsw support
In order to enable cpsw on AM335x ICEv2 board, the following needs to be done:

1)There are few on board jumper settings which gives a choice between
cpsw and PRUSS, that needs to be properly selected[1]. Even after selecting
this, there are few GPIOs which control these muxes that needs to be held high.

2) The clock to PHY is provided by a PLL-based clock synthesizer[2] connected
via I2C. This needs to properly programmed and locked for PHY operation.
And PHY needs to be reset before before being used, which is also held by
a GPIO.

3) RMII mode needs to be selected.

[1] http://www.ti.com/lit/zip/tidr336
[2] http://www.ti.com/lit/ds/symlink/cdce913.pdf

Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-05-27 15:47:52 -04:00