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mips: ath79: Rename get_bootstrap into ath79_get_bootstrap

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Add a platform prefix for function name in order to make more readable,
and move it into ath79.h

Signed-off-by: Wills Wang <wills.wang@live.com>
Acked-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Wills Wang 2016-05-30 22:54:50 +08:00 committed by Daniel Schwierzeck
parent d58de3157e
commit 375239174c
9 changed files with 15 additions and 28 deletions
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4
arch/mips/mach-ath79/ar933x/clk.c
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@ -9,7 +9,7 @@
#include <asm/addrspace.h>
#include <asm/types.h>
#include <mach/ar71xx_regs.h>
#include <mach/reset.h>
#include <mach/ath79.h>
DECLARE_GLOBAL_DATA_PTR;
@ -17,7 +17,7 @@ static u32 ar933x_get_xtal(void)
{
u32 val;
val = get_bootstrap();
val = ath79_get_bootstrap();
if (val & AR933X_BOOTSTRAP_REF_CLK_40)
return 40000000;
else

4
arch/mips/mach-ath79/ar933x/ddr.c
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@ -10,7 +10,7 @@
#include <asm/addrspace.h>
#include <asm/types.h>
#include <mach/ar71xx_regs.h>
#include <mach/reset.h>
#include <mach/ath79.h>
DECLARE_GLOBAL_DATA_PTR;
@ -114,7 +114,7 @@ void ddr_init(void)
writel(DDR_CONF_REG_VAL, regs + AR71XX_DDR_REG_CONFIG);
writel(DDR_CONF2_REG_VAL, regs + AR71XX_DDR_REG_CONFIG2);
val = get_bootstrap();
val = ath79_get_bootstrap();
if (val & AR933X_BOOTSTRAP_DDR2) {
/* AHB maximum timeout */
writel(0xfffff, regs + AR933X_DDR_REG_TIMEOUT_MAX);

6
arch/mips/mach-ath79/ar934x/clk.c
View File

@ -9,7 +9,7 @@
#include <asm/addrspace.h>
#include <asm/types.h>
#include <mach/ar71xx_regs.h>
#include <mach/reset.h>
#include <mach/ath79.h>
#include <wait_bit.h>
DECLARE_GLOBAL_DATA_PTR;
@ -119,7 +119,7 @@ void ar934x_pll_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
writel(0x03000000, srif_regs + 0x188); /* Undocumented reg :-) */
/* Test for 40MHz XTAL */
reg = get_bootstrap();
reg = ath79_get_bootstrap();
if (reg & AR934X_BOOTSTRAP_REF_CLK_40) {
xtal_40 = 1;
cpu_srif = 0x41c00000;
@ -214,7 +214,7 @@ static u32 ar934x_get_xtal(void)
{
u32 val;
val = get_bootstrap();
val = ath79_get_bootstrap();
if (val & AR934X_BOOTSTRAP_REF_CLK_40)
return 40000000;
else

4
arch/mips/mach-ath79/ar934x/ddr.c
View File

@ -11,7 +11,7 @@
#include <asm/addrspace.h>
#include <asm/types.h>
#include <mach/ar71xx_regs.h>
#include <mach/reset.h>
#include <mach/ath79.h>
DECLARE_GLOBAL_DATA_PTR;
@ -45,7 +45,7 @@ void ar934x_ddr_init(const u16 cpu_mhz, const u16 ddr_mhz, const u16 ahb_mhz)
ddr_regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE,
MAP_NOCACHE);
reg = get_bootstrap();
reg = ath79_get_bootstrap();
if (reg & AR934X_BOOTSTRAP_SDRAM_DISABLED) { /* DDR */
if (reg & AR934X_BOOTSTRAP_DDR1) { /* DDR 1 */
memtype = AR934X_DDR1;

1
arch/mips/mach-ath79/include/mach/ath79.h
View File

@ -140,6 +140,7 @@ static inline int soc_is_qca956x(void)
return soc_is_tp9343() || soc_is_qca9561();
}
u32 ath79_get_bootstrap(void);
int ath79_eth_reset(void);
int ath79_usb_reset(void);

14
arch/mips/mach-ath79/include/mach/reset.h
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@ -1,14 +0,0 @@
/*
* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __ASM_MACH_RESET_H
#define __ASM_MACH_RESET_H
#include <linux/types.h>
u32 get_bootstrap(void);
#endif /* __ASM_MACH_RESET_H */

4
arch/mips/mach-ath79/qca953x/clk.c
View File

@ -9,7 +9,7 @@
#include <asm/addrspace.h>
#include <asm/types.h>
#include <mach/ar71xx_regs.h>
#include <mach/reset.h>
#include <mach/ath79.h>
DECLARE_GLOBAL_DATA_PTR;
@ -17,7 +17,7 @@ static u32 qca953x_get_xtal(void)
{
u32 val;
val = get_bootstrap();
val = ath79_get_bootstrap();
if (val & QCA953X_BOOTSTRAP_REF_CLK_40)
return 40000000;
else

4
arch/mips/mach-ath79/qca953x/ddr.c
View File

@ -10,7 +10,7 @@
#include <asm/addrspace.h>
#include <asm/types.h>
#include <mach/ar71xx_regs.h>
#include <mach/reset.h>
#include <mach/ath79.h>
DECLARE_GLOBAL_DATA_PTR;
@ -226,7 +226,7 @@ void ddr_init(void)
regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE,
MAP_NOCACHE);
val = get_bootstrap();
val = ath79_get_bootstrap();
if (val & QCA953X_BOOTSTRAP_DDR1) {
writel(DDR_CTL_CONFIG_VAL, regs + QCA953X_DDR_REG_CTL_CONF);
udelay(10);

2
arch/mips/mach-ath79/reset.c
View File

@ -45,7 +45,7 @@ void _machine_restart(void)
/* NOP */;
}
u32 get_bootstrap(void)
u32 ath79_get_bootstrap(void)
{
void __iomem *base;
u32 reg = 0;