Commit Graph

49574 Commits

Author SHA1 Message Date
Heinrich Schuchardt
2f8ffb0655 get_maintainer.pl: update from Linux kernel v4.16
The most significant change is the addition of the --self-test option
which allows to run a consistency check on all MAINTAINERS files.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-04-10 15:19:14 -04:00
Heinrich Schuchardt
b57aaa07f2 MAINTAINERS: ARM STM STM32MP: correct file paths
Provide correct file paths.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-04-10 15:19:14 -04:00
Neil Armstrong
65388d0dc5 clk: add sandbox test for bulk API
This patch adds the bulk clock API tests for the sandbox test suite.

It's very similar to the main test but only uses the _bulk() API and
checks if the clocks are correctly enabled/disabled.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 15:18:56 -04:00
Neil Armstrong
a855be87da clk: Add get/enable/disable/release for a bulk of clocks
This patch adds a "bulk" API to the clock API in order to get/enable/disable
/release a group of clocks associated with a device.

This bulk API will avoid adding a copy of the same code to manage
a group of clocks in drivers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Neil Armstrong
91f5f8b73c reset: add sandbox test for bulk API
This patch adds the bulk reset API tests for the sandbox test suite.

Unlike the main test, it also check the "other" reset signal using the bulk API
and checks if the resets are correctly asserted/deasserted.

To allow the bulk API to work, and avoid changing the DT, the number of resets
of the sandbox reset controller has been bumped to 101 for the "other" reset
line to be valid.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Neil Armstrong
0c28233903 reset: Add get/assert/deassert/release for bulk of reset signals
This patch adds a "bulk" API to the reset API in order to get/deassert/
assert/release a group of reset signals associated with a device.

This bulk API will avoid adding a copy of the same code to manage
a group of reset signals in drivers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Simon Glass
b71ac16063 log: Add units to code-size stats in README.log
Without the units these numbers are confusing. Add a comment about the
unit being 'bytes' and mention 'buildman' as the source.

Suggested-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Simon Glass
45fac9fc18 log: Correct missing free() on error in log_add_filter()
If there is a problem with the parameters to log_add_filter(), the memory
allocated is currently not freed. Fix this.

Reported-by: Coverity (CID: 171962)

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Guillaume GARDET
004d00914a mkimage: do not fail if there is no print_header function
Commit 253c60a breaks the exit value of 'mkimage -T rkimage'
and print the following  error:
  mkimage: Can't print header for Rockchip Boot Image support: Success

It is not a failure to not print headers, so just display the warning message,
and finish the function properly.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>

Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-04-10 11:52:16 -04:00
Patrice Chotard
d409c96216 armv7m: disable icache before linux booting
Similarly to ARMV7, on ARMV7M instruction cache memory needs
to be disabled before running linux kernel to avoid kernel to
be stuck.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-04-10 11:52:16 -04:00
Neil Armstrong
e1e1e85203 serial: meson: Update compatible with new Linux bindings
The Amlogic Meson SoCs serial bindings were not written when serial
support was pushed into Linux and U-Boot.
A clean bindings document has been merged into Linux tree to correctly
handle the multiple clocks feeding the serial peripheral.
This update the U-Boot serial_meson driver with the new compatible
string for Amlogic Meson GX Socs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-04-10 11:52:16 -04:00
Neil Armstrong
20367bb560 reset: Add Amlogic Meson Reset Controller
The Amlogic Meson SoCs embeds up to 256 reset lines, add the corresponding
driver.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-04-10 11:52:16 -04:00
Álvaro Fernández Rojas
060690663d sysreset: syscon: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-04-10 11:52:16 -04:00
Tom Rini
2600df4f8e Xilinx changes for v2018.05-rc2
- Various DT changes and sync with mainline kernel
 - Various defconfig updates
 - Add SPL init for zcu102 revA
 - Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX
   and zc1751-dc3
 - Net fixes - xlnx,phy-type
 - 64bit axi ethernet support
 - arasan: Fix nand write issue
 - fpga fixes
 - Maintainer file updates
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Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.05-rc2

- Various DT changes and sync with mainline kernel
- Various defconfig updates
- Add SPL init for zcu102 revA
- Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX
  and zc1751-dc3
- Net fixes - xlnx,phy-type
- 64bit axi ethernet support
- arasan: Fix nand write issue
- fpga fixes
- Maintainer file updates
2018-04-09 11:06:21 -04:00
Tom Rini
844fb498cc Patch queue for efi - 2018-04-09
Highlights this time around:
 
   - Lots of minor spec compliance fixes
   - Support full range of GOP BLT commands
   - More fine grained error checking
   - Network fixes (init, DP)
   - Lots of other bug fixes...
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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-04-09

Highlights this time around:

  - Lots of minor spec compliance fixes
  - Support full range of GOP BLT commands
  - More fine grained error checking
  - Network fixes (init, DP)
  - Lots of other bug fixes...
2018-04-09 11:05:44 -04:00
Michal Simek
f190eaf002 arm64: zynqmp: Add support for Xilinx zcu111-revA
Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:53 +02:00
Michal Simek
cf0bcd7d02 arm64: zynqmp: Add support for Xilinx zcu106-revA
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
f7c8e491e9 arm64: zynqmp: Add support for zcu104 customer board
Xilinx zcu104 is another customer board. It is sort of zcu102 clone with
some differences.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
85231c087e arm64: zynqmp: Add support for zc12xx boards
Add support for zc12xx boards. All of them are internal boards for
silicon validation and share very similar base platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
10aaa3584b arm64: zynqmp: Add support for zc1751 dc3
zc1751 is based board with dc3 extenstion card which is used for silicon
validation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
6d0340931e arm64: zynqmp: Add support for zcu100 aka Ultra96 board
Add support for Xilinx zcu100.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
949ec53c34 arm64: zynqmp: Get 200MHz clock early for MMC
SPL MMC boot requires to have clock early.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:52 +02:00
Michal Simek
704744f81b arm64: zynqmp: Remove pinctrl settings
This part hasn't been pushed to mainline yet that's why remove it.
The patch can be reverted in future when this is pushed there.

Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-04-09 12:14:52 +02:00
Michal Simek
aedd54739f arm64: zynqmp: Remove power domain description
This part hasn't been pushed to mainline yet that's why remove it.
The patch can be reverted in future when this is pushed there.

Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-04-09 12:14:52 +02:00
Michal Simek
8314bfe5c7 arm64: zynqmp: Add low level initialization for zc1751
Add psu init for zc1751 dc cards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
979707baa9 arm64: zynqmp: Add low level initialization for zcu102-revA
Add psu init for zcu102-revA.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
cd1c2fa5f7 arm64: zynqmp: Enable Fixed link support
This patch enables the fixed link support for
all ZynqMP boards.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
4b148959da arm64: zynqmp: Enable mac address randomization for zc1751 dc5
There is no memory which stores mac address that's why generate it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
c7e36de6a7 arm64: zynqmp: Enable ethernet phys for zc1751 dc5
Enable ethernet phys for zc1751 dc5.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Luca Ceresoli
5e3cac50cc arm64: zynqmp: Enable booting to ATF
U-Boot is now able to boot to ARM Trusted Firmware (ATF). The boot
flow is SPL(EL3) loads ATF and full u-boot and jump to ATF(EL3) which
pass control to full u-boot(EL2). This has been tested on zcu106, so
enable it in this defconfig.

To generate an image that triggers this booting flow, you need to pass
'-O arm-trusted-firmware' to mkimage.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Michal Simek
1a82f59b31 arm64: zynqmp: Enable pxe and dhcp if commands are enabled
Targets without net can't use pxe or dhcp boot methods.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:51 +02:00
Siva Durga Prasad Paladugu
c643c491b9 net: phy: xilinx_phy: Read phytype using property xlnx,phy-type
This patch reads phytype from property "xlnx,phy-type" instead
od simply looking for "phy-type". This is to be inline with
Linux and also fixes the issue of detecting it wrongly in
u-boot.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-09 12:14:51 +02:00
Vipul Kumar
047f3bf828 axi: ethernet: Added support for 64 bit addressing for axi-ethernet
This patch uses writeq() function to enable greater than 32 bit
addressing of axi-ethernet for the ZynqMP devices.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-09 12:14:50 +02:00
Vipul Kumar
6fbbe2d8f6 nand: arasan_nfc: Fixed NAND write issue
In commit 2453c69518 ("arm64: zynqmp: nand: Fixed NAND erase issue for
size 1GiB or more"), ARASAN_NAND_MEM_ADDR1_PAGE_MASK macro changed
to 0xFFFF and the same macro is used in nand write and so that getting
nand write error.
This patch reverted this macro to the 0xFFFF0000 and used
ARASAN_NAND_MEM_ADDR1_COL_MASK in the nand erase function
which is equal to 0xFFFF.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Siva Durga Prasad Paladugu
71723aaec5 fpga: zynq: Add delay after PCFG_PROG_B change
There is delay needed after PCFG_PROGB change if
AES key source is efuse. This fixes the issue of
encrypted bitstream loading with AES efuse as key
source.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Siva Durga Prasad Paladugu
31bcb3444c fpga: zynqmp: Fix the nonsecure bitstream loading issue
Xilfpga library expects the size of bitstream in a pointer
but currenly we are passing the size as a value. This patch
fixes this issue.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Siva Durga Prasad Paladugu
19ed4b697b fpga: zynqmp: Update zynqmp_load() as per latest xilfpga
Latest xilfpga expects to set BIT5 of flags for nonsecure
bitsream and also expects length in bytes instead of words
This patch does the same.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-04-09 12:14:50 +02:00
Nitin Jain
b32e11a715 fpga: zynqmp: Add support to get the PCAP status for fpga info command
This patch adds support for ZynqMP platform to print FPGA PCAP status
for "fpga status" command.

Signed-off-by: Nitin Jain <nitinj@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Michal Simek
969dd4c7db clk: zynqmp: Add new compatible string for clock driver
New and old clk drivers are sharing IDs and descriptions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Michal Simek
5510d63786 arm: zynq: Use fixed partitions for spi flash for zc770 xm010
Sync with mainline.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:50 +02:00
Michal Simek
99a2e34d77 arm: zynq: Fix eeprom dt nodes
- Use eeprom for node name
- Use atmel compatible string instead of at.
- Add missing labels

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Javier Martinez Canillas
a3e10642da ARM: dts: zynq: Add generic compatible string for I2C EEPROM
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.

But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.

So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
c78a80ad13 arm: zynq: Use i2c-mux instead of i2cswitch for pca9548
i2c muxes should described like this.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
051a8ad7bb arm: zynq: Sync up licenses with mainline kernel
Use different location for SPDX line. Also update dates for new mainline
DTS files.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
03bc69dec9 arm: zynq: Remove 0x prefixes from cc108
The patch fixing issues reported by DTC:
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0x400000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0x800000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xc00000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xd00000 unit name should not have
leading "0x"
zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xf00000 unit name should not have
leading "0x"

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
5208a3a46a arm64: zynqmp: Remove double spaces from dts file
There is no reason to have double spaces for indentation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
bbe5c7252d arm64: zynqmp: Add silabs prefix to u69 for zcu102
Add vendor prefix to si5341.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
147ae1f210 arm64: zynqmp: Remove number from clock-generator node name
There shouldn't be a number appended based on spec.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:49 +02:00
Michal Simek
95f7d6419d arm64: zynqmp: Remove u-boot commands from dts files
U-Boot commands shouldn't be the part of kernel DTS files.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00
Srinivas Goud
1077dc2889 arm64: zynqmp: Update sd properties for dc5
This patch adds no-1-8-v below properties to sd node for dc5 board dts.

Signed-off-by: Srinivas Goud <srinivas.goud@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09 12:14:48 +02:00