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Xilinx changes for v2018.05-rc2 

- Various DT changes and sync with mainline kernel
 - Various defconfig updates
 - Add SPL init for zcu102 revA
 - Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX
   and zc1751-dc3
 - Net fixes - xlnx,phy-type
 - 64bit axi ethernet support
 - arasan: Fix nand write issue
 - fpga fixes
 - Maintainer file updates
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Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.05-rc2

- Various DT changes and sync with mainline kernel
- Various defconfig updates
- Add SPL init for zcu102 revA
- Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX
  and zc1751-dc3
- Net fixes - xlnx,phy-type
- 64bit axi ethernet support
- arasan: Fix nand write issue
- fpga fixes
- Maintainer file updates
This commit is contained in:
Tom Rini 2018-04-09 11:06:21 -04:00
parent 844fb498cc f190eaf002
commit 2600df4f8e
77 changed files with 12875 additions and 763 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
MAINTAINERS
View File

@ -264,7 +264,7 @@ F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
F: drivers/usb/host/ehci-zynq.c
F: drivers/watchdog/cdns_wdt.c
F: include/zynqmp.h
F: include/zynqpl.h
F: tools/zynqimage.c
N: zynq
@ -273,7 +273,7 @@ M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
T: git git://git.denx.de/u-boot-microblaze.git
F: arch/arm/mach-zynq/
F: drivers/clk/clk_zynq.c
F: drivers/clk/clk_zynqmp.c
F: drivers/fpga/zynqpl.c
F: drivers/gpio/zynq_gpio.c
F: drivers/i2c/i2c-cdns.c
@ -288,7 +288,7 @@ F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
F: drivers/usb/host/ehci-zynq.c
F: drivers/watchdog/cdns_wdt.c
F: include/zynqmp.h
F: include/zynqmppl.h
F: tools/zynqimage.c
N: zynqmp

11
arch/arm/dts/Makefile
View File

@ -143,16 +143,25 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zc770-xm012.dtb \
zynq-zc770-xm013.dtb \
zynq-zed.dtb \
zynq-zturn-myir.dtb \
zynq-zturn.dtb \
zynq-zybo.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-mini-emmc.dtb \
zynqmp-mini-nand.dtb \
zynqmp-zcu100-revC.dtb \
zynqmp-zcu102-revA.dtb \
zynqmp-zcu102-revB.dtb \
zynqmp-zcu102-rev1.0.dtb \
zynqmp-zcu104-revA.dtb \
zynqmp-zcu104-revC.dtb \
zynqmp-zcu106-revA.dtb \
zynqmp-zcu111-revA.dtb \
zynqmp-zc1232-revA.dtb \
zynqmp-zc1254-revA.dtb \
zynqmp-zc1275-revA.dtb \
zynqmp-zc1751-xm015-dc1.dtb \
zynqmp-zc1751-xm016-dc2.dtb \
zynqmp-zc1751-xm017-dc3.dtb \
zynqmp-zc1751-xm018-dc4.dtb \
zynqmp-zc1751-xm019-dc5.dtb
dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb \

15
arch/arm/dts/zynq-cc108.dts
View File

@ -1,13 +1,12 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx CC108 board DTS
*
* (C) Copyright 2007-2013 Xilinx, Inc.
* (C) Copyright 2007-2018 Xilinx, Inc.
* (C) Copyright 2007-2013 Michal Simek
* (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
*
* Michal SIMEK <monstr@monstr.eu>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
/include/ "zynq-7000.dtsi"
@ -70,23 +69,23 @@
label = "qspi-fsbl-uboot-bs";
reg = <0x0 0x400000>; /* 4MB */
};
partition@0x400000 {
partition@400000 {
label = "qspi-linux";
reg = <0x400000 0x400000>; /* 4MB */
};
partition@0x800000 {
partition@800000 {
label = "qspi-rootfs";
reg = <0x800000 0x400000>; /* 4MB */
};
partition@0xc00000 {
partition@c00000 {
label = "qspi-devicetree";
reg = <0xc00000 0x100000>; /* 1MB */
};
partition@0xd00000 {
partition@d00000 {
label = "qspi-scratch";
reg = <0xd00000 0x200000>; /* 2MB */
};
partition@0xf00000 {
partition@f00000 {
label = "qspi-uboot-env";
reg = <0xf00000 0x100000>; /* 1MB */
};

9
arch/arm/dts/zynq-zc702.dts
View File

@ -1,10 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx ZC702 board DTS
*
* Copyright (C) 2011 - 2015 Xilinx
* Copyright (C) 2012 National Instruments Corp.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"
@ -114,7 +111,7 @@
scl-gpios = <&gpio0 50 0>;
sda-gpios = <&gpio0 51 0>;
i2cswitch@74 {
i2c-mux@74 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
@ -154,7 +151,7 @@
#size-cells = <0>;
reg = <2>;
eeprom@54 {
compatible = "at,24c08";
compatible = "atmel,24c08";
reg = <0x54>;
};
};

9
arch/arm/dts/zynq-zc706.dts
View File

@ -1,10 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx ZC706 board DTS
*
* Copyright (C) 2011 - 2015 Xilinx
* Copyright (C) 2012 National Instruments Corp.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"
@ -65,7 +62,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0_default>;
i2cswitch@74 {
i2c-mux@74 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
@ -105,7 +102,7 @@
#size-cells = <0>;
reg = <2>;
eeprom@54 {
compatible = "at,24c08";
compatible = "atmel,24c08";
reg = <0x54>;
};
};

24
arch/arm/dts/zynq-zc770-xm010.dts
View File

@ -1,9 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx ZC770 XM010 board DTS
*
* Copyright (C) 2013 - 2015 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
* Copyright (C) 2013-2018 Xilinx, Inc.
*/
/dts-v1/;
#include "zynq-7000.dtsi"
@ -55,8 +54,8 @@
status = "okay";
clock-frequency = <400000>;
m24c02_eeprom@52 {
compatible = "at,24c02";
eeprom: eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
};
@ -75,14 +74,17 @@
num-cs = <4>;
is-decoded-cs = <0>;
flash@0 {
compatible = "sst25wf080";
compatible = "sst25wf080", "jedec,spi-nor";
reg = <1>;
spi-max-frequency = <1000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@test {
label = "spi-flash";
reg = <0x0 0x100000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "data";
reg = <0x0 0x100000>;
};
};
};
};

9
arch/arm/dts/zynq-zc770-xm011.dts
View File

@ -1,9 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx ZC770 XM013 board DTS
*
* Copyright (C) 2013 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
* Copyright (C) 2013-2018 Xilinx, Inc.
*/
/dts-v1/;
#include "zynq-7000.dtsi"
@ -42,8 +41,8 @@
status = "okay";
clock-frequency = <400000>;
m24c02_eeprom@52 {
compatible = "at,24c02";
eeprom: eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
};
};

13
arch/arm/dts/zynq-zc770-xm012.dts
View File

@ -1,9 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx ZC770 XM012 board DTS
*
* Copyright (C) 2013 - 2015 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
* Copyright (C) 2013-2018 Xilinx, Inc.
*/
/dts-v1/;
#include "zynq-7000.dtsi"
@ -38,8 +37,8 @@
status = "okay";
clock-frequency = <400000>;
m24c02_eeprom@52 {
compatible = "at,24c02";
eeprom0: eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
};
};
@ -48,8 +47,8 @@
status = "okay";
clock-frequency = <400000>;
m24c02_eeprom@52 {
compatible = "at,24c02";
eeprom1: eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
};
};

5
arch/arm/dts/zynq-zc770-xm013.dts
View File

@ -1,9 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx ZC770 XM013 board DTS
*
* Copyright (C) 2013 Xilinx, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"
@ -68,7 +67,7 @@
status = "okay";
num-cs = <4>;
is-decoded-cs = <0>;
eeprom: at25@0 {
eeprom: eeprom@0 {
at25,byte-len = <8192>;
at25,addr-mode = <2>;
at25,page-size = <32>;

5
arch/arm/dts/zynq-zed.dts
View File

@ -1,10 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Xilinx ZED board DTS
*
* Copyright (C) 2011 - 2015 Xilinx
* Copyright (C) 2012 National Instruments Corp.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"

61
arch/arm/dts/zynq-zturn-myir.dts → arch/arm/dts/zynq-zturn.dts
View File

@ -1,3 +1,4 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2015 Andrea Merello <adnrea.merello@gmail.com>
* Copyright (C) 2017 Alexander Graf <agraf@suse.de>
@ -6,31 +7,23 @@
* Copyright (C) 2011 - 2014 Xilinx
* Copyright (C) 2012 National Instruments Corp.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "zynq-7000.dtsi"
/ {
model = "Zynq Z-Turn MYIR Board";
compatible = "xlnx,zynq-7000";
compatible = "myir,zynq-zturn", "xlnx,zynq-7000";
aliases {
ethernet0 = &gem0;
serial0 = &uart1;
serial1 = &uart0;
spi0 = &qspi;
mmc0 = &sdhci0;
};
memory {
memory@0 {
device_type = "memory";
reg = <0x0 0x40000000>;
};
@ -41,52 +34,23 @@
gpio-leds {
compatible = "gpio-leds";
led_r {
label = "led_r";
gpios = <&gpio0 0x72 0x1>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led_g {
label = "led_g";
gpios = <&gpio0 0x73 0x1>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
led_b {
label = "led_b";
gpios = <&gpio0 0x74 0x1>;
default-state = "on";
linux,default-trigger = "heartbeat";
};
usr_led1 {
label = "usr_led1";
usr-led1 {
label = "usr-led1";
gpios = <&gpio0 0x0 0x1>;
default-state = "off";
linux,default-trigger = "none";
};
usr_led2 {
label = "usr_led2";
usr-led2 {
label = "usr-led2";
gpios = <&gpio0 0x9 0x1>;
default-state = "off";
linux,default-trigger = "none";
};
};
gpio-beep {
compatible = "gpio-beeper";
label = "pl-beep";
gpios = <&gpio0 0x75 0x0>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <0x1>;
#size-cells = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
K1 {
label = "K1";
@ -100,7 +64,6 @@
&clkc {
ps-clk-frequency = <33333333>;
fclk-enable = <0xf>;
};
&qspi {
@ -152,8 +115,8 @@
reg = <0x49>;
};
adxl345@53 {
compatible = "adi,adxl34x", "adxl34x";
accelerometer@53 {
compatible = "adi,adxl345", "adxl345", "adi,adxl34x", "adxl34x";
reg = <0x53>;
interrupt-parent = <&intc>;
interrupts = <0x0 0x1e 0x4>;

5
arch/arm/dts/zynq-zybo.dts
View File

@ -1,10 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Digilent ZYBO board DTS
*
* Copyright (C) 2011 - 2015 Xilinx
* Copyright (C) 2012 National Instruments Corp.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"

3
arch/arm/dts/zynqmp-clk-ccf.dtsi
View File

@ -1,11 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Clock specification for Xilinx ZynqMP
*
* (C) Copyright 2017, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/ {

6
arch/arm/dts/zynqmp-clk.dtsi
View File

@ -1,11 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Clock specification for Xilinx ZynqMP
*
* (C) Copyright 2015, Xilinx, Inc.
* (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/ {
@ -26,6 +25,7 @@
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
u-boot,dm-pre-reloc;
};
clk250: clk250 {

87
arch/arm/dts/zynqmp-zc1232-revA.dts Normal file
View File

@ -0,0 +1,87 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZC1232
*
* (C) Copyright 2017 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/phy/phy.h>
/ {
model = "ZynqMP ZC1232 RevA";
compatible = "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232", "xlnx,zynqmp";
aliases {
serial0 = &uart0;
serial1 = &dcc;
spi0 = &qspi;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
};
&dcc {
status = "okay";
};
&qspi {
status = "okay";
flash@0 {
compatible = "m25p80"; /* 32MB FIXME */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@qspi-fsbl-uboot { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
partition@qspi-linux { /* for testing purpose */
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
partition@qspi-device-tree { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
partition@qspi-rootfs { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
};
};
&sata {
status = "okay";
/* SATA OOB timing settings */
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
phy-names = "sata-phy";
phys = <&lane0 PHY_TYPE_SATA 0 0 125000000>, <&lane1 PHY_TYPE_SATA 1 1 125000000>;
};
&uart0 {
status = "okay";
};

72
arch/arm/dts/zynqmp-zc1254-revA.dts Normal file
View File

@ -0,0 +1,72 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZC1254
*
* (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
/ {
model = "ZynqMP ZC1254 RevA";
compatible = "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254", "xlnx,zynqmp";
aliases {
serial0 = &uart0;
serial1 = &dcc;
spi0 = &qspi;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
};
&dcc {
status = "okay";
};
&qspi {
status = "okay";
flash@0 {
compatible = "m25p80"; /* 32MB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@qspi-fsbl-uboot { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
partition@qspi-linux { /* for testing purpose */
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
partition@qspi-device-tree { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
partition@qspi-rootfs { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
};
};
&uart0 {
status = "okay";
};

72
arch/arm/dts/zynqmp-zc1275-revA.dts Normal file
View File

@ -0,0 +1,72 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZC1275
*
* (C) Copyright 2017 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
/ {
model = "ZynqMP ZC1275 RevA";
compatible = "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275", "xlnx,zynqmp";
aliases {
serial0 = &uart0;
serial1 = &dcc;
spi0 = &qspi;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
};
&dcc {
status = "okay";
};
&qspi {
status = "okay";
flash@0 {
compatible = "m25p80"; /* 32MB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@qspi-fsbl-uboot { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
partition@qspi-linux { /* for testing purpose */
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
partition@qspi-device-tree { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
partition@qspi-rootfs { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
};
};
&uart0 {
status = "okay";
};

11
arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
View File

@ -1,11 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP zc1751-xm015-dc1
*
* (C) Copyright 2015, Xilinx, Inc.
* (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@ -40,7 +39,6 @@
};
};
/* fpd_dma clk 667MHz, lpd_dma 500MHz */
&fpd_dma_chan1 {
status = "okay";
};
@ -93,8 +91,9 @@
&i2c1 {
status = "okay";
clock-frequency = <400000>;
eeprom@55 {
compatible = "at,24c64"; /* 24AA64 */
eeprom: eeprom@55 {
compatible = "atmel,24c64"; /* 24AA64 */
reg = <0x55>;
};
};

22
arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
View File

@ -1,11 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP zc1751-xm016-dc2
*
* (C) Copyright 2015, Xilinx, Inc.
* (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@ -50,7 +49,6 @@
status = "okay";
};
/* fpd_dma clk 667MHz, lpd_dma 500MHz */
&fpd_dma_chan1 {
status = "okay";
};
@ -180,15 +178,15 @@
&spi0 {
status = "okay";
num-cs = <1>;
spi0_flash0: spi0_flash0@0 {
compatible = "m25p80";
spi0_flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "sst,sst25wf080", "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
spi0_flash0@0 {
label = "spi0_flash0";
partition@0 {
label = "data";
reg = <0x0 0x100000>;
};
};
@ -197,15 +195,15 @@
&spi1 {
status = "okay";
num-cs = <1>;
spi1_flash0: spi1_flash0@0 {
compatible = "mtd_dataflash";
spi1_flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at45db041e", "atmel,at45", "atmel,dataflash";
spi-max-frequency = <20000000>;
reg = <0>;
spi1_flash0@0 {
label = "spi1_flash0";
partition@0 {
label = "data";
reg = <0x0 0x84000>;
};
};

210
arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts Normal file
View File

@ -0,0 +1,210 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP zc1751-xm017-dc3
*
* (C) Copyright 2016 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
/ {
model = "ZynqMP zc1751-xm017-dc3 RevA";
compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
aliases {
ethernet0 = &gem0;
gpio0 = &gpio;
i2c0 = &i2c0;
i2c1 = &i2c1;
mmc0 = &sdhci1;
rtc0 = &rtc;
serial0 = &uart0;
serial1 = &uart1;
usb0 = &usb0;
usb1 = &usb1;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
};
};
&fpd_dma_chan1 {
status = "okay";
};
&fpd_dma_chan2 {
status = "okay";
};
&fpd_dma_chan3 {
status = "okay";
};
&fpd_dma_chan4 {
status = "okay";
};
&fpd_dma_chan5 {
status = "okay";
};
&fpd_dma_chan6 {
status = "okay";
};
&fpd_dma_chan7 {
status = "okay";
};
&fpd_dma_chan8 {
status = "okay";
};
&gem0 {
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
phy0: phy@0 { /* VSC8211 */
reg = <0>;
};
};
&gpio {
status = "okay";
};
/* just eeprom here */
&i2c0 {
status = "okay";
clock-frequency = <400000>;
tca6416_u26: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
/* IRQ not connected */
};
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
/* eeprom24c02 and SE98A temp chip pca9306 */
&i2c1 {
status = "okay";
clock-frequency = <400000>;
};
/* MT29F64G08AECDBJ4-6 */
&nand0 {
status = "okay";
arasan,has-mdma;
num-cs = <2>;
partition@0 { /* for testing purpose */
label = "nand-fsbl-uboot";
reg = <0x0 0x0 0x400000>;
};
partition@1 { /* for testing purpose */
label = "nand-linux";
reg = <0x0 0x400000 0x1400000>;
};
partition@2 { /* for testing purpose */
label = "nand-device-tree";
reg = <0x0 0x1800000 0x400000>;
};
partition@3 { /* for testing purpose */
label = "nand-rootfs";
reg = <0x0 0x1C00000 0x1400000>;
};
partition@4 { /* for testing purpose */
label = "nand-bitstream";
reg = <0x0 0x3000000 0x400000>;
};
partition@5 { /* for testing purpose */
label = "nand-misc";
reg = <0x0 0x3400000 0xFCC00000>;
};
partition@6 { /* for testing purpose */
label = "nand1-fsbl-uboot";
reg = <0x1 0x0 0x400000>;
};
partition@7 { /* for testing purpose */
label = "nand1-linux";
reg = <0x1 0x400000 0x1400000>;
};
partition@8 { /* for testing purpose */
label = "nand1-device-tree";
reg = <0x1 0x1800000 0x400000>;
};
partition@9 { /* for testing purpose */
label = "nand1-rootfs";
reg = <0x1 0x1C00000 0x1400000>;
};
partition@10 { /* for testing purpose */
label = "nand1-bitstream";
reg = <0x1 0x3000000 0x400000>;
};
partition@11 { /* for testing purpose */
label = "nand1-misc";
reg = <0x1 0x3400000 0xFCC00000>;
};
};
&rtc {
status = "okay";
};
&sata {
status = "okay";
/* SATA phy OOB timing settings */
ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
};
&sdhci1 { /* emmc with some settings */
status = "okay";
};
/* main */
&uart0 {
status = "okay";
};
/* DB9 */
&uart1 {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
/* ULPI SMSC USB3320 */
&usb1 {
status = "okay";
dr_mode = "host";
};

6
arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
View File

@ -1,11 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP zc1751-xm018-dc4
*
* (C) Copyright 2015 - 2016, Xilinx, Inc.
* (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@ -52,7 +51,6 @@
status = "okay";
};
/* fpd_dma clk 667MHz, lpd_dma 500MHz */
&fpd_dma_chan1 {
status = "okay";
};

25
arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
View File

@ -1,12 +1,11 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP zc1751-xm019-dc5
*
* (C) Copyright 2015, Xilinx, Inc.
* (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
@ -38,7 +37,6 @@
};
};
/* fpd_dma clk 667MHz, lpd_dma 500MHz */
&fpd_dma_chan1 {
status = "okay";
};
@ -84,18 +82,33 @@
status = "okay";
};
/* FIXME: Add device */
&i2c0 {
status = "okay";
};
/* FIXME: Add device */
&i2c1 {
status = "okay";
};
&sdhci0 {
status = "okay";
no-1-8-v;
};
&ttc0 {
status = "okay";
};
&ttc1 {
status = "okay";
};
&ttc2 {
status = "okay";
};
&ttc3 {
status = "okay";
};
&uart0 {

343
arch/arm/dts/zynqmp-zcu100-revC.dts Normal file
View File

@ -0,0 +1,343 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU100 revC
*
* (C) Copyright 2016 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Nathalie Chan King Choy
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
/ {
model = "ZynqMP ZCU100 RevC";
compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
aliases {
gpio0 = &gpio;
i2c0 = &i2c1;
rtc0 = &rtc;
serial0 = &uart1;
serial1 = &uart0;
serial2 = &dcc;
spi0 = &spi0;
spi1 = &spi1;
usb0 = &usb0;
usb1 = &usb1;
mmc0 = &sdhci0;
mmc1 = &sdhci1;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
sw4 {
label = "sw4";
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
autorepeat;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>,
<&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>,
<&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>,
<&xilinx_ams 9>, <&xilinx_ams 10>,
<&xilinx_ams 11>, <&xilinx_ams 12>;
};
leds {
compatible = "gpio-leds";
ds2 {
label = "ds2";
gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
ds3 {
label = "ds3";
gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx"; /* WLAN tx */
default-state = "off";
};
ds4 {
label = "ds4";
gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0rx"; /* WLAN rx */
default-state = "off";
};
ds5 {
label = "ds5";
gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "bluetooth-power";
};
vbus_det { /* U5 USB5744 VBUS detection via MIO25 */
label = "vbus_det";
gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
ltc2954: ltc2954 { /* U7 */
compatible = "lltc,ltc2954", "lltc,ltc2952";
trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */
/* If there is HW watchdog on mezzanine this signal should be connected there */
watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */
kill-gpios = <&gpio 34 GPIO_ACTIVE_LOW>; /* KILL signal - output */
};
wmmcsdio_fixed: fixedregulator-mmcsdio {
compatible = "regulator-fixed";
regulator-name = "wmmcsdio_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
sdio_pwrseq: sdio_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
};
};
&dcc {
status = "okay";
};
&gpio {
status = "okay";
gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
"I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
"SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
"SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
"PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
"VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
"DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
"", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
"GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
"GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
"SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
"USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
"USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
"USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
"USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
"USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
"", "",
"", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "", "", "",
"", "", "", "";
};
&gpu {
status = "okay";
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
i2c-mux@75 { /* u11 */
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2csw_0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
label = "LS-I2C0";
};
i2csw_1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
label = "LS-I2C1";
};
i2csw_2: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
label = "HS-I2C2";
};
i2csw_3: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
label = "HS-I2C3";
};
i2csw_4: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4>;
pmic: pmic@5e { /* Custom TI PMIC u33 */
compatible = "ti,tps65086";
reg = <0x5e>;
interrupt-parent = <&gpio>;
interrupts = <77 GPIO_ACTIVE_LOW>;
#gpio-cells = <2>;
gpio-controller;
};
};
i2csw_5: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
/* PS_PMBUS */
ina226@40 { /* u35 */
compatible = "ti,ina226";
reg = <0x40>;
shunt-resistor = <10000>;
/* MIO31 is alert which should be routed to PMUFW */
};
};
i2csw_6: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
/*
* Not Connected
*/
};
i2csw_7: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
/*
* usb5744 (DNP) - U5
* 100kHz - this is default freq for us
*/
};
};
};
&rtc {
status = "okay";
};
/* SD0 only supports 3.3V, no level shifter */
&sdhci0 {
status = "okay";
no-1-8-v;
broken-cd; /* CD has to be enabled by default */
disable-wp;
xlnx,mio_bank = <0>;
};
&sdhci1 {
status = "okay";
bus-width = <0x4>;
xlnx,mio_bank = <0>;
non-removable;
disable-wp;
cap-power-off-card;
mmc-pwrseq = <&sdio_pwrseq>;
vqmmc-supply = <&wmmcsdio_fixed>;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wifi@2 {
compatible = "ti,wl1831";
reg = <2>;
interrupt-parent = <&gpio>;
interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
};
};
&serdes {
status = "okay";
};
&spi0 { /* Low Speed connector */
status = "okay";
label = "LS-SPI0";
};
&spi1 { /* High Speed connector */
status = "okay";
label = "HS-SPI1";
};
&uart0 {
status = "okay";
bluetooth {
compatible = "ti,wl1831-st";
enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
};
};
&uart1 {
status = "okay";
};
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
};
&dwc3_0 {
status = "okay";
dr_mode = "peripheral";
phy-names = "usb3-phy";
phys = <&lane2 PHY_TYPE_USB3 0 0 26000000>;
maximum-speed = "super-speed";
};
/* ULPI SMSC USB3320 */
&usb1 {
status = "okay";
};
&dwc3_1 {
status = "okay";
dr_mode = "host";
phy-names = "usb3-phy";
phys = <&lane3 PHY_TYPE_USB3 1 0 26000000>;
maximum-speed = "super-speed";
};
&watchdog0 {
status = "okay";
};
&xilinx_ams {
status = "okay";
};
&ams_ps {
status = "okay";
};

15
arch/arm/dts/zynqmp-zcu102-rev1.0.dts
View File

@ -1,11 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU102 Rev1.0
*
* (C) Copyright 2016, Xilinx, Inc.
* (C) Copyright 2016 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "zynqmp-zcu102-revB.dts"
@ -15,23 +14,23 @@
compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
};
&eeprom {
&eeprom {
#address-cells = <1>;
#size-cells = <1>;
board_sn: board_sn@0 {
board_sn: board-sn@0 {
reg = <0x0 0x14>;
};
eth_mac: eth_mac@20 {
eth_mac: eth-mac@20 {
reg = <0x20 0x6>;
};
board_name: board_name@d0 {
board_name: board-name@d0 {
reg = <0xd0 0x6>;
};
board_revision: board_revision@e0 {
board_revision: board-revision@e0 {
reg = <0xe0 0x3>;
};
};

397
arch/arm/dts/zynqmp-zcu102-revA.dts
View File

@ -1,19 +1,18 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU102 RevA
*
* (C) Copyright 2015, Xilinx, Inc.
* (C) Copyright 2015 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
#include <dt-bindings/phy/phy.h>
/ {
@ -52,7 +51,7 @@
sw19 {
label = "sw19";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
linux,code = <108>; /* down */
linux,code = <KEY_DOWN>;
gpio-key,wakeup;
autorepeat;
};
@ -70,15 +69,12 @@
&can1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_default>;
};
&dcc {
status = "okay";
};
/* fpd_dma clk 667MHz, lpd_dma 500MHz */
&fpd_dma_chan1 {
status = "okay";
};
@ -115,8 +111,6 @@
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gem3_default>;
phy0: phy@21 {
reg = <21>;
ti,rx-internal-delay = <0x8>;
@ -127,8 +121,6 @@
&gpio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_default>;
};
&gpu {
@ -138,19 +130,8 @@
&i2c0 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c0_default>;
pinctrl-1 = <&pinctrl_i2c0_gpio>;
scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
tca6416_u97: gpio@20 {
/*
* Enable all GTs to out from U-Boot
* i2c mw 20 6 0 - setup IO to output
* i2c mw 20 2 ef - setup output values on pins 0-7
* i2c mw 20 3 ff - setup output values on pins 10-17
*/
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller;
@ -194,7 +175,7 @@
};
};
tca6416_u61: gpio@21 { /* FIXME enable it by i2c mw 21 6 0 */
tca6416_u61: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
@ -220,12 +201,12 @@
*/
};
i2cswitch@75 { /* u60 */
i2c-mux@75 { /* u60 */
compatible = "nxp,pca9544";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c@0 { /* i2c mw 75 0 1 */
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
@ -281,7 +262,7 @@
shunt-resistor = <5000>;
};
};
i2c@1 { /* i2c mw 75 0 1 */
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
@ -327,97 +308,85 @@
shunt-resistor = <5000>;
};
};
i2c@2 { /* i2c mw 75 0 1 */
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
/* MAXIM_PMBUS - 00 */
max15301@a { /* u46 */
compatible = "max15301";
compatible = "maxim,max15301";
reg = <0xa>;
};
max15303@b { /* u4 */
compatible = "max15303";
compatible = "maxim,max15303";
reg = <0xb>;
};
max15303@10 { /* u13 */
compatible = "max15303";
compatible = "maxim,max15303";
reg = <0x10>;
};
max15301@13 { /* u47 */
compatible = "max15301";
compatible = "maxim,max15301";
reg = <0x13>;
};
max15303@14 { /* u7 */
compatible = "max15303";
compatible = "maxim,max15303";
reg = <0x14>;
};
max15303@15 { /* u6 */
compatible = "max15303";
compatible = "maxim,max15303";
reg = <0x15>;
};
max15303@16 { /* u10 */
compatible = "max15303";
compatible = "maxim,max15303";
reg = <0x16>;
};
max15303@17 { /* u9 */
compatible = "max15303";
compatible = "maxim,max15303";
reg = <0x17>;
};
max15301@18 { /* u63 */
compatible = "max15301";
compatible = "maxim,max15301";
reg = <0x18>;
};
max15303@1a { /* u49 */
compatible = "max15303";
compatible = "maxim,max15303";
reg = <0x1a>;
};
max15303@1d { /* u18 */
compatible = "max15303";
compatible = "maxim,max15303";
reg = <0x1d>;
};
max15303@20 { /* u8 */
compatible = "max15303";
compatible = "maxim,max15303";
status = "disabled"; /* unreachable */
reg = <0x20>;
};
/* drivers/hwmon/pmbus/Kconfig:86: be called max20751.
drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
*/
max20751@72 { /* u95 FIXME - not detected */
compatible = "max20751";
max20751@72 { /* u95 */
compatible = "maxim,max20751";
reg = <0x72>;
};
max20751@73 { /* u96 FIXME - not detected */
compatible = "max20751";
max20751@73 { /* u96 */
compatible = "maxim,max20751";
reg = <0x73>;
};
};
/* Bus 3 is not connected */
};
/* FIXME PMOD - j160 */
/* FIXME MSP430F - u41 - not detected */
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1_default>;
pinctrl-1 = <&pinctrl_i2c1_gpio>;
scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
/* FIXME PL i2c via PCA9306 - u45 */
/* FIXME MSP430 - u41 - not detected */
i2cswitch@74 { /* u34 */
/* PL i2c via PCA9306 - u45 */
i2c-mux@74 { /* u34 */
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
i2c@0 { /* i2c mw 74 0 1 */
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
@ -430,25 +399,25 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
* 768B - 1024B address 0x57
*/
eeprom: eeprom@54 { /* u23 */
compatible = "at,24c08";
compatible = "atmel,24c08";
reg = <0x54>;
};
};
i2c@1 { /* i2c mw 74 0 2 */
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
si5341: clock-generator1@36 { /* SI5341 - u69 */
compatible = "si5341";
si5341: clock-generator@36 { /* SI5341 - u69 */
compatible = "silabs,si5341";
reg = <0x36>;
};
};
i2c@2 { /* i2c mw 74 0 4 */
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
si570_1: clock-generator2@5d { /* USER SI570 - u42 */
si570_1: clock-generator@5d { /* USER SI570 - u42 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x5d>;
@ -457,11 +426,11 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
clock-frequency = <300000000>;
};
};
i2c@3 { /* i2c mw 74 0 8 */
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
si570_2: clock-generator3@5d { /* USER MGT SI570 - u56 */
si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x5d>;
@ -470,11 +439,11 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
clock-frequency = <148500000>;
};
};
i2c@4 { /* i2c mw 74 0 10 */
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
si5328: clock-generator4@69 {/* SI5328 - u20 */
si5328: clock-generator@69 {/* SI5328 - u20 */
compatible = "silabs,si5328";
reg = <0x69>;
/*
@ -487,7 +456,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
/* 5 - 7 unconnected */
};
i2cswitch@75 {
i2c-mux@75 {
compatible = "nxp,pca9548"; /* u135 */
#address-cells = <1>;
#size-cells = <0>;
@ -511,29 +480,24 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
reg = <2>;
/* SYSMON */
};
i2c@3 { /* i2c mw 75 0 8 */
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
/* DDR4 SODIMM */
dev@19 { /* u-boot detection */
compatible = "xxx";
dev@19 {
reg = <0x19>;
};
dev@30 { /* u-boot detection */
compatible = "xxx";
dev@30 {
reg = <0x30>;
};
dev@35 { /* u-boot detection */
compatible = "xxx";
dev@35 {
reg = <0x35>;
};
dev@36 { /* u-boot detection */
compatible = "xxx";
dev@36 {
reg = <0x36>;
};
dev@51 { /* u-boot detection - maybe SPD */
compatible = "xxx";
dev@51 {
reg = <0x51>;
};
};
@ -564,269 +528,6 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
};
};
&pinctrl0 {
status = "okay";
pinctrl_i2c0_default: i2c0-default {
mux {
groups = "i2c0_3_grp";
function = "i2c0";
};
conf {
groups = "i2c0_3_grp";
bias-pull-up;
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
};
pinctrl_i2c0_gpio: i2c0-gpio {
mux {
groups = "gpio0_14_grp", "gpio0_15_grp";
function = "gpio0";
};
conf {
groups = "gpio0_14_grp", "gpio0_15_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
};
pinctrl_i2c1_default: i2c1-default {
mux {
groups = "i2c1_4_grp";
function = "i2c1";
};
conf {
groups = "i2c1_4_grp";
bias-pull-up;
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
};
pinctrl_i2c1_gpio: i2c1-gpio {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
};
conf {
groups = "gpio0_16_grp", "gpio0_17_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
};
pinctrl_uart0_default: uart0-default {
mux {
groups = "uart0_4_grp";
function = "uart0";
};
conf {
groups = "uart0_4_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
conf-rx {
pins = "MIO18";
bias-high-impedance;
};
conf-tx {
pins = "MIO19";
bias-disable;
};
};
pinctrl_uart1_default: uart1-default {
mux {
groups = "uart1_5_grp";
function = "uart1";
};
conf {
groups = "uart1_5_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
conf-rx {
pins = "MIO21";
bias-high-impedance;
};
conf-tx {
pins = "MIO20";
bias-disable;
};
};
pinctrl_usb0_default: usb0-default {
mux {
groups = "usb0_0_grp";
function = "usb0";
};
conf {
groups = "usb0_0_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
conf-rx {
pins = "MIO52", "MIO53", "MIO55";
bias-high-impedance;
};
conf-tx {
pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
"MIO60", "MIO61", "MIO62", "MIO63";
bias-disable;
};
};
pinctrl_gem3_default: gem3-default {
mux {
function = "ethernet3";
groups = "ethernet3_0_grp";
};
conf {
groups = "ethernet3_0_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
conf-rx {
pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74",
"MIO75";
bias-high-impedance;
low-power-disable;
};
conf-tx {
pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68",
"MIO69";
bias-disable;
low-power-enable;
};
mux-mdio {
function = "mdio3";
groups = "mdio3_0_grp";
};
conf-mdio {
groups = "mdio3_0_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
bias-disable;
};
};
pinctrl_can1_default: can1-default {
mux {
function = "can1";
groups = "can1_6_grp";
};
conf {
groups = "can1_6_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
conf-rx {
pins = "MIO25";
bias-high-impedance;
};
conf-tx {
pins = "MIO24";
bias-disable;
};
};
pinctrl_sdhci1_default: sdhci1-default {
mux {
groups = "sdio1_0_grp";
function = "sdio1";
};
conf {
groups = "sdio1_0_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
bias-disable;
};
mux-cd {
groups = "sdio1_0_cd_grp";
function = "sdio1_cd";
};
conf-cd {
groups = "sdio1_0_cd_grp";
bias-high-impedance;
bias-pull-up;
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
mux-wp {
groups = "sdio1_0_wp_grp";
function = "sdio1_wp";
};
conf-wp {
groups = "sdio1_0_wp_grp";
bias-high-impedance;
bias-pull-up;
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
};
pinctrl_gpio_default: gpio-default {
mux-sw {
function = "gpio0";
groups = "gpio0_22_grp", "gpio0_23_grp";
};
conf-sw {
groups = "gpio0_22_grp", "gpio0_23_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
mux-msp {
function = "gpio0";
groups = "gpio0_13_grp", "gpio0_38_grp";
};
conf-msp {
groups = "gpio0_13_grp", "gpio0_38_grp";
slew-rate = <SLEW_RATE_SLOW>;
io-standard = <IO_STANDARD_LVCMOS18>;
};
conf-pull-up {
pins = "MIO22", "MIO23";
bias-pull-up;
};
conf-pull-none {
pins = "MIO13", "MIO38";
bias-disable;
};
};
};
&pcie {
status = "okay";
};
@ -883,8 +584,6 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhci1_default>;
no-1-8-v; /* for 1.0 silicon */
xlnx,mio_bank = <1>;
};
@ -895,21 +594,15 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
};
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0_default>;
};
&dwc3_0 {

11
arch/arm/dts/zynqmp-zcu102-revB.dts
View File

@ -1,11 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU102 RevB
*
* (C) Copyright 2016, Xilinx, Inc.
* (C) Copyright 2016 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "zynqmp-zcu102-revA.dts"
@ -27,14 +26,12 @@
/delete-node/ phy@21;
};
/* Different qspi 512Mbit version */
/* Fix collision with u61 */
&i2c0 {
i2cswitch@75 {
i2c-mux@75 {
i2c@2 {
max15303@1b { /* u8 */
compatible = "max15303";
compatible = "maxim,max15303";
reg = <0x1b>;
};
/delete-node/ max15303@20;

265
arch/arm/dts/zynqmp-zcu104-revA.dts Normal file
View File

@ -0,0 +1,265 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU104
*
* (C) Copyright 2017 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
/ {
model = "ZynqMP ZCU104 RevA";
compatible = "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104", "xlnx,zynqmp";
aliases {
ethernet0 = &gem3;
gpio0 = &gpio;
i2c0 = &i2c1;
mmc0 = &sdhci1;
rtc0 = &rtc;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &dcc;
spi0 = &qspi;
usb0 = &usb0;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
};
&can1 {
status = "okay";
};
&dcc {
status = "okay";
};
&gem3 {
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
phy0: phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
};
};
&gpio {
status = "okay";
};
&gpu {
status = "okay";
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
/* Another connection to this bus via PL i2c via PCA9306 - u45 */
i2c-mux@74 { /* u34 */
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/*
* IIC_EEPROM 1kB memory which uses 256B blocks
* where every block has different address.
* 0 - 256B address 0x54
* 256B - 512B address 0x55
* 512B - 768B address 0x56
* 768B - 1024B address 0x57
*/
eeprom: eeprom@54 { /* u23 */
compatible = "atmel,24c08";
reg = <0x54>;
#address-cells = <1>;
#size-cells = <1>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
clock_8t49n287: clock-generator@6c { /* 8T49N287 - u182 */
compatible = "idt,8t49n287";
reg = <0x6c>;
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
irps5401_43: irps54012@43 { /* IRPS5401 - u175 */
#clock-cells = <0>;
compatible = "infineon,irps5401";
reg = <0x43>;
};
irps5401_4d: irps54012@4d { /* IRPS5401 - u180 */
#clock-cells = <0>;
compatible = "infineon,irps5401";
reg = <0x4d>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
tca6416_u97: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
/*
* IRQ not connected
* Lines:
* 0 - IRPS5401_ALERT_B
* 1 - HDMI_8T49N241_INT_ALM
* 2 - MAX6643_OT_B
* 3 - MAX6643_FANFAIL_B
* 5 - IIC_MUX_RESET_B
* 6 - GEM3_EXP_RESET_B
* 7 - FMC_LPC_PRSNT_M2C_B
* 4, 10 - 17 - not connected
*/
};
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
/* 3, 6 not connected */
};
};
&qspi {
status = "okay";
flash@0 {
compatible = "m25p80"; /* n25q512a 128MiB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@qspi-fsbl-uboot { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
partition@qspi-linux { /* for testing purpose */
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
partition@qspi-device-tree { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
partition@qspi-rootfs { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
};
};
&rtc {
status = "okay";
};
&sata {
status = "okay";
/* SATA OOB timing settings */
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
phy-names = "sata-phy";
phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
no-1-8-v;
xlnx,mio_bank = <1>;
disable-wp;
};
&serdes {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
};
&dwc3_0 {
status = "okay";
dr_mode = "host";
snps,usb3_lpm_capable;
phy-names = "usb3-phy";
phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
maximum-speed = "super-speed";
};
&watchdog0 {
status = "okay";
};
&xilinx_ams {
status = "okay";
};
&ams_ps {
status = "okay";
};
&ams_pl {
status = "okay";
};

266
arch/arm/dts/zynqmp-zcu104-revC.dts Normal file
View File

@ -0,0 +1,266 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU104
*
* (C) Copyright 2017 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
/ {
model = "ZynqMP ZCU104 RevC";
compatible = "xlnx,zynqmp-zcu104-revC", "xlnx,zynqmp-zcu104", "xlnx,zynqmp";
aliases {
ethernet0 = &gem3;
gpio0 = &gpio;
i2c0 = &i2c1;
mmc0 = &sdhci1;
rtc0 = &rtc;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &dcc;
spi0 = &qspi;
usb0 = &usb0;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
};
&can1 {
status = "okay";
};
&dcc {
status = "okay";
};
&gem3 {
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
phy0: phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
};
};
&gpio {
status = "okay";
};
&gpu {
status = "okay";
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
tca6416_u97: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
/*
* IRQ not connected
* Lines:
* 0 - IRPS5401_ALERT_B
* 1 - HDMI_8T49N241_INT_ALM
* 2 - MAX6643_OT_B
* 3 - MAX6643_FANFAIL_B
* 5 - IIC_MUX_RESET_B
* 6 - GEM3_EXP_RESET_B
* 7 - FMC_LPC_PRSNT_M2C_B
* 4, 10 - 17 - not connected
*/
};
/* Another connection to this bus via PL i2c via PCA9306 - u45 */
i2c-mux@74 { /* u34 */
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/*
* IIC_EEPROM 1kB memory which uses 256B blocks
* where every block has different address.
* 0 - 256B address 0x54
* 256B - 512B address 0x55
* 512B - 768B address 0x56
* 768B - 1024B address 0x57
*/
eeprom: eeprom@54 { /* u23 */
compatible = "atmel,24c08";
reg = <0x54>;
#address-cells = <1>;
#size-cells = <1>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
clock_8t49n287: clock-generator@6c { /* 8T49N287 - u182 */
compatible = "idt,8t49n287";
reg = <0x6c>;
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
irps5401_43: irps54012@43 { /* IRPS5401 - u175 */
#clock-cells = <0>;
compatible = "infineon,irps5401";
reg = <0x43>;
};
irps5401_4d: irps54012@4d { /* IRPS5401 - u180 */
#clock-cells = <0>;
compatible = "infineon,irps5401";
reg = <0x4d>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
};
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
};
/* 3, 6 not connected */
};
};
&qspi {
status = "okay";
flash@0 {
compatible = "m25p80"; /* n25q512a 128MiB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@qspi-fsbl-uboot { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
partition@qspi-linux { /* for testing purpose */
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
partition@qspi-device-tree { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
partition@qspi-rootfs { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
};
};
&rtc {
status = "okay";
};
&sata {
status = "okay";
/* SATA OOB timing settings */
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
phy-names = "sata-phy";
phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
no-1-8-v;
xlnx,mio_bank = <1>;
disable-wp;
};
&serdes {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
};
&dwc3_0 {
status = "okay";
dr_mode = "host";
snps,usb3_lpm_capable;
phy-names = "usb3-phy";
phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
maximum-speed = "super-speed";
};
&watchdog0 {
status = "okay";
};
&xilinx_ams {
status = "okay";
};
&ams_ps {
status = "okay";
};
&ams_pl {
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU106
*
* (C) Copyright 2016, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
/ {
model = "ZynqMP ZCU106 RevA";
compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
aliases {
ethernet0 = &gem3;
gpio0 = &gpio;
i2c0 = &i2c0;
i2c1 = &i2c1;
mmc0 = &sdhci1;
rtc0 = &rtc;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &dcc;
spi0 = &qspi;
usb0 = &usb0;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
sw19 {
label = "sw19";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_DOWN>;
gpio-key,wakeup;
autorepeat;
};
};
leds {
compatible = "gpio-leds";
heartbeat_led {
label = "heartbeat";
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
};
&can1 {
status = "okay";
};
&dcc {
status = "okay";
};
&fpd_dma_chan1 {
status = "okay";
};
&fpd_dma_chan2 {
status = "okay";
};
&fpd_dma_chan3 {
status = "okay";
};
&fpd_dma_chan4 {
status = "okay";
};
&fpd_dma_chan5 {
status = "okay";
};
&fpd_dma_chan6 {
status = "okay";
};
&fpd_dma_chan7 {
status = "okay";
};
&fpd_dma_chan8 {
status = "okay";
};
&gem3 {
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
phy0: phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
};
};
&gpio {
status = "okay";
};
&gpu {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
tca6416_u97: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller; /* interrupt not connected */
#gpio-cells = <2>;
/*
* IRQ not connected
* Lines:
* 0 - SFP_SI5328_INT_ALM
* 1 - HDMI_SI5328_INT_ALM
* 5 - IIC_MUX_RESET_B
* 6 - GEM3_EXP_RESET_B
* 10 - FMC_HPC0_PRSNT_M2C_B
* 11 - FMC_HPC1_PRSNT_M2C_B
* 2-4, 7, 12-17 - not connected
*/
};
tca6416_u61: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
/*
* IRQ not connected
* Lines:
* 0 - VCCPSPLL_EN
* 1 - MGTRAVCC_EN
* 2 - MGTRAVTT_EN
* 3 - VCCPSDDRPLL_EN
* 4 - MIO26_PMU_INPUT_LS
* 5 - PL_PMBUS_ALERT
* 6 - PS_PMBUS_ALERT
* 7 - MAXIM_PMBUS_ALERT
* 10 - PL_DDR4_VTERM_EN
* 11 - PL_DDR4_VPP_2V5_EN
* 12 - PS_DIMM_VDDQ_TO_PSVCCO_ON
* 13 - PS_DIMM_SUSPEND_EN
* 14 - PS_DDR4_VTERM_EN
* 15 - PS_DDR4_VPP_2V5_EN
* 16 - 17 - not connected
*/
};
i2c-mux@75 { /* u60 */
compatible = "nxp,pca9544";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* PS_PMBUS */
ina226@40 { /* u76 */
compatible = "ti,ina226";
reg = <0x40>;
shunt-resistor = <5000>;
};
ina226@41 { /* u77 */
compatible = "ti,ina226";
reg = <0x41>;
shunt-resistor = <5000>;
};
ina226@42 { /* u78 */
compatible = "ti,ina226";
reg = <0x42>;
shunt-resistor = <5000>;
};
ina226@43 { /* u87 */
compatible = "ti,ina226";
reg = <0x43>;
shunt-resistor = <5000>;
};
ina226@44 { /* u85 */
compatible = "ti,ina226";
reg = <0x44>;
shunt-resistor = <5000>;
};
ina226@45 { /* u86 */
compatible = "ti,ina226";
reg = <0x45>;
shunt-resistor = <5000>;
};
ina226@46 { /* u93 */
compatible = "ti,ina226";
reg = <0x46>;
shunt-resistor = <5000>;
};
ina226@47 { /* u88 */
compatible = "ti,ina226";
reg = <0x47>;
shunt-resistor = <5000>;
};
ina226@4a { /* u15 */
compatible = "ti,ina226";
reg = <0x4a>;
shunt-resistor = <5000>;
};
ina226@4b { /* u92 */
compatible = "ti,ina226";
reg = <0x4b>;
shunt-resistor = <5000>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* PL_PMBUS */
ina226@40 { /* u79 */
compatible = "ti,ina226";
reg = <0x40>;
shunt-resistor = <2000>;
};
ina226@41 { /* u81 */
compatible = "ti,ina226";
reg = <0x41>;
shunt-resistor = <5000>;
};
ina226@42 { /* u80 */
compatible = "ti,ina226";
reg = <0x42>;
shunt-resistor = <5000>;
};
ina226@43 { /* u84 */
compatible = "ti,ina226";
reg = <0x43>;
shunt-resistor = <5000>;
};
ina226@44 { /* u16 */
compatible = "ti,ina226";
reg = <0x44>;
shunt-resistor = <5000>;
};
ina226@45 { /* u65 */
compatible = "ti,ina226";
reg = <0x45>;
shunt-resistor = <5000>;
};
ina226@46 { /* u74 */
compatible = "ti,ina226";
reg = <0x46>;
shunt-resistor = <5000>;
};
ina226@47 { /* u75 */
compatible = "ti,ina226";
reg = <0x47>;
shunt-resistor = <5000>;
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
/* MAXIM_PMBUS - 00 */
max15301@a { /* u46 */
compatible = "maxim,max15301";
reg = <0xa>;
};
max15303@b { /* u4 */
compatible = "maxim,max15303";
reg = <0xb>;
};
max15303@10 { /* u13 */
compatible = "maxim,max15303";
reg = <0x10>;
};
max15301@13 { /* u47 */
compatible = "maxim,max15301";
reg = <0x13>;
};
max15303@14 { /* u7 */
compatible = "maxim,max15303";
reg = <0x14>;
};
max15303@15 { /* u6 */
compatible = "maxim,max15303";
reg = <0x15>;
};
max15303@16 { /* u10 */
compatible = "maxim,max15303";
reg = <0x16>;
};
max15303@17 { /* u9 */
compatible = "maxim,max15303";
reg = <0x17>;
};
max15301@18 { /* u63 */
compatible = "maxim,max15301";
reg = <0x18>;
};
max15303@1a { /* u49 */
compatible = "maxim,max15303";
reg = <0x1a>;
};
max15303@1b { /* u8 */
compatible = "maxim,max15303";
reg = <0x1b>;
};
max15303@1d { /* u18 */
compatible = "maxim,max15303";
reg = <0x1d>;
};
max20751@72 { /* u95 */
compatible = "maxim,max20751";
reg = <0x72>;
};
max20751@73 { /* u96 */
compatible = "maxim,max20751";
reg = <0x73>;
};
};
/* Bus 3 is not connected */
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
/* PL i2c via PCA9306 - u45 */
i2c-mux@74 { /* u34 */
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/*
* IIC_EEPROM 1kB memory which uses 256B blocks
* where every block has different address.
* 0 - 256B address 0x54
* 256B - 512B address 0x55
* 512B - 768B address 0x56
* 768B - 1024B address 0x57
*/
eeprom: eeprom@54 { /* u23 */
compatible = "atmel,24c08";
reg = <0x54>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
si5341: clock-generator@36 { /* SI5341 - u69 */
compatible = "si5341";
reg = <0x36>;
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
si570_1: clock-generator@5d { /* USER SI570 - u42 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x5d>;
temperature-stability = <50>;
factory-fout = <300000000>;
clock-frequency = <300000000>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x5d>;
temperature-stability = <50>; /* copy from zc702 */
factory-fout = <156250000>;
clock-frequency = <148500000>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
si5328: clock-generator@69 {/* SI5328 - u20 */
compatible = "silabs,si5328";
reg = <0x69>;
};
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>; /* FAN controller */
temp@4c {/* lm96163 - u128 */
compatible = "national,lm96163";
reg = <0x4c>;
};
};
/* 6 - 7 unconnected */
};
i2c-mux@75 {
compatible = "nxp,pca9548"; /* u135 */
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* HPC0_IIC */
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* HPC1_IIC */
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
/* SYSMON */
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
/* DDR4 SODIMM */
dev@19 { /* u-boot detection */
compatible = "xxx";
reg = <0x19>;
};
dev@30 { /* u-boot detection */
compatible = "xxx";
reg = <0x30>;
};
dev@35 { /* u-boot detection */
compatible = "xxx";
reg = <0x35>;
};
dev@36 { /* u-boot detection */
compatible = "xxx";
reg = <0x36>;
};
dev@51 { /* u-boot detection - maybe SPD */
compatible = "xxx";
reg = <0x51>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
/* SEP 3 */
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
/* SEP 2 */
};
i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
/* SEP 1 */
};
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
/* SEP 0 */
};
};
};
&qspi {
status = "okay";
is-dual = <1>;
flash@0 {
compatible = "m25p80"; /* 32MB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@qspi-fsbl-uboot { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
partition@qspi-linux { /* for testing purpose */
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
partition@qspi-device-tree { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
partition@qspi-rootfs { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
};
};
&rtc {
status = "okay";
};
&sata {
status = "okay";
/* SATA OOB timing settings */
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
phy-names = "sata-phy";
phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
no-1-8-v;
xlnx,mio_bank = <1>;
};
&serdes {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
};
&dwc3_0 {
status = "okay";
dr_mode = "host";
snps,usb3_lpm_capable;
phy-names = "usb3-phy";
phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
};
&watchdog0 {
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU111
*
* (C) Copyright 2017 - 2018, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
/ {
model = "ZynqMP ZCU111 RevA";
compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
aliases {
ethernet0 = &gem3;
gpio0 = &gpio;
i2c0 = &i2c0;
i2c1 = &i2c1;
mmc0 = &sdhci1;
rtc0 = &rtc;
serial0 = &uart0;
serial1 = &dcc;
spi0 = &qspi;
usb0 = &usb0;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
/* Another 4GB connected to PL */
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
sw19 {
label = "sw19";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_DOWN>;
gpio-key,wakeup;
autorepeat;
};
};
leds {
compatible = "gpio-leds";
heartbeat_led {
label = "heartbeat";
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
};
&dcc {
status = "okay";
};
&fpd_dma_chan1 {
status = "okay";
};
&fpd_dma_chan2 {
status = "okay";
};
&fpd_dma_chan3 {
status = "okay";
};
&fpd_dma_chan4 {
status = "okay";
};
&fpd_dma_chan5 {
status = "okay";
};
&fpd_dma_chan6 {
status = "okay";
};
&fpd_dma_chan7 {
status = "okay";
};
&fpd_dma_chan8 {
status = "okay";
};
&gem3 {
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
phy0: phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
};
};
&gpio {
status = "okay";
};
&gpu {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
tca6416_u22: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller; /* interrupt not connected */
#gpio-cells = <2>;
/*
* IRQ not connected
* Lines:
* 0 - MAX6643_OT_B
* 1 - MAX6643_FANFAIL_B
* 2 - MIO26_PMU_INPUT_LS
* 4 - SFP_SI5382_INT_ALM
* 5 - IIC_MUX_RESET_B
* 6 - GEM3_EXP_RESET_B
* 10 - FMCP_HSPC_PRSNT_M2C_B
* 11 - CLK_SPI_MUX_SEL0
* 12 - CLK_SPI_MUX_SEL1
* 16 - IRPS5401_ALERT_B
* 17 - INA226_PMBUS_ALERT
* 3, 7, 13-15 - not connected
*/
};
i2c-mux@75 { /* u23 */
compatible = "nxp,pca9544";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* PS_PMBUS */
/* PMBUS_ALERT done via pca9544 */
ina226@40 { /* u67 */
compatible = "ti,ina226";
reg = <0x40>;
shunt-resistor = <2000>;
};
ina226@41 { /* u59 */
compatible = "ti,ina226";
reg = <0x41>;
shunt-resistor = <5000>;
};
ina226@42 { /* u61 */
compatible = "ti,ina226";
reg = <0x42>;
shunt-resistor = <5000>;
};
ina226@43 { /* u60 */
compatible = "ti,ina226";
reg = <0x43>;
shunt-resistor = <5000>;
};
ina226@45 { /* u64 */
compatible = "ti,ina226";
reg = <0x45>;
shunt-resistor = <5000>;
};
ina226@46 { /* u69 */
compatible = "ti,ina226";
reg = <0x46>;
shunt-resistor = <2000>;
};
ina226@47 { /* u66 */
compatible = "ti,ina226";
reg = <0x47>;
shunt-resistor = <5000>;
};
ina226@48 { /* u65 */
compatible = "ti,ina226";
reg = <0x48>;
shunt-resistor = <5000>;
};
ina226@49 { /* u63 */
compatible = "ti,ina226";
reg = <0x49>;
shunt-resistor = <5000>;
};
ina226@4a { /* u3 */
compatible = "ti,ina226";
reg = <0x4a>;
shunt-resistor = <5000>;
};
ina226@4b { /* u71 */
compatible = "ti,ina226";
reg = <0x4b>;
shunt-resistor = <5000>;
};
ina226@4c { /* u77 */
compatible = "ti,ina226";
reg = <0x4c>;
shunt-resistor = <5000>;
};
ina226@4d { /* u73 */
compatible = "ti,ina226";
reg = <0x4d>;
shunt-resistor = <5000>;
};
ina226@4e { /* u79 */
compatible = "ti,ina226";
reg = <0x4e>;
shunt-resistor = <5000>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* NC */
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
irps5401_43: irps54012@43 { /* IRPS5401 - u53 check these */
#clock-cells = <0>;
compatible = "infineon,irps5401";
reg = <0x43>;
};
irps5401_44: irps54012@44 { /* IRPS5401 - u55 */
#clock-cells = <0>;
compatible = "infineon,irps5401";
reg = <0x44>;
};
irps5401_45: irps54012@45 { /* IRPS5401 - u57 */
#clock-cells = <0>;
compatible = "infineon,irps5401";
reg = <0x45>;
};
/* u68 IR38064 +0 */
/* u70 IR38060 +1 */
/* u74 IR38060 +2 */
/* u75 IR38060 +6 */
/* J19 header too */
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
/* SYSMON */
};
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
i2c-mux@74 { /* u26 */
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/*
* IIC_EEPROM 1kB memory which uses 256B blocks
* where every block has different address.
* 0 - 256B address 0x54
* 256B - 512B address 0x55
* 512B - 768B address 0x56
* 768B - 1024B address 0x57
*/
eeprom: eeprom@54 { /* u88 */
compatible = "atmel,24c08";
reg = <0x54>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
si5341: clock-generator@36 { /* SI5341 - u46 */
compatible = "si5341";
reg = <0x36>;
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
si570_1: clock-generator@5d { /* USER SI570 - u47 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x5d>;
temperature-stability = <50>;
factory-fout = <300000000>;
clock-frequency = <300000000>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
si570_2: clock-generator@5d { /* USER MGT SI570 - u49 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x5d>;
temperature-stability = <50>;
factory-fout = <156250000>;
clock-frequency = <148500000>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
si5328: clock-generator@69 { /* SI5328 - u48 */
compatible = "silabs,si5328";
reg = <0x69>;
};
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
sc18is603@2f { /* sc18is602 - u93 */
compatible = "nxp,sc18is603";
reg = <0x2f>;
/* 4 gpios for CS not handled by driver */
/*
* USB2ANY cable or
* LMK04208 - u90 or
* LMX2594 - u102 or
* LMX2594 - u103 or
* LMX2594 - u104
*/
};
};
i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
/* FMC connector */
};
/* 7 NC */
};
i2c-mux@75 {
compatible = "nxp,pca9548"; /* u27 */
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* FMCP_HSPC_IIC */
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* NC */
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
/* SYSMON */
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
/* DDR4 SODIMM */
dev@19 { /* u-boot detection FIXME */
compatible = "xxx";
reg = <0x19>;
};
dev@30 { /* u-boot detection */
compatible = "xxx";
reg = <0x30>;
};
dev@35 { /* u-boot detection */
compatible = "xxx";
reg = <0x35>;
};
dev@36 { /* u-boot detection */
compatible = "xxx";
reg = <0x36>;
};
dev@51 { /* u-boot detection - maybe SPD */
compatible = "xxx";
reg = <0x51>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
/* SFP3 */
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
/* SFP2 */
};
i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
/* SFP1 */
};
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
/* SFP0 */
};
};
};
&qspi {
status = "okay";
is-dual = <1>;
flash@0 {
compatible = "m25p80"; /* 32MB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@qspi-fsbl-uboot { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
partition@qspi-linux { /* for testing purpose */
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
partition@qspi-device-tree { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
partition@qspi-rootfs { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
};
};
&rtc {
status = "okay";
};
&sata {
status = "okay";
/* SATA OOB timing settings */
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
phy-names = "sata-phy";
phys = <&lane3 PHY_TYPE_SATA 1 3 125000000>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
no-1-8-v;
xlnx,mio_bank = <1>;
};
&serdes {
status = "okay";
};
&uart0 {
status = "okay";
};
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
};
&dwc3_0 {
status = "okay";
dr_mode = "host";
snps,usb3_lpm_capable;
phy-names = "usb3-phy";
phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
};

219
arch/arm/dts/zynqmp.dtsi
View File

@ -1,3 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP
*
@ -5,7 +6,10 @@
*
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*/
/ {
@ -98,155 +102,6 @@
u-boot,dm-pre-reloc;
};
power-domains {
compatible = "xlnx,zynqmp-genpd";
pd_usb0: pd-usb0 {
#power-domain-cells = <0x0>;
pd-id = <0x16>;
};
pd_usb1: pd-usb1 {
#power-domain-cells = <0x0>;
pd-id = <0x17>;
};
pd_sata: pd-sata {
#power-domain-cells = <0x0>;
pd-id = <0x1c>;
};
pd_spi0: pd-spi0 {
#power-domain-cells = <0x0>;
pd-id = <0x23>;
};
pd_spi1: pd-spi1 {
#power-domain-cells = <0x0>;
pd-id = <0x24>;
};
pd_uart0: pd-uart0 {
#power-domain-cells = <0x0>;
pd-id = <0x21>;
};
pd_uart1: pd-uart1 {
#power-domain-cells = <0x0>;
pd-id = <0x22>;
};
pd_eth0: pd-eth0 {
#power-domain-cells = <0x0>;
pd-id = <0x1d>;
};
pd_eth1: pd-eth1 {
#power-domain-cells = <0x0>;
pd-id = <0x1e>;
};
pd_eth2: pd-eth2 {
#power-domain-cells = <0x0>;
pd-id = <0x1f>;
};
pd_eth3: pd-eth3 {
#power-domain-cells = <0x0>;
pd-id = <0x20>;
};
pd_i2c0: pd-i2c0 {
#power-domain-cells = <0x0>;
pd-id = <0x25>;
};
pd_i2c1: pd-i2c1 {
#power-domain-cells = <0x0>;
pd-id = <0x26>;
};
pd_dp: pd-dp {
#power-domain-cells = <0x0>;
pd-id = <0x29>;
};
pd_gdma: pd-gdma {
#power-domain-cells = <0x0>;
pd-id = <0x2a>;
};
pd_adma: pd-adma {
#power-domain-cells = <0x0>;
pd-id = <0x2b>;
};
pd_ttc0: pd-ttc0 {
#power-domain-cells = <0x0>;
pd-id = <0x18>;
};
pd_ttc1: pd-ttc1 {
#power-domain-cells = <0x0>;
pd-id = <0x19>;
};
pd_ttc2: pd-ttc2 {
#power-domain-cells = <0x0>;
pd-id = <0x1a>;
};
pd_ttc3: pd-ttc3 {
#power-domain-cells = <0x0>;
pd-id = <0x1b>;
};
pd_sd0: pd-sd0 {
#power-domain-cells = <0x0>;
pd-id = <0x27>;
};
pd_sd1: pd-sd1 {
#power-domain-cells = <0x0>;
pd-id = <0x28>;
};
pd_nand: pd-nand {
#power-domain-cells = <0x0>;
pd-id = <0x2c>;
};
pd_qspi: pd-qspi {
#power-domain-cells = <0x0>;
pd-id = <0x2d>;
};
pd_gpio: pd-gpio {
#power-domain-cells = <0x0>;
pd-id = <0x2e>;
};
pd_can0: pd-can0 {
#power-domain-cells = <0x0>;
pd-id = <0x2f>;
};
pd_can1: pd-can1 {
#power-domain-cells = <0x0>;
pd-id = <0x30>;
};
pd_pcie: pd-pcie {
#power-domain-cells = <0x0>;
pd-id = <0x3b>;
};
pd_gpu: pd-gpu {
#power-domain-cells = <0x0>;
pd-id = <0x3a 0x14 0x15>;
};
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupt-parent = <&gic>;
@ -390,7 +245,6 @@
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <&pd_can0>;
};
can1: can@ff070000 {
@ -402,7 +256,6 @@
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <&pd_can1>;
};
cci: cci@fd6e0000 {
@ -435,7 +288,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14e8>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan2: dma@fd510000 {
@ -448,7 +300,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14e9>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan3: dma@fd520000 {
@ -461,7 +312,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ea>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan4: dma@fd530000 {
@ -474,7 +324,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14eb>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan5: dma@fd540000 {
@ -487,7 +336,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ec>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan6: dma@fd550000 {
@ -500,7 +348,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ed>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan7: dma@fd560000 {
@ -513,7 +360,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ee>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan8: dma@fd570000 {
@ -526,7 +372,6 @@
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ef>;
power-domains = <&pd_gdma>;
};
gpu: gpu@fd4b0000 {
@ -537,7 +382,6 @@
interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
clock-names = "gpu", "gpu_pp0", "gpu_pp1";
power-domains = <&pd_gpu>;
};
/* LPDDMA default allows only secured access. inorder to enable
@ -547,105 +391,97 @@
lpd_dma_chan1: dma@ffa80000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffa80000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 77 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x868>;
power-domains = <&pd_adma>;
};
lpd_dma_chan2: dma@ffa90000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffa90000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 78 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x869>;
power-domains = <&pd_adma>;
};
lpd_dma_chan3: dma@ffaa0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffaa0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 79 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86a>;
power-domains = <&pd_adma>;
};
lpd_dma_chan4: dma@ffab0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffab0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 80 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86b>;
power-domains = <&pd_adma>;
};
lpd_dma_chan5: dma@ffac0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffac0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 81 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86c>;
power-domains = <&pd_adma>;
};
lpd_dma_chan6: dma@ffad0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffad0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 82 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86d>;
power-domains = <&pd_adma>;
};
lpd_dma_chan7: dma@ffae0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffae0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 83 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86e>;
power-domains = <&pd_adma>;
};
lpd_dma_chan8: dma@ffaf0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
clock-names = "clk_main", "clk_apb";
reg = <0x0 0xffaf0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 84 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
iommus = <&smmu 0x86f>;
power-domains = <&pd_adma>;
};
mc: memory-controller@fd070000 {
@ -666,7 +502,6 @@
#size-cells = <1>;
#stream-id-cells = <1>;
iommus = <&smmu 0x872>;
power-domains = <&pd_nand>;
};
gem0: ethernet@ff0b0000 {
@ -680,7 +515,6 @@
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x874>;
power-domains = <&pd_eth0>;
};
gem1: ethernet@ff0c0000 {
@ -694,7 +528,6 @@
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x875>;
power-domains = <&pd_eth1>;
};
gem2: ethernet@ff0d0000 {
@ -708,7 +541,6 @@
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x876>;
power-domains = <&pd_eth2>;
};
gem3: ethernet@ff0e0000 {
@ -722,7 +554,6 @@
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x877>;
power-domains = <&pd_eth3>;
};
gpio: gpio@ff0a0000 {
@ -735,7 +566,6 @@
#interrupt-cells = <2>;
reg = <0x0 0xff0a0000 0x0 0x1000>;
gpio-controller;
power-domains = <&pd_gpio>;
};
i2c0: i2c@ff020000 {
@ -746,7 +576,6 @@
reg = <0x0 0xff020000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_i2c0>;
};
i2c1: i2c@ff030000 {
@ -757,7 +586,6 @@
reg = <0x0 0xff030000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_i2c1>;
};
ocm: memory-controller@ff960000 {
@ -781,7 +609,8 @@
<0 116 4>,
<0 115 4>, /* MSI_1 [63...32] */
<0 114 4>; /* MSI_0 [31...0] */
interrupt-names = "misc","dummy","intx", "msi1", "msi0";
interrupt-names = "misc", "dummy", "intx",
"msi1", "msi0";
msi-parent = <&pcie>;
reg = <0x0 0xfd0e0000 0x0 0x1000>,
<0x0 0xfd480000 0x0 0x1000>,
@ -795,7 +624,6 @@
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
power-domains = <&pd_pcie>;
pcie_intc: legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0>;
@ -817,7 +645,6 @@
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x873>;
power-domains = <&pd_qspi>;
};
rtc: rtc@ffa60000 {
@ -867,7 +694,6 @@
reg = <0x0 0xfd0c0000 0x0 0x2000>;
interrupt-parent = <&gic>;
interrupts = <0 133 4>;
power-domains = <&pd_sata>;
#stream-id-cells = <4>;
iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
<&smmu 0x4c2>, <&smmu 0x4c3>;
@ -885,7 +711,6 @@
xlnx,device_id = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x870>;
power-domains = <&pd_sd0>;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
};
@ -901,7 +726,6 @@
xlnx,device_id = <1>;
#stream-id-cells = <1>;
iommus = <&smmu 0x871>;
power-domains = <&pd_sd1>;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
};
@ -935,7 +759,6 @@
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_spi0>;
};
spi1: spi@ff050000 {
@ -947,7 +770,6 @@
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_spi1>;
};
ttc0: timer@ff110000 {
@ -957,7 +779,6 @@
interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc0>;
};
ttc1: timer@ff120000 {
@ -967,7 +788,6 @@
interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
reg = <0x0 0xff120000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc1>;
};
ttc2: timer@ff130000 {
@ -977,7 +797,6 @@
interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
reg = <0x0 0xff130000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc2>;
};
ttc3: timer@ff140000 {
@ -987,7 +806,6 @@
interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
reg = <0x0 0xff140000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc3>;
};
uart0: serial@ff000000 {
@ -998,7 +816,6 @@
interrupts = <0 21 4>;
reg = <0x0 0xff000000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&pd_uart0>;
};
uart1: serial@ff010000 {
@ -1009,7 +826,6 @@
interrupts = <0 22 4>;
reg = <0x0 0xff010000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&pd_uart1>;
};
usb0: usb0@ff9d0000 {
@ -1019,7 +835,6 @@
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9d0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
power-domains = <&pd_usb0>;
ranges;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
@ -1045,7 +860,6 @@
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9e0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
power-domains = <&pd_usb1>;
ranges;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
@ -1106,7 +920,6 @@
interrupts = <0 119 4>;
interrupt-parent = <&gic>;
clock-names = "aclk", "aud_clk";
power-domains = <&pd_dp>;
xlnx,dp-version = "v1.2";
xlnx,max-lanes = <2>;
xlnx,max-link-rate = <540000>;
@ -1129,7 +942,6 @@
xlnx,output-fmt = "rgb";
xlnx,vid-fmt = "yuyv";
xlnx,gfx-fmt = "rgb565";
power-domains = <&pd_dp>;
};
xlnx_dpdma: dma@fd4c0000 {
@ -1139,7 +951,6 @@
interrupts = <0 122 4>;
interrupt-parent = <&gic>;
clock-names = "axi_clk";
power-domains = <&pd_dp>;
dma-channels = <6>;
#dma-cells = <1>;
dma-video0channel {

2
arch/arm/include/asm/arch-zynqmp/sys_proto.h
View File

@ -14,6 +14,8 @@
#define ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD 0xC200002D
#define KEY_PTR_LEN 32
#define ZYNQMP_FPGA_BIT_NS 5
enum {
IDCODE,
VERSION,

3
arch/arm/mach-zynq/clk.c
View File

@ -94,7 +94,8 @@ int soc_clk_dump(void)
clk_free(&clk);
if (rate == (unsigned long)-ENOSYS)
if ((rate == (unsigned long)-ENOSYS) ||
(rate == (unsigned long)-ENXIO))
printf("%10s%20s\n", name, "unknown");
else
printf("%10s%20lu\n", name, rate);

745
board/xilinx/zynqmp/zynqmp-zc1232-revA/psu_init_gpl.c Normal file
View File

@ -0,0 +1,745 @@
/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x8000C76CU);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x8000497FU);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U);
psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x81040001U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0081808BU);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0030051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x006A0000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x01240004U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00280000U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00110004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x00000000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x0F0E2412U);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x000D0419U);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0507070BU);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x00502008U);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x07020408U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030909U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0004040DU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x440C011CU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x80AB002BU);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x020196E5U);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048A8207U);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00020304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E1U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000802U);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x00080808U);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x070F0707U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F070707U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000000U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x07070707U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x07070707U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000007U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000610U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10010U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x0AC85590U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x41540B00U);
psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040BU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x08240E08U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x281C0404U);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00070200U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x82000800U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B1AU);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00320E08U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000A0EU);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000124U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000004U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000028U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800081C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12340800U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0B0U);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF1032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AA858U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000077BBU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x000076BBU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70000000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70000000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70000000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70000000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70000000U);
psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
psu_mask_write(0xFD080004, 0xFFFFFFFFU, 0x00040073U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180088, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF18008C, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180204, 0x0000003FU, 0x00000000U);
psu_mask_write(0xFF180208, 0x0000000CU, 0x00000004U);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFD1A0100, 0x0000807EU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U);
psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000002U, 0x00000000U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD17U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
return 1;
}
static unsigned long psu_serdes_init_data(void)
{
psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000FU);
psu_mask_write(0xFD410004, 0x0000001FU, 0x0000000FU);
psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD402864, 0x00000081U, 0x00000001U);
psu_mask_write(0xFD402368, 0x000000FFU, 0x000000E0U);
psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD406368, 0x000000FFU, 0x000000E0U);
psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402370, 0x000000FFU, 0x000000C9U);
psu_mask_write(0xFD402374, 0x000000FFU, 0x000000D2U);
psu_mask_write(0xFD402378, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD40237C, 0x000000B3U, 0x000000B0U);
psu_mask_write(0xFD406370, 0x000000FFU, 0x000000C9U);
psu_mask_write(0xFD406374, 0x000000FFU, 0x000000D2U);
psu_mask_write(0xFD406378, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD40637C, 0x000000B3U, 0x000000B0U);
psu_mask_write(0xFD402360, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40106C, 0x0000000FU, 0x0000000FU);
psu_mask_write(0xFD4000F4, 0x0000000BU, 0x0000000BU);
psu_mask_write(0xFD406360, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40506C, 0x0000000FU, 0x0000000FU);
psu_mask_write(0xFD4040F4, 0x0000000BU, 0x0000000BU);
psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40189C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4018F8, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD4018FC, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD401990, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD401924, 0x000000FFU, 0x0000009CU);
psu_mask_write(0xFD401928, 0x000000FFU, 0x00000039U);
psu_mask_write(0xFD40198C, 0x000000F0U, 0x00000020U);
psu_mask_write(0xFD401900, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD401980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD401918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD401944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40589C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4058F8, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD4058FC, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD405990, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD405924, 0x000000FFU, 0x0000009CU);
psu_mask_write(0xFD405928, 0x000000FFU, 0x00000039U);
psu_mask_write(0xFD40598C, 0x000000F0U, 0x00000020U);
psu_mask_write(0xFD405900, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40592C, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD405980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD405918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD405940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD405944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD410010, 0x00000077U, 0x00000022U);
psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401C14, 0x000000FFU, 0x000000E6U);
psu_mask_write(0xFD401C40, 0x0000001FU, 0x0000000CU);
psu_mask_write(0xFD40194C, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD401950, 0x00000007U, 0x00000006U);
psu_mask_write(0xFD405C14, 0x000000FFU, 0x000000E6U);
psu_mask_write(0xFD405C40, 0x0000001FU, 0x0000000CU);
psu_mask_write(0xFD40594C, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD405950, 0x00000007U, 0x00000006U);
psu_mask_write(0xFD404048, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD400048, 0x000000FFU, 0x00000001U);
return 1;
}
static unsigned long psu_resetout_init_data(void)
{
psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000001U);
psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
mask_poll(0xFD4023E4, 0x00000010U);
mask_poll(0xFD4063E4, 0x00000010U);
psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184018U);
psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081406U);
psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U);
psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U);
return 1;
}
static unsigned long psu_resetin_init_data(void)
{
psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U);
return 1;
}
static unsigned long psu_afi_config(void)
{
psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
psu_mask_write(0xFD615000, 0x00000300U, 0x00000200U);
psu_mask_write(0xFD360000, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD370000, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD390000, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD3A0000, 0x00000003U, 0x00000000U);
psu_mask_write(0xFF9B0000, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD360014, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD370014, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD390014, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD3A0014, 0x00000003U, 0x00000000U);
psu_mask_write(0xFF9B0014, 0x00000003U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD0701B0U, 0x00000001U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0004FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x80000FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD070180U, 0x00AB002BU);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
static int serdes_enb_coarse_saturation(void)
{
Xil_Out32(0xFD402094, 0x00000010);
Xil_Out32(0xFD406094, 0x00000010);
Xil_Out32(0xFD40A094, 0x00000010);
Xil_Out32(0xFD40E094, 0x00000010);
return 1;
}
static int serdes_fixcal_code(void)
{
int maskstatus = 1;
unsigned int match_pmos_code[23];
unsigned int match_nmos_code[23];
unsigned int match_ical_code[7];
unsigned int match_rcal_code[7];
unsigned int p_code = 0;
unsigned int n_code = 0;
unsigned int i_code = 0;
unsigned int r_code = 0;
unsigned int repeat_count = 0;
unsigned int L3_TM_CALIB_DIG20 = 0;
unsigned int L3_TM_CALIB_DIG19 = 0;
unsigned int L3_TM_CALIB_DIG18 = 0;
unsigned int L3_TM_CALIB_DIG16 = 0;
unsigned int L3_TM_CALIB_DIG15 = 0;
unsigned int L3_TM_CALIB_DIG14 = 0;
int i = 0;
for (i = 0; i < 23; i++) {
match_pmos_code[i] = 0;
match_nmos_code[i] = 0;
}
for (i = 0; i < 7; i++) {
match_ical_code[i] = 0;
match_rcal_code[i] = 0;
}
do {
Xil_Out32(0xFD410010, 0x00000000);
Xil_Out32(0xFD410014, 0x00000000);
Xil_Out32(0xFD410010, 0x00000001);
Xil_Out32(0xFD410014, 0x00000000);
maskstatus = mask_poll(0xFD40EF14, 0x2);
if (maskstatus == 0) {
/* xil_printf("#SERDES initialization timed out\n\r");*/
return maskstatus;
}
p_code = mask_read(0xFD40EF18, 0xFFFFFFFF);
n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF);
i_code = mask_read(0xFD40EF24, 0xFFFFFFFF);
r_code = mask_read(0xFD40EF28, 0xFFFFFFFF);
if ((p_code >= 0x26) && (p_code <= 0x3C))
match_pmos_code[p_code - 0x26] += 1;
if ((n_code >= 0x26) && (n_code <= 0x3C))
match_nmos_code[n_code - 0x26] += 1;
if ((i_code >= 0xC) && (i_code <= 0x12))
match_ical_code[i_code - 0xC] += 1;
if ((r_code >= 0x6) && (r_code <= 0xC))
match_rcal_code[r_code - 0x6] += 1;
} while (repeat_count++ < 10);
for (i = 0; i < 23; i++) {
if (match_pmos_code[i] >= match_pmos_code[0]) {
match_pmos_code[0] = match_pmos_code[i];
p_code = 0x26 + i;
}
if (match_nmos_code[i] >= match_nmos_code[0]) {
match_nmos_code[0] = match_nmos_code[i];
n_code = 0x26 + i;
}
}
for (i = 0; i < 7; i++) {
if (match_ical_code[i] >= match_ical_code[0]) {
match_ical_code[0] = match_ical_code[i];
i_code = 0xC + i;
}
if (match_rcal_code[i] >= match_rcal_code[0]) {
match_rcal_code[0] = match_rcal_code[i];
r_code = 0x6 + i;
}
}
L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0);
L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7);
L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18);
L3_TM_CALIB_DIG19 =
L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6) | 0x20 | 0x4 |
((n_code >> 3) & 0x3);
L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F);
L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10;
L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8);
L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7);
L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30);
L3_TM_CALIB_DIG15 =
L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7) | 0x40 | 0x8 |
((i_code >> 1) & 0x7);
L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F);
L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40;
Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20);
Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19);
Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18);
Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16);
Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15);
Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14);
return maskstatus;
}
static int init_serdes(void)
{
int status = 1;
status &= psu_resetin_init_data();
status &= serdes_fixcal_code();
status &= serdes_enb_coarse_saturation();
status &= psu_serdes_init_data();
status &= psu_resetout_init_data();
return status;
}
static void init_peripheral(void)
{
unsigned int tmp_regval;
tmp_regval = Xil_In32(0xFD690040);
tmp_regval &= ~0x00000001;
Xil_Out32(0xFD690040, tmp_regval);
tmp_regval = Xil_In32(0xFD690030);
tmp_regval &= ~0x00000001;
Xil_Out32(0xFD690030, tmp_regval);
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= init_serdes();
init_peripheral();
status &= psu_afi_config();
if (status == 0)
return 1;
return 0;
}

467
board/xilinx/zynqmp/zynqmp-zc1254-revA/psu_init_gpl.c Normal file
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@ -0,0 +1,467 @@
/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E60EC6CU);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00013000U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000200U);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014200U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000200U);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010500U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000300U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000900U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010802U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000104U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000600U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000203U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000203U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000203U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000202U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x81040001U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000100U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00403210U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x00308034U);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0030051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020063U);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00290000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00000E05U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x05200004U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00110004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x00000000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x07080D07U);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x0005020BU);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x03030607U);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x00502006U);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x13020204U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x03030202U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010003U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000303U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x02020909U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0004040DU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x440C011CU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x80800020U);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x02009896U);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x04828202U);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00020304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x003800D4U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x0000003DU);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x00080808U);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x070F0707U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F070707U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000000U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x07070707U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x07070707U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000007U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000604U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F05D90U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x64032010U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x38801C20U);
psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x06124000U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04061U);
psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040BU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x040E0604U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28100004U);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00040200U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x82000800U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x00682B0AU);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00152504U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000506U);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000520U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000004U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800081C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12340800U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0B0U);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF1032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x0088E858U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000077BBU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x000076BBU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B00CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09093030U);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x06124000U);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70000000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x06124000U);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70000000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x06124000U);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70000000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x06124000U);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70000000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x06124000U);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70000000U);
psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x06124000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180088, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF18008C, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180204, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFF180208, 0x0000000CU, 0x00000004U);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFD1A0100, 0x0000007CU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180390, 0x00000004U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000002U, 0x00000000U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x01FC9F08U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
return 1;
}
static unsigned long psu_afi_config(void)
{
psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
psu_mask_write(0xFD615000, 0x00000300U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
unsigned int pll_retry = 10;
unsigned int pll_locked = 0;
while ((pll_retry > 0) && (!pll_locked)) {
Xil_Out32(0xFD080004, 0x00040010);
Xil_Out32(0xFD080004, 0x00040011);
while ((Xil_In32(0xFD080030) & 0x1) != 1)
;
pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31;
pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16;
pll_retry--;
}
Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
Xil_Out32(0xFD080004U, 0x00040063U);
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD0701B0U, 0x00000001U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0004FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x80000FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD070180U, 0x00800020U);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= psu_afi_config();
if (status == 0)
return 1;
return 0;
}

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board/xilinx/zynqmp/zynqmp-zc1275-revA Symbolic link
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zynqmp-zc1254-revA

912
board/xilinx/zynqmp/zynqmp-zc1751-xm015-dc1/psu_init_gpl.c Normal file
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/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x8000C76CU);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x8000497FU);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U);
psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U);
psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x020F0500U);
psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U);
psu_mask_write(0xFF5E006C, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF18030C, 0x00020003U, 0x00000000U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U);
psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U);
psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x41040010U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0081808BU);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x110C2412U);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060DU);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030309U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030D06U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002020BU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x7007010EU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x020196E5U);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E1U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0A0AU);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x080F0808U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F080808U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000808U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000008U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10010U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x0AC85590U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x41540B00U);
psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06240F08U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28170008U);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00070300U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B07U);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00320F08U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAA58U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180034, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180038, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180040, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180044, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180048, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180050, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180054, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180058, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180068, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180088, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF18008C, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180090, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180094, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180204, 0xFC7FE07FU, 0x54000000U);
psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B03004U);
psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFD1A0100, 0x0001807EU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U);
psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000000U);
psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000060U, 0x00000000U);
psu_mask_write(0xFF180310, 0x00008001U, 0x00000001U);
psu_mask_write(0xFF180320, 0x33803380U, 0x02801280U);
psu_mask_write(0xFF18031C, 0x00007FFEU, 0x00006450U);
psu_mask_write(0xFF180358, 0x00080000U, 0x00080000U);
psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U);
psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF180324, 0x000003C0U, 0x00000000U);
psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000400U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000002U, 0x00000000U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD17U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
return 1;
}
static unsigned long psu_serdes_init_data(void)
{
psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U);
psu_mask_write(0xFD41000C, 0x0000001FU, 0x00000011U);
psu_mask_write(0xFD402860, 0x00000084U, 0x00000004U);
psu_mask_write(0xFD402864, 0x00000084U, 0x00000004U);
psu_mask_write(0xFD402868, 0x00000088U, 0x00000008U);
psu_mask_write(0xFD40286C, 0x00000082U, 0x00000002U);
psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U);
psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD40E368, 0x000000FFU, 0x00000018U);
psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U);
psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U);
psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000D3U);
psu_mask_write(0xFD40E374, 0x000000FFU, 0x000000DAU);
psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40E37C, 0x000000B3U, 0x000000B0U);
psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD40E360, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D06C, 0x0000000FU, 0x0000000FU);
psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x0000000BU);
psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U);
psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x00000096U);
psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x00000096U);
psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD40D924, 0x000000FFU, 0x0000009CU);
psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000039U);
psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U);
psu_mask_write(0xFD40D900, 0x000000FFU, 0x00000096U);
psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U);
psu_mask_write(0xFD410014, 0x00000077U, 0x00000023U);
psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40C1D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40DC14, 0x000000FFU, 0x000000E6U);
psu_mask_write(0xFD40DC40, 0x0000001FU, 0x0000000CU);
psu_mask_write(0xFD40D94C, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD40D950, 0x00000007U, 0x00000006U);
psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD40C048, 0x000000FFU, 0x00000001U);
return 1;
}
static unsigned long psu_resetout_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U);
psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U);
psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U);
psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U);
psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
mask_poll(0xFD4063E4, 0x00000010U);
mask_poll(0xFD40A3E4, 0x00000010U);
mask_poll(0xFD40E3E4, 0x00000010U);
psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184D1BU);
psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081906U);
psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U);
psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U);
return 1;
}
static unsigned long psu_resetin_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
return 1;
}
static unsigned long psu_afi_config(void)
{
psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
unsigned int pll_retry = 10;
unsigned int pll_locked = 0;
while ((pll_retry > 0) && (!pll_locked)) {
Xil_Out32(0xFD080004, 0x00040010);
Xil_Out32(0xFD080004, 0x00040011);
while ((Xil_In32(0xFD080030) & 0x1) != 1)
;
pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31;
pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16;
pll_retry--;
}
Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
Xil_Out32(0xFD080004U, 0x00040063U);
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD0701B0U, 0x00000001U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0004FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x80000FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x100091C7U);
Xil_Out32(0xFD080018U, 0x00F01EEFU);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U);
Xil_Out32(0xFD080004, 0x00060001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80004001) != 0x80004001)
regval = Xil_In32(0xFD080030);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U);
Xil_Out32(0xFD080200U, 0x800091C7U);
Xil_Out32(0xFD080018U, 0x00F122E7U);
Xil_Out32(0xFD080004, 0x0000C001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80000C01) != 0x80000C01)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD070180U, 0x01000040U);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
static int serdes_enb_coarse_saturation(void)
{
Xil_Out32(0xFD402094, 0x00000010);
Xil_Out32(0xFD406094, 0x00000010);
Xil_Out32(0xFD40A094, 0x00000010);
Xil_Out32(0xFD40E094, 0x00000010);
return 1;
}
static int serdes_fixcal_code(void)
{
int maskstatus = 1;
unsigned int rdata = 0;
unsigned int match_pmos_code[23];
unsigned int match_nmos_code[23];
unsigned int match_ical_code[7];
unsigned int match_rcal_code[7];
unsigned int p_code = 0;
unsigned int n_code = 0;
unsigned int i_code = 0;
unsigned int r_code = 0;
unsigned int repeat_count = 0;
unsigned int L3_TM_CALIB_DIG20 = 0;
unsigned int L3_TM_CALIB_DIG19 = 0;
unsigned int L3_TM_CALIB_DIG18 = 0;
unsigned int L3_TM_CALIB_DIG16 = 0;
unsigned int L3_TM_CALIB_DIG15 = 0;
unsigned int L3_TM_CALIB_DIG14 = 0;
int i = 0;
int count = 0;
rdata = Xil_In32(0xFD40289C);
rdata = rdata & ~0x03;
rdata = rdata | 0x1;
Xil_Out32(0xFD40289C, rdata);
do {
if (count == 1100000)
break;
rdata = Xil_In32(0xFD402B1C);
count++;
} while ((rdata & 0x0000000E) != 0x0000000E);
for (i = 0; i < 23; i++) {
match_pmos_code[i] = 0;
match_nmos_code[i] = 0;
}
for (i = 0; i < 7; i++) {
match_ical_code[i] = 0;
match_rcal_code[i] = 0;
}
do {
Xil_Out32(0xFD410010, 0x00000000);
Xil_Out32(0xFD410014, 0x00000000);
Xil_Out32(0xFD410010, 0x00000001);
Xil_Out32(0xFD410014, 0x00000000);
maskstatus = mask_poll(0xFD40EF14, 0x2);
if (maskstatus == 0) {
/* xil_printf("#SERDES initialization timed out\n\r");*/
return maskstatus;
}
p_code = mask_read(0xFD40EF18, 0xFFFFFFFF);
n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF);
;
i_code = mask_read(0xFD40EF24, 0xFFFFFFFF);
r_code = mask_read(0xFD40EF28, 0xFFFFFFFF);
;
if ((p_code >= 0x26) && (p_code <= 0x3C))
match_pmos_code[p_code - 0x26] += 1;
if ((n_code >= 0x26) && (n_code <= 0x3C))
match_nmos_code[n_code - 0x26] += 1;
if ((i_code >= 0xC) && (i_code <= 0x12))
match_ical_code[i_code - 0xC] += 1;
if ((r_code >= 0x6) && (r_code <= 0xC))
match_rcal_code[r_code - 0x6] += 1;
} while (repeat_count++ < 10);
for (i = 0; i < 23; i++) {
if (match_pmos_code[i] >= match_pmos_code[0]) {
match_pmos_code[0] = match_pmos_code[i];
p_code = 0x26 + i;
}
if (match_nmos_code[i] >= match_nmos_code[0]) {
match_nmos_code[0] = match_nmos_code[i];
n_code = 0x26 + i;
}
}
for (i = 0; i < 7; i++) {
if (match_ical_code[i] >= match_ical_code[0]) {
match_ical_code[0] = match_ical_code[i];
i_code = 0xC + i;
}
if (match_rcal_code[i] >= match_rcal_code[0]) {
match_rcal_code[0] = match_rcal_code[i];
r_code = 0x6 + i;
}
}
L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0);
L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7);
L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18);
L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6)
| 0x20 | 0x4 | ((n_code >> 3) & 0x3);
L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F);
L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10;
L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8);
L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7);
L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30);
L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7)
| 0x40 | 0x8 | ((i_code >> 1) & 0x7);
L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F);
L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40;
Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20);
Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19);
Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18);
Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16);
Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15);
Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14);
return maskstatus;
}
static int init_serdes(void)
{
int status = 1;
status &= psu_resetin_init_data();
status &= serdes_fixcal_code();
status &= serdes_enb_coarse_saturation();
status &= psu_serdes_init_data();
status &= psu_resetout_init_data();
return status;
}
static void init_peripheral(void)
{
psu_mask_write(0xFD5F0018, 0x8000001FU, 0x8000001FU);
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= init_serdes();
init_peripheral();
status &= psu_afi_config();
if (status == 0)
return 1;
return 0;
}

900
board/xilinx/zynqmp/zynqmp-zc1751-xm016-dc2/psu_init_gpl.c Normal file
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/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x8000C76CU);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x8000497FU);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E0058, 0x063F3F07U, 0x06010C00U);
psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U);
psu_mask_write(0xFF5E0064, 0x023F3F07U, 0x02010600U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E007C, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF5E0080, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF5E0084, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0088, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B4, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U);
psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
psu_mask_write(0xFD1A00B4, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U);
psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x41040010U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0081808BU);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x110C2412U);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060DU);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030309U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030D06U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002020BU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x7007010EU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x020196E5U);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E1U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0A0AU);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x080F0808U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F080808U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000808U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000008U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10010U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x0AC85590U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x41540B00U);
psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06240F08U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28170008U);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00070300U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B07U);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00320F08U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAA58U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180018, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180024, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180028, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180030, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180034, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180038, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180040, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180044, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180048, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180050, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180054, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180058, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180060, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180064, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180068, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180070, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180074, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180078, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180080, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180084, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180088, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180098, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF1800A0, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800A4, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800A8, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800AC, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180100, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180104, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180108, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180110, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180114, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180118, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180120, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180124, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180128, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180130, 0x000000FEU, 0x000000A0U);
psu_mask_write(0xFF180134, 0x000000FEU, 0x000000A0U);
psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0xEC000C00U);
psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0xFC000642U);
psu_mask_write(0xFF18020C, 0x00003FFFU, 0x0000000BU);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFD1A0100, 0x000F807CU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00010000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000000U);
psu_mask_write(0xFF9E0080, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF9E007C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0238, 0x00000180U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000200U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000018U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD17U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
return 1;
}
static unsigned long psu_serdes_init_data(void)
{
psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU);
psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD402864, 0x00000084U, 0x00000004U);
psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD4010CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40189C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4018F8, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD4018FC, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD401990, 0x000000FFU, 0x00000011U);
psu_mask_write(0xFD401924, 0x000000FFU, 0x00000004U);
psu_mask_write(0xFD401928, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD401900, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD401980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD401918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD401944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD3D001C, 0xFFFFFFFFU, 0x00000001U);
psu_mask_write(0xFD480314, 0xFFFFFFFFU, 0x00000004U);
psu_mask_write(0xFD410010, 0x00000077U, 0x00000041U);
psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
return 1;
}
static unsigned long psu_resetout_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000800U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000280U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x000C0000U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
psu_mask_write(0xFE30C200, 0x00023FFFU, 0x00022457U);
psu_mask_write(0xFE30C630, 0x003FFF00U, 0x00000000U);
psu_mask_write(0xFE30C12C, 0x00004000U, 0x00004000U);
psu_mask_write(0xFE30C11C, 0x00000400U, 0x00000400U);
psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
psu_mask_write(0xFD48001C, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480020, 0x0000FFFFU, 0x0000FFF0U);
psu_mask_write(0xFD480024, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480028, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD48002C, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480030, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480034, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480038, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD48003C, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480040, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480044, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480048, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD48006C, 0x00000738U, 0x00000138U);
psu_mask_write(0xFD4800C8, 0x0000FFF0U, 0x00000000U);
psu_mask_write(0xFD4801A4, 0x000007FFU, 0x00000172U);
psu_mask_write(0xFD4801A8, 0x00003FFFU, 0x00000248U);
psu_mask_write(0xFD4801AC, 0x000007FFU, 0x00000008U);
psu_mask_write(0xFD4801B0, 0x000007FFU, 0x00000020U);
psu_mask_write(0xFD4801B4, 0x0000FFFFU, 0x00007E04U);
psu_mask_write(0xFD480088, 0x0000FFFFU, 0x00000100U);
psu_mask_write(0xFD4800D4, 0x000000FFU, 0x00000060U);
psu_mask_write(0xFD4800A4, 0x000003FFU, 0x00000060U);
psu_mask_write(0xFD480184, 0x00000FFFU, 0x00000041U);
psu_mask_write(0xFD480190, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD480194, 0x0000FFE2U, 0x00000000U);
psu_mask_write(0xFD480200, 0xFFFFFFFFU, 0x10EED011U);
psu_mask_write(0xFD480204, 0xFFFFFFFFU, 0x10EE0007U);
psu_mask_write(0xFD480208, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD480060, 0x0000FFFFU, 0x00008000U);
psu_mask_write(0xFD480064, 0x000001FFU, 0x00000105U);
psu_mask_write(0xFD0E0000, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD480010, 0x00001000U, 0x00000000U);
psu_mask_write(0xFD480164, 0x00001FFEU, 0x00000000U);
psu_mask_write(0xFD4800AC, 0x00000F00U, 0x00000000U);
psu_mask_write(0xFD4800B4, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD48031C, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD48008C, 0x00003000U, 0x00000000U);
psu_mask_write(0xFD480094, 0x00004000U, 0x00004000U);
psu_mask_write(0xFD1A0100, 0x00020000U, 0x00000000U);
mask_poll(0xFD4023E4, 0x00000010U);
mask_poll(0xFD4063E4, 0x00000010U);
return 1;
}
static unsigned long psu_resetin_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000A80U);
psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000004U);
psu_mask_write(0xFD1A0100, 0x000E0000U, 0x000E0000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
return 1;
}
static unsigned long psu_afi_config(void)
{
psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
unsigned int pll_retry = 10;
unsigned int pll_locked = 0;
while ((pll_retry > 0) && (!pll_locked)) {
Xil_Out32(0xFD080004, 0x00040010);
Xil_Out32(0xFD080004, 0x00040011);
while ((Xil_In32(0xFD080030) & 0x1) != 1)
;
pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31;
pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16;
pll_retry--;
}
Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
Xil_Out32(0xFD080004U, 0x00040063U);
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD0701B0U, 0x00000001U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0004FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x80000FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x100091C7U);
Xil_Out32(0xFD080018U, 0x00F01EEFU);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U);
Xil_Out32(0xFD080004, 0x00060001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80004001) != 0x80004001)
regval = Xil_In32(0xFD080030);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U);
Xil_Out32(0xFD080200U, 0x800091C7U);
Xil_Out32(0xFD080018U, 0x00F122E7U);
Xil_Out32(0xFD080004, 0x0000C001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80000C01) != 0x80000C01)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD070180U, 0x01000040U);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
static int serdes_enb_coarse_saturation(void)
{
Xil_Out32(0xFD402094, 0x00000010);
Xil_Out32(0xFD406094, 0x00000010);
Xil_Out32(0xFD40A094, 0x00000010);
Xil_Out32(0xFD40E094, 0x00000010);
return 1;
}
static int serdes_fixcal_code(void)
{
int maskstatus = 1;
unsigned int rdata = 0;
unsigned int match_pmos_code[23];
unsigned int match_nmos_code[23];
unsigned int match_ical_code[7];
unsigned int match_rcal_code[7];
unsigned int p_code = 0;
unsigned int n_code = 0;
unsigned int i_code = 0;
unsigned int r_code = 0;
unsigned int repeat_count = 0;
unsigned int L3_TM_CALIB_DIG20 = 0;
unsigned int L3_TM_CALIB_DIG19 = 0;
unsigned int L3_TM_CALIB_DIG18 = 0;
unsigned int L3_TM_CALIB_DIG16 = 0;
unsigned int L3_TM_CALIB_DIG15 = 0;
unsigned int L3_TM_CALIB_DIG14 = 0;
int i = 0;
int count = 0;
rdata = Xil_In32(0xFD40289C);
rdata = rdata & ~0x03;
rdata = rdata | 0x1;
Xil_Out32(0xFD40289C, rdata);
do {
if (count == 1100000)
break;
rdata = Xil_In32(0xFD402B1C);
count++;
} while ((rdata & 0x0000000E) != 0x0000000E);
for (i = 0; i < 23; i++) {
match_pmos_code[i] = 0;
match_nmos_code[i] = 0;
}
for (i = 0; i < 7; i++) {
match_ical_code[i] = 0;
match_rcal_code[i] = 0;
}
do {
Xil_Out32(0xFD410010, 0x00000000);
Xil_Out32(0xFD410014, 0x00000000);
Xil_Out32(0xFD410010, 0x00000001);
Xil_Out32(0xFD410014, 0x00000000);
maskstatus = mask_poll(0xFD40EF14, 0x2);
if (maskstatus == 0) {
/* xil_printf("#SERDES initialization timed out\n\r");*/
return maskstatus;
}
p_code = mask_read(0xFD40EF18, 0xFFFFFFFF);
n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF);
;
i_code = mask_read(0xFD40EF24, 0xFFFFFFFF);
r_code = mask_read(0xFD40EF28, 0xFFFFFFFF);
;
if ((p_code >= 0x26) && (p_code <= 0x3C))
match_pmos_code[p_code - 0x26] += 1;
if ((n_code >= 0x26) && (n_code <= 0x3C))
match_nmos_code[n_code - 0x26] += 1;
if ((i_code >= 0xC) && (i_code <= 0x12))
match_ical_code[i_code - 0xC] += 1;
if ((r_code >= 0x6) && (r_code <= 0xC))
match_rcal_code[r_code - 0x6] += 1;
} while (repeat_count++ < 10);
for (i = 0; i < 23; i++) {
if (match_pmos_code[i] >= match_pmos_code[0]) {
match_pmos_code[0] = match_pmos_code[i];
p_code = 0x26 + i;
}
if (match_nmos_code[i] >= match_nmos_code[0]) {
match_nmos_code[0] = match_nmos_code[i];
n_code = 0x26 + i;
}
}
for (i = 0; i < 7; i++) {
if (match_ical_code[i] >= match_ical_code[0]) {
match_ical_code[0] = match_ical_code[i];
i_code = 0xC + i;
}
if (match_rcal_code[i] >= match_rcal_code[0]) {
match_rcal_code[0] = match_rcal_code[i];
r_code = 0x6 + i;
}
}
L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0);
L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7);
L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18);
L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6)
| 0x20 | 0x4 | ((n_code >> 3) & 0x3);
L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F);
L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10;
L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8);
L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7);
L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30);
L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7)
| 0x40 | 0x8 | ((i_code >> 1) & 0x7);
L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F);
L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40;
Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20);
Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19);
Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18);
Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16);
Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15);
Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14);
return maskstatus;
}
static int init_serdes(void)
{
int status = 1;
status &= psu_resetin_init_data();
status &= serdes_fixcal_code();
status &= serdes_enb_coarse_saturation();
status &= psu_serdes_init_data();
status &= psu_resetout_init_data();
return status;
}
static void init_peripheral(void)
{
psu_mask_write(0xFD5F0018, 0x8000001FU, 0x8000001FU);
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= init_serdes();
init_peripheral();
status &= psu_afi_config();
if (status == 0)
return 1;
return 0;
}

900
board/xilinx/zynqmp/zynqmp-zc1751-xm017-dc3/psu_init_gpl.c Normal file
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@ -0,0 +1,900 @@
/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x8000C76CU);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x8000497FU);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E0058, 0x063F3F07U, 0x06010C00U);
psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U);
psu_mask_write(0xFF5E0064, 0x023F3F07U, 0x02010600U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E007C, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF5E0080, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF5E0084, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0088, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B4, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U);
psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
psu_mask_write(0xFD1A00B4, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U);
psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x41040010U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0081808BU);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x110C2412U);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060DU);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030309U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030D06U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002020BU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x7007010EU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x020196E5U);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E1U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0A0AU);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x080F0808U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F080808U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000808U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000008U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10010U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x0AC85590U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x41540B00U);
psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06240F08U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28170008U);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00070300U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B07U);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00320F08U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAA58U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180018, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180024, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180028, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180030, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180034, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180038, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180040, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180044, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180048, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180050, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180054, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180058, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180060, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180064, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180068, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180070, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180074, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180078, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180080, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180084, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180088, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180098, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF1800A0, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800A4, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800A8, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800AC, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180100, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180104, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180108, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180110, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180114, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180118, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180120, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180124, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180128, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180130, 0x000000FEU, 0x000000A0U);
psu_mask_write(0xFF180134, 0x000000FEU, 0x000000A0U);
psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0xEC000C00U);
psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0xFC000642U);
psu_mask_write(0xFF18020C, 0x00003FFFU, 0x0000000BU);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFD1A0100, 0x000F807CU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00010000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000000U);
psu_mask_write(0xFF9E0080, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF9E007C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0238, 0x00000180U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000200U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000018U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD17U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
return 1;
}
static unsigned long psu_serdes_init_data(void)
{
psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU);
psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD402864, 0x00000084U, 0x00000004U);
psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD4010CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40189C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4018F8, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD4018FC, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD401990, 0x000000FFU, 0x00000011U);
psu_mask_write(0xFD401924, 0x000000FFU, 0x00000004U);
psu_mask_write(0xFD401928, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD401900, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD401980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD401918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD401944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD3D001C, 0xFFFFFFFFU, 0x00000001U);
psu_mask_write(0xFD480314, 0xFFFFFFFFU, 0x00000004U);
psu_mask_write(0xFD410010, 0x00000077U, 0x00000041U);
psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
return 1;
}
static unsigned long psu_resetout_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000800U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000280U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x000C0000U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
psu_mask_write(0xFE30C200, 0x00023FFFU, 0x00022457U);
psu_mask_write(0xFE30C630, 0x003FFF00U, 0x00000000U);
psu_mask_write(0xFE30C12C, 0x00004000U, 0x00004000U);
psu_mask_write(0xFE30C11C, 0x00000400U, 0x00000400U);
psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
psu_mask_write(0xFD48001C, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480020, 0x0000FFFFU, 0x0000FFF0U);
psu_mask_write(0xFD480024, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480028, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD48002C, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480030, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480034, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480038, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD48003C, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480040, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480044, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480048, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD48006C, 0x00000738U, 0x00000138U);
psu_mask_write(0xFD4800C8, 0x0000FFF0U, 0x00000000U);
psu_mask_write(0xFD4801A4, 0x000007FFU, 0x00000172U);
psu_mask_write(0xFD4801A8, 0x00003FFFU, 0x00000248U);
psu_mask_write(0xFD4801AC, 0x000007FFU, 0x00000008U);
psu_mask_write(0xFD4801B0, 0x000007FFU, 0x00000020U);
psu_mask_write(0xFD4801B4, 0x0000FFFFU, 0x00007E04U);
psu_mask_write(0xFD480088, 0x0000FFFFU, 0x00000100U);
psu_mask_write(0xFD4800D4, 0x000000FFU, 0x00000060U);
psu_mask_write(0xFD4800A4, 0x000003FFU, 0x00000060U);
psu_mask_write(0xFD480184, 0x00000FFFU, 0x00000041U);
psu_mask_write(0xFD480190, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD480194, 0x0000FFE2U, 0x00000000U);
psu_mask_write(0xFD480200, 0xFFFFFFFFU, 0x10EED011U);
psu_mask_write(0xFD480204, 0xFFFFFFFFU, 0x10EE0007U);
psu_mask_write(0xFD480208, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD480060, 0x0000FFFFU, 0x00008000U);
psu_mask_write(0xFD480064, 0x000001FFU, 0x00000105U);
psu_mask_write(0xFD0E0000, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD480010, 0x00001000U, 0x00000000U);
psu_mask_write(0xFD480164, 0x00001FFEU, 0x00000000U);
psu_mask_write(0xFD4800AC, 0x00000F00U, 0x00000000U);
psu_mask_write(0xFD4800B4, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD48031C, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD48008C, 0x00003000U, 0x00000000U);
psu_mask_write(0xFD480094, 0x00004000U, 0x00004000U);
psu_mask_write(0xFD1A0100, 0x00020000U, 0x00000000U);
mask_poll(0xFD4023E4, 0x00000010U);
mask_poll(0xFD4063E4, 0x00000010U);
return 1;
}
static unsigned long psu_resetin_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000A80U);
psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000004U);
psu_mask_write(0xFD1A0100, 0x000E0000U, 0x000E0000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
return 1;
}
static unsigned long psu_afi_config(void)
{
psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
unsigned int pll_retry = 10;
unsigned int pll_locked = 0;
while ((pll_retry > 0) && (!pll_locked)) {
Xil_Out32(0xFD080004, 0x00040010);
Xil_Out32(0xFD080004, 0x00040011);
while ((Xil_In32(0xFD080030) & 0x1) != 1)
;
pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31;
pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16;
pll_retry--;
}
Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
Xil_Out32(0xFD080004U, 0x00040063U);
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD0701B0U, 0x00000001U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0004FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x80000FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x100091C7U);
Xil_Out32(0xFD080018U, 0x00F01EEFU);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U);
Xil_Out32(0xFD080004, 0x00060001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80004001) != 0x80004001)
regval = Xil_In32(0xFD080030);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U);
Xil_Out32(0xFD080200U, 0x800091C7U);
Xil_Out32(0xFD080018U, 0x00F122E7U);
Xil_Out32(0xFD080004, 0x0000C001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80000C01) != 0x80000C01)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD070180U, 0x01000040U);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
static int serdes_enb_coarse_saturation(void)
{
Xil_Out32(0xFD402094, 0x00000010);
Xil_Out32(0xFD406094, 0x00000010);
Xil_Out32(0xFD40A094, 0x00000010);
Xil_Out32(0xFD40E094, 0x00000010);
return 1;
}
static int serdes_fixcal_code(void)
{
int maskstatus = 1;
unsigned int rdata = 0;
unsigned int match_pmos_code[23];
unsigned int match_nmos_code[23];
unsigned int match_ical_code[7];
unsigned int match_rcal_code[7];
unsigned int p_code = 0;
unsigned int n_code = 0;
unsigned int i_code = 0;
unsigned int r_code = 0;
unsigned int repeat_count = 0;
unsigned int L3_TM_CALIB_DIG20 = 0;
unsigned int L3_TM_CALIB_DIG19 = 0;
unsigned int L3_TM_CALIB_DIG18 = 0;
unsigned int L3_TM_CALIB_DIG16 = 0;
unsigned int L3_TM_CALIB_DIG15 = 0;
unsigned int L3_TM_CALIB_DIG14 = 0;
int i = 0;
int count = 0;
rdata = Xil_In32(0xFD40289C);
rdata = rdata & ~0x03;
rdata = rdata | 0x1;
Xil_Out32(0xFD40289C, rdata);
do {
if (count == 1100000)
break;
rdata = Xil_In32(0xFD402B1C);
count++;
} while ((rdata & 0x0000000E) != 0x0000000E);
for (i = 0; i < 23; i++) {
match_pmos_code[i] = 0;
match_nmos_code[i] = 0;
}
for (i = 0; i < 7; i++) {
match_ical_code[i] = 0;
match_rcal_code[i] = 0;
}
do {
Xil_Out32(0xFD410010, 0x00000000);
Xil_Out32(0xFD410014, 0x00000000);
Xil_Out32(0xFD410010, 0x00000001);
Xil_Out32(0xFD410014, 0x00000000);
maskstatus = mask_poll(0xFD40EF14, 0x2);
if (maskstatus == 0) {
/* xil_printf("#SERDES initialization timed out\n\r");*/
return maskstatus;
}
p_code = mask_read(0xFD40EF18, 0xFFFFFFFF);
n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF);
;
i_code = mask_read(0xFD40EF24, 0xFFFFFFFF);
r_code = mask_read(0xFD40EF28, 0xFFFFFFFF);
;
if ((p_code >= 0x26) && (p_code <= 0x3C))
match_pmos_code[p_code - 0x26] += 1;
if ((n_code >= 0x26) && (n_code <= 0x3C))
match_nmos_code[n_code - 0x26] += 1;
if ((i_code >= 0xC) && (i_code <= 0x12))
match_ical_code[i_code - 0xC] += 1;
if ((r_code >= 0x6) && (r_code <= 0xC))
match_rcal_code[r_code - 0x6] += 1;
} while (repeat_count++ < 10);
for (i = 0; i < 23; i++) {
if (match_pmos_code[i] >= match_pmos_code[0]) {
match_pmos_code[0] = match_pmos_code[i];
p_code = 0x26 + i;
}
if (match_nmos_code[i] >= match_nmos_code[0]) {
match_nmos_code[0] = match_nmos_code[i];
n_code = 0x26 + i;
}
}
for (i = 0; i < 7; i++) {
if (match_ical_code[i] >= match_ical_code[0]) {
match_ical_code[0] = match_ical_code[i];
i_code = 0xC + i;
}
if (match_rcal_code[i] >= match_rcal_code[0]) {
match_rcal_code[0] = match_rcal_code[i];
r_code = 0x6 + i;
}
}
L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0);
L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7);
L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18);
L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6)
| 0x20 | 0x4 | ((n_code >> 3) & 0x3);
L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F);
L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10;
L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8);
L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7);
L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30);
L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7)
| 0x40 | 0x8 | ((i_code >> 1) & 0x7);
L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F);
L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40;
Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20);
Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19);
Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18);
Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16);
Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15);
Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14);
return maskstatus;
}
static int init_serdes(void)
{
int status = 1;
status &= psu_resetin_init_data();
status &= serdes_fixcal_code();
status &= serdes_enb_coarse_saturation();
status &= psu_serdes_init_data();
status &= psu_resetout_init_data();
return status;
}
static void init_peripheral(void)
{
psu_mask_write(0xFD5F0018, 0x8000001FU, 0x8000001FU);
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= init_serdes();
init_peripheral();
status &= psu_afi_config();
if (status == 0)
return 1;
return 0;
}

900
board/xilinx/zynqmp/zynqmp-zc1751-xm018-dc4/psu_init_gpl.c Normal file
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/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x8000C76CU);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x8000497FU);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E0058, 0x063F3F07U, 0x06010C00U);
psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U);
psu_mask_write(0xFF5E0064, 0x023F3F07U, 0x02010600U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E007C, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF5E0080, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF5E0084, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0088, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B4, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U);
psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
psu_mask_write(0xFD1A00B4, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U);
psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x41040010U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0081808BU);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x110C2412U);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060DU);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030309U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030D06U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002020BU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x7007010EU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x020196E5U);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E1U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0A0AU);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x080F0808U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F080808U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000808U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000008U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10010U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x0AC85590U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x41540B00U);
psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06240F08U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28170008U);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00070300U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B07U);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00320F08U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAA58U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180018, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180024, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180028, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180030, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180034, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180038, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180040, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180044, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180048, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180050, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180054, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180058, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180060, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180064, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180068, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180070, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180074, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180078, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180080, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180084, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180088, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180098, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF1800A0, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800A4, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800A8, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800AC, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180100, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180104, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180108, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180110, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180114, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180118, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180120, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180124, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180128, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180130, 0x000000FEU, 0x000000A0U);
psu_mask_write(0xFF180134, 0x000000FEU, 0x000000A0U);
psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0xEC000C00U);
psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0xFC000642U);
psu_mask_write(0xFF18020C, 0x00003FFFU, 0x0000000BU);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFD1A0100, 0x000F807CU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00010000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000000U);
psu_mask_write(0xFF9E0080, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF9E007C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0238, 0x00000180U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000200U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000018U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD17U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
return 1;
}
static unsigned long psu_serdes_init_data(void)
{
psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU);
psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD402864, 0x00000084U, 0x00000004U);
psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD4010CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40189C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4018F8, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD4018FC, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD401990, 0x000000FFU, 0x00000011U);
psu_mask_write(0xFD401924, 0x000000FFU, 0x00000004U);
psu_mask_write(0xFD401928, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD401900, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD401980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD401918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD401944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD3D001C, 0xFFFFFFFFU, 0x00000001U);
psu_mask_write(0xFD480314, 0xFFFFFFFFU, 0x00000004U);
psu_mask_write(0xFD410010, 0x00000077U, 0x00000041U);
psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
return 1;
}
static unsigned long psu_resetout_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000800U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000280U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x000C0000U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
psu_mask_write(0xFE30C200, 0x00023FFFU, 0x00022457U);
psu_mask_write(0xFE30C630, 0x003FFF00U, 0x00000000U);
psu_mask_write(0xFE30C12C, 0x00004000U, 0x00004000U);
psu_mask_write(0xFE30C11C, 0x00000400U, 0x00000400U);
psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
psu_mask_write(0xFD48001C, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480020, 0x0000FFFFU, 0x0000FFF0U);
psu_mask_write(0xFD480024, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480028, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD48002C, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480030, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480034, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480038, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD48003C, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480040, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480044, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480048, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD48006C, 0x00000738U, 0x00000138U);
psu_mask_write(0xFD4800C8, 0x0000FFF0U, 0x00000000U);
psu_mask_write(0xFD4801A4, 0x000007FFU, 0x00000172U);
psu_mask_write(0xFD4801A8, 0x00003FFFU, 0x00000248U);
psu_mask_write(0xFD4801AC, 0x000007FFU, 0x00000008U);
psu_mask_write(0xFD4801B0, 0x000007FFU, 0x00000020U);
psu_mask_write(0xFD4801B4, 0x0000FFFFU, 0x00007E04U);
psu_mask_write(0xFD480088, 0x0000FFFFU, 0x00000100U);
psu_mask_write(0xFD4800D4, 0x000000FFU, 0x00000060U);
psu_mask_write(0xFD4800A4, 0x000003FFU, 0x00000060U);
psu_mask_write(0xFD480184, 0x00000FFFU, 0x00000041U);
psu_mask_write(0xFD480190, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD480194, 0x0000FFE2U, 0x00000000U);
psu_mask_write(0xFD480200, 0xFFFFFFFFU, 0x10EED011U);
psu_mask_write(0xFD480204, 0xFFFFFFFFU, 0x10EE0007U);
psu_mask_write(0xFD480208, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD480060, 0x0000FFFFU, 0x00008000U);
psu_mask_write(0xFD480064, 0x000001FFU, 0x00000105U);
psu_mask_write(0xFD0E0000, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD480010, 0x00001000U, 0x00000000U);
psu_mask_write(0xFD480164, 0x00001FFEU, 0x00000000U);
psu_mask_write(0xFD4800AC, 0x00000F00U, 0x00000000U);
psu_mask_write(0xFD4800B4, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD48031C, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD48008C, 0x00003000U, 0x00000000U);
psu_mask_write(0xFD480094, 0x00004000U, 0x00004000U);
psu_mask_write(0xFD1A0100, 0x00020000U, 0x00000000U);
mask_poll(0xFD4023E4, 0x00000010U);
mask_poll(0xFD4063E4, 0x00000010U);
return 1;
}
static unsigned long psu_resetin_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000A80U);
psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000004U);
psu_mask_write(0xFD1A0100, 0x000E0000U, 0x000E0000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
return 1;
}
static unsigned long psu_afi_config(void)
{
psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
unsigned int pll_retry = 10;
unsigned int pll_locked = 0;
while ((pll_retry > 0) && (!pll_locked)) {
Xil_Out32(0xFD080004, 0x00040010);
Xil_Out32(0xFD080004, 0x00040011);
while ((Xil_In32(0xFD080030) & 0x1) != 1)
;
pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31;
pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16;
pll_retry--;
}
Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
Xil_Out32(0xFD080004U, 0x00040063U);
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD0701B0U, 0x00000001U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0004FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x80000FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x100091C7U);
Xil_Out32(0xFD080018U, 0x00F01EEFU);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U);
Xil_Out32(0xFD080004, 0x00060001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80004001) != 0x80004001)
regval = Xil_In32(0xFD080030);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U);
Xil_Out32(0xFD080200U, 0x800091C7U);
Xil_Out32(0xFD080018U, 0x00F122E7U);
Xil_Out32(0xFD080004, 0x0000C001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80000C01) != 0x80000C01)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD070180U, 0x01000040U);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
static int serdes_enb_coarse_saturation(void)
{
Xil_Out32(0xFD402094, 0x00000010);
Xil_Out32(0xFD406094, 0x00000010);
Xil_Out32(0xFD40A094, 0x00000010);
Xil_Out32(0xFD40E094, 0x00000010);
return 1;
}
static int serdes_fixcal_code(void)
{
int maskstatus = 1;
unsigned int rdata = 0;
unsigned int match_pmos_code[23];
unsigned int match_nmos_code[23];
unsigned int match_ical_code[7];
unsigned int match_rcal_code[7];
unsigned int p_code = 0;
unsigned int n_code = 0;
unsigned int i_code = 0;
unsigned int r_code = 0;
unsigned int repeat_count = 0;
unsigned int L3_TM_CALIB_DIG20 = 0;
unsigned int L3_TM_CALIB_DIG19 = 0;
unsigned int L3_TM_CALIB_DIG18 = 0;
unsigned int L3_TM_CALIB_DIG16 = 0;
unsigned int L3_TM_CALIB_DIG15 = 0;
unsigned int L3_TM_CALIB_DIG14 = 0;
int i = 0;
int count = 0;
rdata = Xil_In32(0xFD40289C);
rdata = rdata & ~0x03;
rdata = rdata | 0x1;
Xil_Out32(0xFD40289C, rdata);
do {
if (count == 1100000)
break;
rdata = Xil_In32(0xFD402B1C);
count++;
} while ((rdata & 0x0000000E) != 0x0000000E);
for (i = 0; i < 23; i++) {
match_pmos_code[i] = 0;
match_nmos_code[i] = 0;
}
for (i = 0; i < 7; i++) {
match_ical_code[i] = 0;
match_rcal_code[i] = 0;
}
do {
Xil_Out32(0xFD410010, 0x00000000);
Xil_Out32(0xFD410014, 0x00000000);
Xil_Out32(0xFD410010, 0x00000001);
Xil_Out32(0xFD410014, 0x00000000);
maskstatus = mask_poll(0xFD40EF14, 0x2);
if (maskstatus == 0) {
/* xil_printf("#SERDES initialization timed out\n\r");*/
return maskstatus;
}
p_code = mask_read(0xFD40EF18, 0xFFFFFFFF);
n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF);
;
i_code = mask_read(0xFD40EF24, 0xFFFFFFFF);
r_code = mask_read(0xFD40EF28, 0xFFFFFFFF);
;
if ((p_code >= 0x26) && (p_code <= 0x3C))
match_pmos_code[p_code - 0x26] += 1;
if ((n_code >= 0x26) && (n_code <= 0x3C))
match_nmos_code[n_code - 0x26] += 1;
if ((i_code >= 0xC) && (i_code <= 0x12))
match_ical_code[i_code - 0xC] += 1;
if ((r_code >= 0x6) && (r_code <= 0xC))
match_rcal_code[r_code - 0x6] += 1;
} while (repeat_count++ < 10);
for (i = 0; i < 23; i++) {
if (match_pmos_code[i] >= match_pmos_code[0]) {
match_pmos_code[0] = match_pmos_code[i];
p_code = 0x26 + i;
}
if (match_nmos_code[i] >= match_nmos_code[0]) {
match_nmos_code[0] = match_nmos_code[i];
n_code = 0x26 + i;
}
}
for (i = 0; i < 7; i++) {
if (match_ical_code[i] >= match_ical_code[0]) {
match_ical_code[0] = match_ical_code[i];
i_code = 0xC + i;
}
if (match_rcal_code[i] >= match_rcal_code[0]) {
match_rcal_code[0] = match_rcal_code[i];
r_code = 0x6 + i;
}
}
L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0);
L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7);
L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18);
L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6)
| 0x20 | 0x4 | ((n_code >> 3) & 0x3);
L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F);
L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10;
L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8);
L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7);
L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30);
L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7)
| 0x40 | 0x8 | ((i_code >> 1) & 0x7);
L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F);
L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40;
Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20);
Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19);
Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18);
Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16);
Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15);
Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14);
return maskstatus;
}
static int init_serdes(void)
{
int status = 1;
status &= psu_resetin_init_data();
status &= serdes_fixcal_code();
status &= serdes_enb_coarse_saturation();
status &= psu_serdes_init_data();
status &= psu_resetout_init_data();
return status;
}
static void init_peripheral(void)
{
psu_mask_write(0xFD5F0018, 0x8000001FU, 0x8000001FU);
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= init_serdes();
init_peripheral();
status &= psu_afi_config();
if (status == 0)
return 1;
return 0;
}

926
board/xilinx/zynqmp/zynqmp-zc1751-xm019-dc5/psu_init_gpl.c Normal file
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@ -0,0 +1,926 @@
/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E514C62U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00013900U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x00000000U);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E0054, 0x063F3F07U, 0x06010C00U);
psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U);
psu_mask_write(0xFF5E006C, 0x013F3F07U, 0x01010602U);
psu_mask_write(0xFF18030C, 0x00000003U, 0x00000000U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010402U);
psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010302U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000104U);
psu_mask_write(0xFD1A00B4, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000202U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x41040010U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0081808BU);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x110C2412U);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060DU);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030309U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030D06U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002020BU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x7007010EU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x020196E5U);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E1U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0A0AU);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x080F0808U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F080808U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000808U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000008U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10010U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x0AC85590U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x41540B00U);
psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06240F08U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28170008U);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00070300U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B07U);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00320F08U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAA58U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180018, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180024, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180028, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180030, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180034, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180038, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180040, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180044, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180048, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180054, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180058, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180060, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180064, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180068, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180070, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180074, 0x000000FEU, 0x00000060U);
psu_mask_write(0xFF180078, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180090, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180098, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800D0, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800D4, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800D8, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800DC, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800E0, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800E4, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800E8, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800EC, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800F0, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800F4, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800F8, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF1800FC, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF180100, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF180104, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF180108, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF18010C, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF180110, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF180114, 0x000000FEU, 0x000000E0U);
psu_mask_write(0xFF180118, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF18011C, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180120, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180124, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180128, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180130, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180134, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0xAF000000U);
psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x0003F000U);
psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000240U);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFD1A0100, 0x000E807CU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000002U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000020U, 0x00000000U);
psu_mask_write(0xFF180310, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180320, 0x00003380U, 0x00000080U);
psu_mask_write(0xFF18031C, 0x00007FFEU, 0x00006450U);
psu_mask_write(0xFF180358, 0x00080000U, 0x00080000U);
psu_mask_write(0xFF180324, 0x000003C0U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x01FC9F08U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF0A0244, 0x03FFFFFFU, 0x00000800U);
psu_mask_write(0xFF0A0248, 0x03FFFFFFU, 0x00000800U);
psu_mask_write(0xFF0A0008, 0xFFFFFFFFU, 0xF7FF0800U);
mask_delay(1);
psu_mask_write(0xFF0A0008, 0xFFFFFFFFU, 0xF7FF0000U);
mask_delay(5);
return 1;
}
static unsigned long psu_serdes_init_data(void)
{
psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU);
psu_mask_write(0xFD410004, 0x0000001FU, 0x0000000DU);
psu_mask_write(0xFD410008, 0x0000001FU, 0x0000000DU);
psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000DU);
psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD402864, 0x00000081U, 0x00000001U);
psu_mask_write(0xFD402868, 0x00000081U, 0x00000001U);
psu_mask_write(0xFD40286C, 0x00000081U, 0x00000001U);
psu_mask_write(0xFD4010CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD4050CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD40D0CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40189C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4018F8, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD4018FC, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD401990, 0x000000FFU, 0x00000011U);
psu_mask_write(0xFD401924, 0x000000FFU, 0x00000004U);
psu_mask_write(0xFD401928, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD401900, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD401980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD401918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD401944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40589C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4058F8, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD4058FC, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD405990, 0x000000FFU, 0x00000011U);
psu_mask_write(0xFD405924, 0x000000FFU, 0x00000004U);
psu_mask_write(0xFD405928, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD405900, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40592C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD405980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD405918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD405940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD405944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4098F8, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD4098FC, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD409990, 0x000000FFU, 0x00000011U);
psu_mask_write(0xFD409924, 0x000000FFU, 0x00000004U);
psu_mask_write(0xFD409928, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD409900, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000011U);
psu_mask_write(0xFD40D924, 0x000000FFU, 0x00000004U);
psu_mask_write(0xFD40D928, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD40D900, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD3D001C, 0xFFFFFFFFU, 0x00000001U);
psu_mask_write(0xFD410010, 0x00000077U, 0x00000011U);
psu_mask_write(0xFD410014, 0x00000077U, 0x00000011U);
return 1;
}
static unsigned long psu_resetout_init_data(void)
{
psu_mask_write(0xFF5E0230, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x000C0000U, 0x00000000U);
psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
psu_mask_write(0xFD48001C, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480020, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480024, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480028, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD48002C, 0x0000FFFFU, 0x0000FFFFU);
psu_mask_write(0xFD480030, 0x0000FFFFU, 0x000000FFU);
psu_mask_write(0xFD480034, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD480038, 0x0000FFFFU, 0x0000FFFFU);
psu_mask_write(0xFD48003C, 0x0000FFFFU, 0x0000FFF0U);
psu_mask_write(0xFD480040, 0x0000FFFFU, 0x0000FFF0U);
psu_mask_write(0xFD480044, 0x0000FFFFU, 0x0000FFF1U);
psu_mask_write(0xFD480048, 0x0000FFFFU, 0x0000FFF1U);
psu_mask_write(0xFD48006C, 0x00000738U, 0x00000100U);
psu_mask_write(0xFD4800C8, 0x0000FFF0U, 0x00000040U);
psu_mask_write(0xFD4801A4, 0x000007FFU, 0x000000CDU);
psu_mask_write(0xFD4801A8, 0x00003FFFU, 0x00000624U);
psu_mask_write(0xFD4801AC, 0x000007FFU, 0x00000018U);
psu_mask_write(0xFD4801B0, 0x000007FFU, 0x000000B5U);
psu_mask_write(0xFD4801B4, 0x0000FFFFU, 0x00007E20U);
psu_mask_write(0xFD480088, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD4800D4, 0x000000FFU, 0x00000060U);
psu_mask_write(0xFD4800A4, 0x000003FFU, 0x00000000U);
psu_mask_write(0xFD480190, 0x00000040U, 0x00000000U);
psu_mask_write(0xFD480194, 0x0000FFE2U, 0x0000FFE2U);
psu_mask_write(0xFD480094, 0x00004200U, 0x00004200U);
psu_mask_write(0xFD480174, 0x0000FFFFU, 0x00009000U);
psu_mask_write(0xFD480200, 0xFFFFFFFFU, 0x10EED011U);
psu_mask_write(0xFD480204, 0xFFFFFFFFU, 0x10EE0007U);
psu_mask_write(0xFD480208, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD480060, 0x0000FFFFU, 0x00008000U);
psu_mask_write(0xFD480064, 0x000001FFU, 0x00000006U);
psu_mask_write(0xFD480010, 0x00001000U, 0x00000000U);
psu_mask_write(0xFD480164, 0x00001FFEU, 0x00000000U);
psu_mask_write(0xFD48013C, 0x00000020U, 0x00000000U);
psu_mask_write(0xFD4800AC, 0x00000100U, 0x00000000U);
psu_mask_write(0xFD4800C0, 0x000007FFU, 0x00000000U);
psu_mask_write(0xFD4800B8, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD4800BC, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD4800B0, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD4800B4, 0x0000FFF8U, 0x00000000U);
psu_mask_write(0xFD48031C, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD48008C, 0x00003000U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x00020000U, 0x00000000U);
psu_mask_write(0xFF0A0008, 0xFFFFFFFFU, 0xF7FF0800U);
mask_poll(0xFD4023E4, 0x00000010U);
return 1;
}
static unsigned long psu_resetin_init_data(void)
{
psu_mask_write(0xFF5E0230, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD1A0100, 0x000E0000U, 0x000E0000U);
return 1;
}
static unsigned long psu_afi_config(void)
{
psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
unsigned int pll_retry = 10;
unsigned int pll_locked = 0;
while ((pll_retry > 0) && (!pll_locked)) {
Xil_Out32(0xFD080004, 0x00040010);
Xil_Out32(0xFD080004, 0x00040011);
while ((Xil_In32(0xFD080030) & 0x1) != 1)
;
pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31;
pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16;
pll_retry--;
}
Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
Xil_Out32(0xFD080004U, 0x00040063U);
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD0701B0U, 0x00000001U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0004FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x80000FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x100091C7U);
Xil_Out32(0xFD080018U, 0x00F01EEFU);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U);
Xil_Out32(0xFD080004, 0x00060001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80004001) != 0x80004001)
regval = Xil_In32(0xFD080030);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U);
Xil_Out32(0xFD080200U, 0x800091C7U);
Xil_Out32(0xFD080018U, 0x00F122E7U);
Xil_Out32(0xFD080004, 0x0000C001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80000C01) != 0x80000C01)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD070180U, 0x01000040U);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
static int serdes_enb_coarse_saturation(void)
{
Xil_Out32(0xFD402094, 0x00000010);
Xil_Out32(0xFD406094, 0x00000010);
Xil_Out32(0xFD40A094, 0x00000010);
Xil_Out32(0xFD40E094, 0x00000010);
return 1;
}
static int serdes_fixcal_code(void)
{
int maskstatus = 1;
unsigned int rdata = 0;
unsigned int match_pmos_code[23];
unsigned int match_nmos_code[23];
unsigned int match_ical_code[7];
unsigned int match_rcal_code[7];
unsigned int p_code = 0;
unsigned int n_code = 0;
unsigned int i_code = 0;
unsigned int r_code = 0;
unsigned int repeat_count = 0;
unsigned int L3_TM_CALIB_DIG20 = 0;
unsigned int L3_TM_CALIB_DIG19 = 0;
unsigned int L3_TM_CALIB_DIG18 = 0;
unsigned int L3_TM_CALIB_DIG16 = 0;
unsigned int L3_TM_CALIB_DIG15 = 0;
unsigned int L3_TM_CALIB_DIG14 = 0;
int i = 0;
int count = 0;
rdata = Xil_In32(0xFD40289C);
rdata = rdata & ~0x03;
rdata = rdata | 0x1;
Xil_Out32(0xFD40289C, rdata);
do {
if (count == 1100000)
break;
rdata = Xil_In32(0xFD402B1C);
count++;
} while ((rdata & 0x0000000E) != 0x0000000E);
for (i = 0; i < 23; i++) {
match_pmos_code[i] = 0;
match_nmos_code[i] = 0;
}
for (i = 0; i < 7; i++) {
match_ical_code[i] = 0;
match_rcal_code[i] = 0;
}
do {
Xil_Out32(0xFD410010, 0x00000000);
Xil_Out32(0xFD410014, 0x00000000);
Xil_Out32(0xFD410010, 0x00000001);
Xil_Out32(0xFD410014, 0x00000000);
maskstatus = mask_poll(0xFD40EF14, 0x2);
if (maskstatus == 0) {
/* xil_printf("#SERDES initialization timed out\n\r");*/
return maskstatus;
}
p_code = mask_read(0xFD40EF18, 0xFFFFFFFF);
n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF);
;
i_code = mask_read(0xFD40EF24, 0xFFFFFFFF);
r_code = mask_read(0xFD40EF28, 0xFFFFFFFF);
;
if ((p_code >= 0x26) && (p_code <= 0x3C))
match_pmos_code[p_code - 0x26] += 1;
if ((n_code >= 0x26) && (n_code <= 0x3C))
match_nmos_code[n_code - 0x26] += 1;
if ((i_code >= 0xC) && (i_code <= 0x12))
match_ical_code[i_code - 0xC] += 1;
if ((r_code >= 0x6) && (r_code <= 0xC))
match_rcal_code[r_code - 0x6] += 1;
} while (repeat_count++ < 10);
for (i = 0; i < 23; i++) {
if (match_pmos_code[i] >= match_pmos_code[0]) {
match_pmos_code[0] = match_pmos_code[i];
p_code = 0x26 + i;
}
if (match_nmos_code[i] >= match_nmos_code[0]) {
match_nmos_code[0] = match_nmos_code[i];
n_code = 0x26 + i;
}
}
for (i = 0; i < 7; i++) {
if (match_ical_code[i] >= match_ical_code[0]) {
match_ical_code[0] = match_ical_code[i];
i_code = 0xC + i;
}
if (match_rcal_code[i] >= match_rcal_code[0]) {
match_rcal_code[0] = match_rcal_code[i];
r_code = 0x6 + i;
}
}
L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0);
L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7);
L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18);
L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6)
| 0x20 | 0x4 | ((n_code >> 3) & 0x3);
L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F);
L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10;
L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8);
L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7);
L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30);
L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7)
| 0x40 | 0x8 | ((i_code >> 1) & 0x7);
L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F);
L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40;
Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20);
Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19);
Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18);
Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16);
Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15);
Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14);
return maskstatus;
}
static int init_serdes(void)
{
int status = 1;
status &= psu_resetin_init_data();
status &= serdes_fixcal_code();
status &= serdes_enb_coarse_saturation();
status &= psu_serdes_init_data();
status &= psu_resetout_init_data();
return status;
}
static void init_peripheral(void)
{
psu_mask_write(0xFD5F0018, 0x8000001FU, 0x8000001FU);
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= init_serdes();
init_peripheral();
status &= psu_afi_config();
if (status == 0)
return 1;
return 0;
}

993
board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c Normal file
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@ -0,0 +1,993 @@
/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x00000000U);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
psu_mask_write(0xFF5E0064, 0x023F3F07U, 0x02010600U);
psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x020F0500U);
psu_mask_write(0xFF5E006C, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF18030C, 0x00020003U, 0x00000000U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E007C, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF5E0080, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U);
psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U);
psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000400U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0xC3081020U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000102U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x0028B090U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00404310U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x00208030U);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0030051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x0002020AU);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00360000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00001205U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x00240012U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00310008U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x00000000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000077FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x0E0B010CU);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00030412U);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x04070F0DU);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x00A05000U);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x05040306U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x01020404U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000201U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030303U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0004040DU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x440C011CU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x810B0008U);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x00E32DCBU);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B8206U);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00A00070U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000004U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000901U);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x00000015U);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x00070707U);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x0F000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x060F0606U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F060606U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000000U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x06060606U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x06060606U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000006U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x04000400U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000000U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x87001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F03D28U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x85642AD0U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xA0AA0580U);
psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x05102000U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A040A1U);
psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0000040DU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06180C08U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x2816050AU);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00080064U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x82000501U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x00602B08U);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00231008U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x0000080EU);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000024U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000012U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000031U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000056U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x00000021U);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x00000019U);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000016U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x810091C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00030236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12340800U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x0000000AU);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300BD99U);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF1032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x00894C58U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x0001B39BU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x0001BB9BU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00F50CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09091616U);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00F50CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09091616U);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00F50CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09091616U);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00F50CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09091616U);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00BD0CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09091616U);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00BD0CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09091616U);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00BD0CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09091616U);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00BD0CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09091616U);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00BD0CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09091616U);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x05102000U);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x000C1800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x71000000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x05102000U);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x000C1800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x71000000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x05102000U);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x000C1800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x71000000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x05102000U);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x000C1800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x71000000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x05102000U);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x000C1800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x71000000U);
psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x05102000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
return 1;
}
static unsigned long psu_ddr_qos_init_data(void)
{
psu_mask_write(0xFD090000, 0x0000FFFFU, 0x00000845U);
psu_mask_write(0xFD090004, 0x002DB5ADU, 0x002DB5ADU);
psu_mask_write(0xFD090800, 0xFFFFFFFFU, 0x00000001U);
psu_mask_write(0xFD09000C, 0x0000007FU, 0x00000010U);
psu_mask_write(0xFD090010, 0x0000007FU, 0x00000010U);
psu_mask_write(0xFD380008, 0x0000000FU, 0x00000007U);
psu_mask_write(0xFD38001C, 0x0000000FU, 0x0000000FU);
psu_mask_write(0xFD390008, 0x0000000FU, 0x00000003U);
psu_mask_write(0xFD39001C, 0x0000000FU, 0x00000003U);
psu_mask_write(0xFD3A0008, 0x0000000FU, 0x00000003U);
psu_mask_write(0xFD3A001C, 0x0000000FU, 0x00000003U);
psu_mask_write(0xFD3B0008, 0x0000000FU, 0x00000003U);
psu_mask_write(0xFD3B001C, 0x0000000FU, 0x00000003U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180018, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180024, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180028, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF180030, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180034, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180038, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180040, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180044, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180048, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180054, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180058, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180060, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180064, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180098, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000080U);
psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180100, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180104, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180108, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180110, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180114, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180118, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180120, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180124, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180128, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180130, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180134, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x51000006U);
psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B00000U);
psu_mask_write(0xFF18020C, 0x00003FFFU, 0x0000000BU);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x039E1FFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFD1A0100, 0x0001007CU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000FC0U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000060U, 0x00000000U);
psu_mask_write(0xFF180310, 0x00008001U, 0x00000000U);
psu_mask_write(0xFF180320, 0x33803380U, 0x00800080U);
psu_mask_write(0xFF18031C, 0x00007FFEU, 0x00006450U);
psu_mask_write(0xFF180358, 0x00080000U, 0x00080000U);
psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U);
psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF180324, 0x000003C0U, 0x00000000U);
psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000400U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000018U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000800U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
psu_mask_write(0xFD4AB120, 0x00000007U, 0x00000007U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD17U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
return 1;
}
static unsigned long psu_serdes_init_data(void)
{
psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U);
psu_mask_write(0xFD41000C, 0x0000001FU, 0x00000008U);
psu_mask_write(0xFD402860, 0x00000082U, 0x00000002U);
psu_mask_write(0xFD402864, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD402868, 0x00000081U, 0x00000001U);
psu_mask_write(0xFD40286C, 0x00000081U, 0x00000001U);
psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40E094, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U);
psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD40E368, 0x000000FFU, 0x00000038U);
psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U);
psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U);
psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000F4U);
psu_mask_write(0xFD40E374, 0x000000FFU, 0x00000031U);
psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40E37C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD40D06C, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD40C0F4, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD40D0CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U);
psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000010U);
psu_mask_write(0xFD40D924, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U);
psu_mask_write(0xFD410014, 0x00000077U, 0x00000033U);
psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U);
return 1;
}
static unsigned long psu_resetout_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000800U, 0x00000000U);
psu_mask_write(0xFF9E0080, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF9E007C, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000280U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U);
psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U);
psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U);
psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U);
psu_mask_write(0xFE30C200, 0x00023FFFU, 0x00022457U);
psu_mask_write(0xFE30C630, 0x003FFF00U, 0x00000000U);
psu_mask_write(0xFE30C12C, 0x00004000U, 0x00004000U);
psu_mask_write(0xFE30C11C, 0x00000600U, 0x00000600U);
psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
mask_poll(0xFD4063E4, 0x00000010U);
mask_poll(0xFD40A3E4, 0x00000010U);
mask_poll(0xFD40E3E4, 0x00000010U);
return 1;
}
static unsigned long psu_resetin_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U);
psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000A80U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
return 1;
}
static unsigned long psu_afi_config(void)
{
psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
psu_mask_write(0xFF419000, 0x00000300U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
unsigned int pll_retry = 10;
unsigned int pll_locked = 0;
while ((pll_retry > 0) && (!pll_locked)) {
Xil_Out32(0xFD080004, 0x00040010);
Xil_Out32(0xFD080004, 0x00040011);
while ((Xil_In32(0xFD080030) & 0x1) != 1)
;
pll_locked = (Xil_In32(0xFD080030) & 0x80000000)
>> 31;
pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000)
>> 16;
pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000)
>> 16;
pll_retry--;
}
Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
Xil_Out32(0xFD080004U, 0x00040063U);
Xil_Out32(0xFD090000U, 0x00000845U);
Xil_Out32(0xFD090004U, 0x003FFFFFU);
Xil_Out32(0xFD09000CU, 0x00000010U);
Xil_Out32(0xFD090010U, 0x00000010U);
Xil_Out32(0xFD090800U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD070010U, 0x80000038U);
Xil_Out32(0xFD0701B0U, 0x00000005U);
regval = Xil_In32(0xFD070018);
while ((regval & 0x1) != 0x0)
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
Xil_Out32(0xFD070014U, 0x00000331U);
Xil_Out32(0xFD070010U, 0x80000038U);
regval = Xil_In32(0xFD070018);
while ((regval & 0x1) != 0x0)
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
Xil_Out32(0xFD070014U, 0x00000B36U);
Xil_Out32(0xFD070010U, 0x80000038U);
regval = Xil_In32(0xFD070018);
while ((regval & 0x1) != 0x0)
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
Xil_Out32(0xFD070014U, 0x00000C21U);
Xil_Out32(0xFD070010U, 0x80000038U);
regval = Xil_In32(0xFD070018);
while ((regval & 0x1) != 0x0)
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
Xil_Out32(0xFD070014U, 0x00000E19U);
Xil_Out32(0xFD070010U, 0x80000038U);
regval = Xil_In32(0xFD070018);
while ((regval & 0x1) != 0x0)
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
regval = Xil_In32(0xFD070018);
Xil_Out32(0xFD070014U, 0x00001616U);
Xil_Out32(0xFD070010U, 0x80000038U);
Xil_Out32(0xFD070010U, 0x80000030U);
Xil_Out32(0xFD0701B0U, 0x00000005U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0014FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x8000007E)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x010091C7U);
regval = Xil_In32(0xFD080030);
while (regval != 0x80008FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x810091C7U);
Xil_Out32(0xFD070180U, 0x010B0008U);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD070020U, 0x00000001U, 0x00000000U, 0x00000001U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
static int serdes_enb_coarse_saturation(void)
{
Xil_Out32(0xFD402094, 0x00000010);
Xil_Out32(0xFD406094, 0x00000010);
Xil_Out32(0xFD40A094, 0x00000010);
Xil_Out32(0xFD40E094, 0x00000010);
return 1;
}
static int serdes_fixcal_code(void)
{
int maskstatus = 1;
unsigned int match_pmos_code[23];
unsigned int match_nmos_code[23];
unsigned int match_ical_code[7];
unsigned int match_rcal_code[7];
unsigned int p_code = 0;
unsigned int n_code = 0;
unsigned int i_code = 0;
unsigned int r_code = 0;
unsigned int repeat_count = 0;
unsigned int L3_TM_CALIB_DIG20 = 0;
unsigned int L3_TM_CALIB_DIG19 = 0;
unsigned int L3_TM_CALIB_DIG18 = 0;
unsigned int L3_TM_CALIB_DIG16 = 0;
unsigned int L3_TM_CALIB_DIG15 = 0;
unsigned int L3_TM_CALIB_DIG14 = 0;
int i = 0;
for (i = 0; i < 23; i++) {
match_pmos_code[i] = 0;
match_nmos_code[i] = 0;
}
for (i = 0; i < 7; i++) {
match_ical_code[i] = 0;
match_rcal_code[i] = 0;
}
do {
Xil_Out32(0xFD410010, 0x00000000);
Xil_Out32(0xFD410014, 0x00000000);
Xil_Out32(0xFD410010, 0x00000001);
Xil_Out32(0xFD410014, 0x00000000);
maskstatus = mask_poll(0xFD40EF14, 0x2);
if (maskstatus == 0) {
/* xil_printf("#SERDES initialization timed out\n\r");*/
return maskstatus;
}
p_code = mask_read(0xFD40EF18, 0xFFFFFFFF);
n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF);
;
i_code = mask_read(0xFD40EF24, 0xFFFFFFFF);
r_code = mask_read(0xFD40EF28, 0xFFFFFFFF);
;
if ((p_code >= 0x26) && (p_code <= 0x3C))
match_pmos_code[p_code - 0x26] += 1;
if ((n_code >= 0x26) && (n_code <= 0x3C))
match_nmos_code[n_code - 0x26] += 1;
if ((i_code >= 0xC) && (i_code <= 0x12))
match_ical_code[i_code - 0xC] += 1;
if ((r_code >= 0x6) && (r_code <= 0xC))
match_rcal_code[r_code - 0x6] += 1;
} while (repeat_count++ < 10);
for (i = 0; i < 23; i++) {
if (match_pmos_code[i] >= match_pmos_code[0]) {
match_pmos_code[0] = match_pmos_code[i];
p_code = 0x26 + i;
}
if (match_nmos_code[i] >= match_nmos_code[0]) {
match_nmos_code[0] = match_nmos_code[i];
n_code = 0x26 + i;
}
}
for (i = 0; i < 7; i++) {
if (match_ical_code[i] >= match_ical_code[0]) {
match_ical_code[0] = match_ical_code[i];
i_code = 0xC + i;
}
if (match_rcal_code[i] >= match_rcal_code[0]) {
match_rcal_code[0] = match_rcal_code[i];
r_code = 0x6 + i;
}
}
L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0);
L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7);
L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18);
L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6)
| 0x20 | 0x4 | ((n_code >> 3) & 0x3);
L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F);
L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10;
L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8);
L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7);
L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30);
L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7)
| 0x40 | 0x8 | ((i_code >> 1) & 0x7);
L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F);
L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40;
Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20);
Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19);
Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18);
Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16);
Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15);
Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14);
return maskstatus;
}
static int init_serdes(void)
{
int status = 1;
status &= psu_resetin_init_data();
status &= serdes_fixcal_code();
status &= serdes_enb_coarse_saturation();
status &= psu_serdes_init_data();
status &= psu_resetout_init_data();
return status;
}
static void init_peripheral(void)
{
psu_mask_write(0xFD5F0018, 0x0000001FU, 0x0000001FU);
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= init_serdes();
init_peripheral();
status &= psu_afi_config();
psu_ddr_qos_init_data();
if (status == 0)
return 1;
return 0;
}

826
board/xilinx/zynqmp/zynqmp-zcu102-revA/psu_init_gpl.c Normal file
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@ -0,0 +1,826 @@
/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E514C62U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00013900U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x8000820CU);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U);
psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x020F0500U);
psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U);
psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010602U);
psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0088, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010402U);
psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010302U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010303U);
psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01012700U);
psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01011103U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0064, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000202U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x41040010U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000300U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0082808BU);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x09300301U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x11112412U);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x0004041AU);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060EU);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030309U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040D06U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002020BU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x6F07010EU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x02019707U);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E2U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0A0AU);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x080F0808U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F080808U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000808U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000008U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000600FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000600FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000600FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000600FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000600FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000600FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000600FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10028U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x5E001810U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x008005F0U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04121U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06240F09U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28220708U);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00080200U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B08U);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00340F09U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000830U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0B0U);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008A2A58U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000077DDU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080788, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0807C0, 0xFFFFFFFFU, 0x00020000U);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080888, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0808C0, 0xFFFFFFFFU, 0x00020000U);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080988, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0809C0, 0xFFFFFFFFU, 0x00020000U);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A88, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080AC0, 0xFFFFFFFFU, 0x00020000U);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B88, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080BC0, 0xFFFFFFFFU, 0x00020000U);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C88, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080CC0, 0xFFFFFFFFU, 0x00020000U);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D88, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080DC0, 0xFFFFFFFFU, 0x00020000U);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E88, 0xFFFFFFFFU, 0x0000000AU);
psu_mask_write(0xFD080EC0, 0xFFFFFFFFU, 0x00020000U);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F88, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080FC0, 0xFFFFFFFFU, 0x00020000U);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
psu_mask_write(0xFD080004, 0xFFFFFFFFU, 0x00040073U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180020, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180024, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180028, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180030, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180038, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF18004C, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180050, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180054, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180060, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180064, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180090, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180094, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x52240000U);
psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B03000U);
psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFF5E0238, 0x00100000U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U);
psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x0001807EU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U);
psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF180320, 0x33800000U, 0x00800000U);
psu_mask_write(0xFF18031C, 0x7F800000U, 0x63800000U);
psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000100U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
psu_mask_write(0xFE980FB0, 0xFFFFFFFFU, 0xC5ACCE55U);
psu_mask_write(0xFE980004, 0x80000000U, 0x80000000U);
psu_mask_write(0xFE980FB0, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5E100U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
return 1;
}
static unsigned long psu_serdes_init_data(void)
{
psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U);
psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000FU);
psu_mask_write(0xFD402860, 0x00000088U, 0x00000008U);
psu_mask_write(0xFD402864, 0x00000088U, 0x00000008U);
psu_mask_write(0xFD402868, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD40286C, 0x00000082U, 0x00000002U);
psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U);
psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD40E368, 0x000000FFU, 0x000000E0U);
psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U);
psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U);
psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000C9U);
psu_mask_write(0xFD40E374, 0x000000FFU, 0x000000D2U);
psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD40E37C, 0x000000B3U, 0x000000B0U);
psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD40E360, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D06C, 0x0000000FU, 0x0000000FU);
psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x0000000BU);
psu_mask_write(0xFD40CB00, 0x000000F0U, 0x000000F0U);
psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U);
psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD40D924, 0x000000FFU, 0x0000009CU);
psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000039U);
psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U);
psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U);
psu_mask_write(0xFD410014, 0x00000077U, 0x00000023U);
psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40C1D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40DC14, 0x000000FFU, 0x000000E6U);
psu_mask_write(0xFD40DC40, 0x0000001FU, 0x0000000CU);
psu_mask_write(0xFD40D94C, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD40D950, 0x00000007U, 0x00000006U);
psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD40C048, 0x000000FFU, 0x00000001U);
return 1;
}
static unsigned long psu_resetout_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
psu_mask_write(0xFE20C200, 0x00003FBFU, 0x00002417U);
psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U);
psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
mask_poll(0xFD4063E4, 0x00000010U);
mask_poll(0xFD40A3E4, 0x00000010U);
mask_poll(0xFD40E3E4, 0x00000010U);
psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184018U);
psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081406U);
psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U);
psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U);
return 1;
}
static unsigned long psu_resetin_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
int dpll_divisor;
dpll_divisor = (Xil_In32(0xFD1A0080U) & 0x00003F00U) >> 0x00000008U;
prog_reg(0xFD1A0080U, 0x00003F00U, 0x00000008U, 0x00000005U);
prog_reg(0xFD080028U, 0x00000001U, 0x00000000U, 0x00000001U);
Xil_Out32(0xFD080004U, 0x00040003U);
while ((Xil_In32(0xFD080030U) & 0x00000001U) != 0x00000001U)
;
prog_reg(0xFD080684U, 0x06000000U, 0x00000019U, 0x00000001U);
prog_reg(0xFD0806A4U, 0x06000000U, 0x00000019U, 0x00000001U);
prog_reg(0xFD0806C4U, 0x06000000U, 0x00000019U, 0x00000001U);
prog_reg(0xFD0806E4U, 0x06000000U, 0x00000019U, 0x00000001U);
prog_reg(0xFD1A0080, 0x3F00, 0x8, dpll_divisor);
Xil_Out32(0xFD080004U, 0x40040071U);
while ((Xil_In32(0xFD080030U) & 0x00000001U) != 0x00000001U)
;
Xil_Out32(0xFD080004U, 0x40040001U);
while ((Xil_In32(0xFD080030U) & 0x00000001U) != 0x00000001U)
;
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD0701B0U, 0x00000001U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0004FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x80000FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x100091C7U);
Xil_Out32(0xFD080018U, 0x00F01EF2U);
Xil_Out32(0xFD08001CU, 0x55AA5498U);
Xil_Out32(0xFD08142CU, 0x00041830U);
Xil_Out32(0xFD08146CU, 0x00041830U);
Xil_Out32(0xFD0814ACU, 0x00041830U);
Xil_Out32(0xFD0814ECU, 0x00041830U);
Xil_Out32(0xFD08152CU, 0x00041830U);
Xil_Out32(0xFD080004, 0x00060001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80004001) != 0x80004001)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x800091C7U);
Xil_Out32(0xFD080018U, 0x00F12302U);
Xil_Out32(0xFD08001CU, 0x55AA5480U);
Xil_Out32(0xFD08142CU, 0x00041800U);
Xil_Out32(0xFD08146CU, 0x00041800U);
Xil_Out32(0xFD0814ACU, 0x00041800U);
Xil_Out32(0xFD0814ECU, 0x00041800U);
Xil_Out32(0xFD08152CU, 0x00041800U);
Xil_Out32(0xFD080004, 0x0000C001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80000C01) != 0x80000C01)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD070180U, 0x01000040U);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
static int serdes_fixcal_code(void)
{
int maskstatus = 1;
unsigned int tmp_0_1, tmp_0_2, tmp_0_3, tmp_0_2_mod;
Xil_Out32(0xFD40EC4C, 0x00000020);
Xil_Out32(0xFD410010, 0x00000001);
maskstatus = mask_poll(0xFD40EF14, 0x2);
if (maskstatus == 0) {
/* xil_printf("SERDES initialization timed out\n\r"); */
return maskstatus;
}
tmp_0_1 = mask_read(0xFD400B0C, 0x3F);
tmp_0_2 = tmp_0_1 & (0x7);
tmp_0_3 = tmp_0_1 & (0x38);
Xil_Out32(0xFD410010, 0x00000000);
Xil_Out32(0xFD410014, 0x00000000);
tmp_0_2_mod = (tmp_0_2 << 1) | (0x1);
tmp_0_2_mod = (tmp_0_2_mod << 4);
tmp_0_3 = tmp_0_3 >> 3;
Xil_Out32(0xFD40EC4C, tmp_0_3);
Xil_Out32(0xFD40EC48, tmp_0_2_mod);
return maskstatus;
}
static int serdes_enb_coarse_saturation(void)
{
Xil_Out32(0xFD402094, 0x00000010);
Xil_Out32(0xFD406094, 0x00000010);
Xil_Out32(0xFD40A094, 0x00000010);
Xil_Out32(0xFD40E094, 0x00000010);
return 1;
}
static int init_serdes(void)
{
int status = 1;
status &= psu_resetin_init_data();
status &= serdes_fixcal_code();
status &= serdes_enb_coarse_saturation();
status &= psu_serdes_init_data();
status &= psu_resetout_init_data();
return status;
}
static void init_peripheral(void)
{
unsigned int regvalue;
unsigned int tmp_regval;
Xil_Out32(((0xFF5E0000U) + 0x00000230U), 0x00000000);
Xil_Out32(((0xFF5E0000U) + 0x00000234U), 0x00000000);
Xil_Out32(((0xFF5E0000U) + 0x00000238U), 0x00000000);
regvalue = Xil_In32(((0xFF5E0000U) + 0x0000023CU));
regvalue &= 0x7;
Xil_Out32(((0xFF5E0000U) + 0x0000023CU), regvalue);
Xil_Out32(((0xFD1A0000U) + 0x00000100U), 0x00000000);
tmp_regval = Xil_In32(0xFD690040);
tmp_regval &= ~0x00000001;
Xil_Out32(0xFD690040, tmp_regval);
tmp_regval = Xil_In32(0xFD690030);
tmp_regval &= ~0x00000001;
Xil_Out32(0xFD690030, tmp_regval);
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= init_serdes();
init_peripheral();
if (status == 0)
return 1;
return 0;
}

878
board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c Normal file
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@ -0,0 +1,878 @@
/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x00000000U);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U);
psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U);
psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x020F0500U);
psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010C00U);
psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U);
psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0088, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U);
psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U);
psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010400U);
psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U);
psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x81040010U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0081808BU);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x11102412U);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x0004041AU);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060DU);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030409U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030D06U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002030BU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x7007010EU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x020196E5U);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E1U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0909U);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x070F0707U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F070707U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00001F08U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x07070707U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x07070707U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000007U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10010U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x0AC85590U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x41540B00U);
psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x07240F08U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28200008U);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00070300U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B07U);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00330F08U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12340800U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAA58U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09094F4FU);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x01100000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF18004C, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180050, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180054, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180060, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180064, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180204, 0x7B3F003FU, 0x52240000U);
psu_mask_write(0xFF180208, 0xFFFFE000U, 0x00B02000U);
psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFD1A0100, 0x0001807EU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180390, 0x00000004U, 0x00000004U);
psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U);
psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF180320, 0x33800000U, 0x00800000U);
psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U);
psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000100U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000400U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
psu_mask_write(0xFD4AB120, 0x00000007U, 0x00000007U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD17U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
return 1;
}
static unsigned long psu_serdes_init_data(void)
{
psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U);
psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000FU);
psu_mask_write(0xFD402860, 0x00000088U, 0x00000008U);
psu_mask_write(0xFD402864, 0x00000088U, 0x00000008U);
psu_mask_write(0xFD402868, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD40286C, 0x00000082U, 0x00000002U);
psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U);
psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD40E368, 0x000000FFU, 0x000000E0U);
psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U);
psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U);
psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000C9U);
psu_mask_write(0xFD40E374, 0x000000FFU, 0x000000D2U);
psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD40E37C, 0x000000B3U, 0x000000B0U);
psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD40E360, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D06C, 0x0000000FU, 0x0000000FU);
psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x0000000BU);
psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U);
psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD40D924, 0x000000FFU, 0x0000009CU);
psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000039U);
psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U);
psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U);
psu_mask_write(0xFD410014, 0x00000077U, 0x00000023U);
psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40C1D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40DC14, 0x000000FFU, 0x000000E6U);
psu_mask_write(0xFD40DC40, 0x0000001FU, 0x0000000CU);
psu_mask_write(0xFD40D94C, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD40D950, 0x00000007U, 0x00000006U);
psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD40C048, 0x000000FFU, 0x00000001U);
return 1;
}
static unsigned long psu_resetout_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U);
psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U);
psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U);
psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U);
psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
mask_poll(0xFD4063E4, 0x00000010U);
mask_poll(0xFD40A3E4, 0x00000010U);
mask_poll(0xFD40E3E4, 0x00000010U);
psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184018U);
psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081406U);
psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U);
psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U);
return 1;
}
static unsigned long psu_resetin_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
return 1;
}
static unsigned long psu_afi_config(void)
{
psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
unsigned int pll_retry = 10;
unsigned int pll_locked = 0;
while ((pll_retry > 0) && (!pll_locked)) {
Xil_Out32(0xFD080004, 0x00040010);
Xil_Out32(0xFD080004, 0x00040011);
while ((Xil_In32(0xFD080030) & 0x1) != 1)
;
pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31;
pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16;
pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16;
pll_retry--;
}
Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16));
Xil_Out32(0xFD080004U, 0x00040063U);
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD0701B0U, 0x00000001U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0004FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x80000FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x100091C7U);
Xil_Out32(0xFD080018U, 0x00F01EEFU);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U);
Xil_Out32(0xFD080004, 0x00060001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80004001) != 0x80004001)
regval = Xil_In32(0xFD080030);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U);
Xil_Out32(0xFD080200U, 0x800091C7U);
Xil_Out32(0xFD080018U, 0x00F122E7U);
Xil_Out32(0xFD080004, 0x0000C001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80000C01) != 0x80000C01)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD070180U, 0x01000040U);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
static int serdes_enb_coarse_saturation(void)
{
Xil_Out32(0xFD402094, 0x00000010);
Xil_Out32(0xFD406094, 0x00000010);
Xil_Out32(0xFD40A094, 0x00000010);
Xil_Out32(0xFD40E094, 0x00000010);
return 1;
}
static int serdes_fixcal_code(void)
{
int maskstatus = 1;
unsigned int match_pmos_code[23];
unsigned int match_nmos_code[23];
unsigned int match_ical_code[7];
unsigned int match_rcal_code[7];
unsigned int p_code = 0;
unsigned int n_code = 0;
unsigned int i_code = 0;
unsigned int r_code = 0;
unsigned int repeat_count = 0;
unsigned int L3_TM_CALIB_DIG20 = 0;
unsigned int L3_TM_CALIB_DIG19 = 0;
unsigned int L3_TM_CALIB_DIG18 = 0;
unsigned int L3_TM_CALIB_DIG16 = 0;
unsigned int L3_TM_CALIB_DIG15 = 0;
unsigned int L3_TM_CALIB_DIG14 = 0;
int i = 0;
for (i = 0; i < 23; i++) {
match_pmos_code[i] = 0;
match_nmos_code[i] = 0;
}
for (i = 0; i < 7; i++) {
match_ical_code[i] = 0;
match_rcal_code[i] = 0;
}
do {
Xil_Out32(0xFD410010, 0x00000000);
Xil_Out32(0xFD410014, 0x00000000);
Xil_Out32(0xFD410010, 0x00000001);
Xil_Out32(0xFD410014, 0x00000000);
maskstatus = mask_poll(0xFD40EF14, 0x2);
if (maskstatus == 0) {
/* xil_printf("#SERDES initialization timed out\n\r");*/
return maskstatus;
}
p_code = mask_read(0xFD40EF18, 0xFFFFFFFF);
n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF);
;
i_code = mask_read(0xFD40EF24, 0xFFFFFFFF);
r_code = mask_read(0xFD40EF28, 0xFFFFFFFF);
;
if ((p_code >= 0x26) && (p_code <= 0x3C))
match_pmos_code[p_code - 0x26] += 1;
if ((n_code >= 0x26) && (n_code <= 0x3C))
match_nmos_code[n_code - 0x26] += 1;
if ((i_code >= 0xC) && (i_code <= 0x12))
match_ical_code[i_code - 0xC] += 1;
if ((r_code >= 0x6) && (r_code <= 0xC))
match_rcal_code[r_code - 0x6] += 1;
} while (repeat_count++ < 10);
for (i = 0; i < 23; i++) {
if (match_pmos_code[i] >= match_pmos_code[0]) {
match_pmos_code[0] = match_pmos_code[i];
p_code = 0x26 + i;
}
if (match_nmos_code[i] >= match_nmos_code[0]) {
match_nmos_code[0] = match_nmos_code[i];
n_code = 0x26 + i;
}
}
for (i = 0; i < 7; i++) {
if (match_ical_code[i] >= match_ical_code[0]) {
match_ical_code[0] = match_ical_code[i];
i_code = 0xC + i;
}
if (match_rcal_code[i] >= match_rcal_code[0]) {
match_rcal_code[0] = match_rcal_code[i];
r_code = 0x6 + i;
}
}
L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0);
L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7);
L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18);
L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6)
| 0x20 | 0x4 | ((n_code >> 3) & 0x3);
L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F);
L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10;
L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8);
L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7);
L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30);
L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7)
| 0x40 | 0x8 | ((i_code >> 1) & 0x7);
L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F);
L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40;
Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20);
Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19);
Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18);
Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16);
Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15);
Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14);
return maskstatus;
}
static int init_serdes(void)
{
int status = 1;
status &= psu_resetin_init_data();
status &= serdes_fixcal_code();
status &= serdes_enb_coarse_saturation();
status &= psu_serdes_init_data();
status &= psu_resetout_init_data();
return status;
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= init_serdes();
status &= psu_afi_config();
if (status == 0)
return 1;
return 0;
}

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board/xilinx/zynqmp/zynqmp-zcu104-revC Symbolic link
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zynqmp-zcu104-revA

802
board/xilinx/zynqmp/zynqmp-zcu106-revA/psu_init_gpl.c Normal file
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/*
* (c) Copyright 2015 Xilinx, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/psu_init_gpl.h>
#include <xil_io.h>
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4E2C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000002U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000200U);
psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U);
psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U);
mask_poll(0xFF5E0040, 0x00000001U);
psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000001U);
psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U);
psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000002U);
psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000200U);
psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U);
psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015900U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U);
mask_poll(0xFD1A0044, 0x00000004U);
psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U);
psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x80008E69U);
return 1;
}
static unsigned long psu_clock_init_data(void)
{
psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U);
psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U);
psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U);
psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010500U);
psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010502U);
psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U);
psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0088, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U);
psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U);
psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010A02U);
psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01010F00U);
psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010A02U);
psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010A02U);
psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U);
psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U);
psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U);
psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010203U);
psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01013C00U);
psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01011303U);
psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U);
psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U);
psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U);
psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000302U);
psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U);
psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U);
psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U);
return 1;
}
static unsigned long psu_ddr_init_data(void)
{
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x41040010U);
psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U);
psu_mask_write(0xFD070020, 0x000003F3U, 0x00000300U);
psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U);
psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U);
psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U);
psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U);
psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U);
psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0082808BU);
psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U);
psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U);
psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU);
psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U);
psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U);
psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U);
psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x09300301U);
psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U);
psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U);
psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U);
psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U);
psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU);
psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x11112412U);
psu_mask_write(0xFD070104, 0x001F1F7FU, 0x0004041AU);
psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060EU);
psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU);
psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030309U);
psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U);
psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U);
psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U);
psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040D06U);
psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002020BU);
psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x6F07010EU);
psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U);
psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U);
psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x02019707U);
psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU);
psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U);
psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U);
psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U);
psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U);
psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E2U);
psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U);
psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U);
psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U);
psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU);
psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0A0AU);
psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U);
psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x080F0808U);
psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F080808U);
psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU);
psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000808U);
psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x08080808U);
psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000008U);
psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U);
psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U);
psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U);
psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U);
psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U);
psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U);
psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U);
psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U);
psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU);
psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U);
psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U);
psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU);
psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU);
psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U);
psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU);
psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U);
psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U);
psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU);
psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U);
psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U);
psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10028U);
psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U);
psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U);
psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x5E001810U);
psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x41980B06U);
psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U);
psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU);
psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06240F09U);
psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28210008U);
psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00070300U);
psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U);
psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B07U);
psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00330F09U);
psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU);
psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U);
psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U);
psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000830U);
psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U);
psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U);
psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U);
psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U);
psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U);
psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U);
psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU);
psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U);
psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U);
psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U);
psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U);
psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U);
psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U);
psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U);
psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U);
psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U);
psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0B0U);
psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U);
psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U);
psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U);
psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAA58U);
psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000077DDU);
psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U);
psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U);
psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU);
psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09095555U);
psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09095555U);
psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09095555U);
psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09095555U);
psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09095555U);
psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09095555U);
psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09095555U);
psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U);
psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU);
psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09095555U);
psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U);
psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U);
psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B03CU);
psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09095555U);
psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU);
psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU);
psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U);
psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U);
psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70800000U);
psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U);
psu_mask_write(0xFD080004, 0xFFFFFFFFU, 0x00040073U);
return 1;
}
static unsigned long psu_mio_init_data(void)
{
psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180020, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180024, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180028, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180030, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180038, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U);
psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF18004C, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180050, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180054, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180060, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180064, 0x000000FEU, 0x00000020U);
psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U);
psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180090, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180094, 0x000000FEU, 0x00000008U);
psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U);
psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U);
psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U);
psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U);
psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U);
psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x52240000U);
psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B03000U);
psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U);
psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU);
psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U);
psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U);
return 1;
}
static unsigned long psu_peripherals_init_data(void)
{
psu_mask_write(0xFF5E0238, 0x00100000U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF180390, 0x00000004U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x0001807EU, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U);
psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF180320, 0x33800000U, 0x02800000U);
psu_mask_write(0xFF18031C, 0x7F800000U, 0x63800000U);
psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000100U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U);
psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U);
psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U);
psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU);
psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U);
psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U);
psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U);
psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U);
psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U);
psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5E100U);
psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U);
return 1;
}
static unsigned long psu_serdes_init_data(void)
{
psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U);
psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U);
psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000FU);
psu_mask_write(0xFD402860, 0x00000088U, 0x00000008U);
psu_mask_write(0xFD402864, 0x00000088U, 0x00000008U);
psu_mask_write(0xFD402868, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD40286C, 0x00000082U, 0x00000002U);
psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U);
psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD40E368, 0x000000FFU, 0x000000E0U);
psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U);
psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U);
psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU);
psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U);
psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U);
psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U);
psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U);
psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U);
psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000C9U);
psu_mask_write(0xFD40E374, 0x000000FFU, 0x000000D2U);
psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD40E37C, 0x000000B3U, 0x000000B0U);
psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD40E360, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D06C, 0x0000000FU, 0x0000000FU);
psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x0000000BU);
psu_mask_write(0xFD40CB00, 0x000000F0U, 0x000000F0U);
psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U);
psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U);
psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU);
psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU);
psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000001U);
psu_mask_write(0xFD40D924, 0x000000FFU, 0x0000009CU);
psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000039U);
psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U);
psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000007DU);
psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000064U);
psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U);
psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U);
psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U);
psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU);
psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U);
psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U);
psu_mask_write(0xFD401978, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD405978, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD409978, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD40D978, 0x00000080U, 0x00000080U);
psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U);
psu_mask_write(0xFD410014, 0x00000077U, 0x00000023U);
psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U);
psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40C1D8, 0x00000001U, 0x00000001U);
psu_mask_write(0xFD40DC14, 0x000000FFU, 0x000000E6U);
psu_mask_write(0xFD40DC40, 0x0000001FU, 0x0000000CU);
psu_mask_write(0xFD40D94C, 0x00000020U, 0x00000020U);
psu_mask_write(0xFD40D950, 0x00000007U, 0x00000006U);
psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U);
psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U);
psu_mask_write(0xFD40C048, 0x000000FFU, 0x00000001U);
return 1;
}
static unsigned long psu_resetout_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U);
psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U);
psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U);
psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000003U);
psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U);
psu_mask_write(0xFE20C200, 0x00003FFFU, 0x00002457U);
psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U);
psu_mask_write(0xFE20C11C, 0x00000400U, 0x00000400U);
psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U);
mask_poll(0xFD4063E4, 0x00000010U);
mask_poll(0xFD40A3E4, 0x00000010U);
mask_poll(0xFD40E3E4, 0x00000010U);
psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184018U);
psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081406U);
psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U);
psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U);
return 1;
}
static unsigned long psu_resetin_init_data(void)
{
psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U);
psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U);
psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU);
psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U);
psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U);
return 1;
}
static unsigned long psu_ddr_phybringup_data(void)
{
unsigned int regval = 0;
while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU)
;
prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U);
while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU)
;
Xil_Out32(0xFD0701B0U, 0x00000001U);
Xil_Out32(0xFD070320U, 0x00000001U);
while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U)
;
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U);
Xil_Out32(0xFD080004, 0x0004FE01);
regval = Xil_In32(0xFD080030);
while (regval != 0x80000FFF)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD080200U, 0x100091C7U);
Xil_Out32(0xFD080018U, 0x00F01EF2U);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U);
Xil_Out32(0xFD080004, 0x00060001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80004001) != 0x80004001)
regval = Xil_In32(0xFD080030);
prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U);
prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U);
prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U);
Xil_Out32(0xFD080200U, 0x800091C7U);
Xil_Out32(0xFD080018U, 0x00F12302U);
Xil_Out32(0xFD080004, 0x0000C001);
regval = Xil_In32(0xFD080030);
while ((regval & 0x80000C01) != 0x80000C01)
regval = Xil_In32(0xFD080030);
Xil_Out32(0xFD070180U, 0x01000040U);
Xil_Out32(0xFD070060U, 0x00000000U);
prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U);
return 1;
}
static int serdes_fixcal_code(void)
{
int maskstatus = 1;
unsigned int tmp_0_1, tmp_0_2, tmp_0_3, tmp_0_2_mod;
Xil_Out32(0xFD40EC4C, 0x00000020);
Xil_Out32(0xFD410010, 0x00000001);
maskstatus = mask_poll(0xFD40EF14, 0x2);
if (maskstatus == 0) {
xil_printf("SERDES initialization timed out\n\r");
return maskstatus;
}
tmp_0_1 = mask_read(0xFD400B0C, 0x3F);
tmp_0_2 = tmp_0_1 & (0x7);
tmp_0_3 = tmp_0_1 & (0x38);
Xil_Out32(0xFD410010, 0x00000000);
Xil_Out32(0xFD410014, 0x00000000);
tmp_0_2_mod = (tmp_0_2 << 1) | (0x1);
tmp_0_2_mod = (tmp_0_2_mod << 4);
tmp_0_3 = tmp_0_3 >> 3;
Xil_Out32(0xFD40EC4C, tmp_0_3);
Xil_Out32(0xFD40EC48, tmp_0_2_mod);
return maskstatus;
}
static int serdes_enb_coarse_saturation(void)
{
Xil_Out32(0xFD402094, 0x00000010);
Xil_Out32(0xFD406094, 0x00000010);
Xil_Out32(0xFD40A094, 0x00000010);
Xil_Out32(0xFD40E094, 0x00000010);
return 1;
}
static int init_serdes(void)
{
int status = 1;
status &= psu_resetin_init_data();
status &= serdes_fixcal_code();
status &= serdes_enb_coarse_saturation();
status &= psu_serdes_init_data();
status &= psu_resetout_init_data();
return status;
}
static void init_peripheral(void)
{
unsigned int regvalue;
unsigned int tmp_regval;
Xil_Out32(((0xFF5E0000U) + 0x00000230U), 0x00000000);
Xil_Out32(((0xFF5E0000U) + 0x00000234U), 0x00000000);
Xil_Out32(((0xFF5E0000U) + 0x00000238U), 0x00000000);
regvalue = Xil_In32(((0xFF5E0000U) + 0x0000023CU));
regvalue &= 0x7;
Xil_Out32(((0xFF5E0000U) + 0x0000023CU), regvalue);
Xil_Out32(((0xFD1A0000U) + 0x00000100U), 0x00000000);
tmp_regval = Xil_In32(0xFD690040);
tmp_regval &= ~0x00000001;
Xil_Out32(0xFD690040, tmp_regval);
tmp_regval = Xil_In32(0xFD690030);
tmp_regval &= ~0x00000001;
Xil_Out32(0xFD690030, tmp_regval);
}
int psu_init(void)
{
int status = 1;
status &= psu_mio_init_data();
status &= psu_pll_init_data();
status &= psu_clock_init_data();
status &= psu_ddr_init_data();
status &= psu_ddr_phybringup_data();
status &= psu_peripherals_init_data();
status &= init_serdes();
init_peripheral();
if (status == 0)
return 1;
return 0;
}

53
configs/xilinx_zynqmp_zc1232_revA_defconfig Normal file
View File

@ -0,0 +1,53 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SPL=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1232 revA"
# CONFIG_SPL_FAT_SUPPORT is not set
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1232-revA"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADP=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_CLK_ZYNQMP=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SF_DUAL_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

53
configs/xilinx_zynqmp_zc1254_revA_defconfig Normal file
View File

@ -0,0 +1,53 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SPL=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1254 revA"
# CONFIG_SPL_FAT_SUPPORT is not set
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1254-revA"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADP=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_CLK_ZYNQMP=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SF_DUAL_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

53
configs/xilinx_zynqmp_zc1275_revA_defconfig Normal file
View File

@ -0,0 +1,53 @@
CONFIG_ARM=y
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_SPL=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1275 revA"
# CONFIG_SPL_FAT_SUPPORT is not set
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1275-revA"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADP=y
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_SPL_DM=y
# CONFIG_BLK is not set
CONFIG_CLK_ZYNQMP=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SF_DUAL_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

2
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
View File

@ -19,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_FLASH=y
@ -70,6 +71,7 @@ CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y

2
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_FLASH=y
@ -66,6 +67,7 @@ CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y

86
configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig Normal file
View File

@ -0,0 +1,86 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm017_dc3"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm017 dc3"
CONFIG_ZYNQMP_USB=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm017-dc3"
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_CLK_ZYNQMP=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_NAND=y
CONFIG_NAND_ARASAN=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff010000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

2
configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
View File

@ -16,6 +16,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
@ -58,6 +59,7 @@ CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y

8
configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
View File

@ -17,6 +17,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
@ -34,6 +35,7 @@ CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_CLK_ZYNQMP=y
@ -46,6 +48,12 @@ CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y

83
configs/xilinx_zynqmp_zcu100_revC_defconfig Normal file
View File

@ -0,0 +1,83 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu100"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU100 RevC"
CONFIG_ZYNQ_SDHCI_MAX_FREQ=15000000
CONFIG_ZYNQMP_USB=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_POWEROFF=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_CLK_ZYNQMP=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff010000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_DM_SPI=y
CONFIG_ZYNQ_SPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

2
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
View File

@ -19,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_FLASH=y
@ -76,6 +77,7 @@ CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y

2
configs/xilinx_zynqmp_zcu102_revA_defconfig
View File

@ -19,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_FLASH=y
@ -76,6 +77,7 @@ CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y

2
configs/xilinx_zynqmp_zcu102_revB_defconfig
View File

@ -19,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_FLASH=y
@ -76,6 +77,7 @@ CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y

95
configs/xilinx_zynqmp_zcu104_revA_defconfig Normal file
View File

@ -0,0 +1,95 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu104"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU104 revA"
CONFIG_ZYNQMP_USB=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revA"
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_CLK_ZYNQMP=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SF_DUAL_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHY_MARVELL=y
CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

95
configs/xilinx_zynqmp_zcu104_revC_defconfig Normal file
View File

@ -0,0 +1,95 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu104"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU104 revC"
CONFIG_ZYNQMP_USB=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revC"
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_CLK_ZYNQMP=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SF_DUAL_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHY_MARVELL=y
CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

104
configs/xilinx_zynqmp_zcu106_revA_defconfig Normal file
View File

@ -0,0 +1,104 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu106"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU106 revA"
CONFIG_ZYNQMP_USB=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu106-revA"
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_FASTBOOT=y
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_CLK_ZYNQMP=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SF_DUAL_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHY_MARVELL=y
CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
CONFIG_USB_FUNCTION_THOR=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

95
configs/xilinx_zynqmp_zcu111_revA_defconfig Normal file
View File

@ -0,0 +1,95 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu111"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL=y
CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU111"
CONFIG_ZYNQMP_USB=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu111-revA"
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_ISO_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_CLK_ZYNQMP=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHY_MARVELL=y
CONFIG_PHY_NATSEMI=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
CONFIG_PHY_VITESSE=y
CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ZYNQ_GEM=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_ZYNQMP=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

2
configs/zynq_z_turn_defconfig
View File

@ -3,7 +3,7 @@ CONFIG_ARCH_ZYNQ=y
CONFIG_SYS_TEXT_BASE=0x4000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_DEFAULT_DEVICE_TREE="zynq-zturn-myir"
CONFIG_DEFAULT_DEVICE_TREE="zynq-zturn"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y

1
drivers/clk/clk_zynqmp.c
View File

@ -702,6 +702,7 @@ static struct clk_ops zynqmp_clk_ops = {
};
static const struct udevice_id zynqmp_clk_ids[] = {
{ .compatible = "xlnx,zynqmp-clk" },
{ .compatible = "xlnx,zynqmp-clkc" },
{ }
};

28
drivers/fpga/zynqmppl.c
View File

@ -11,6 +11,7 @@
#include <zynqmppl.h>
#include <linux/sizes.h>
#include <asm/arch/sys_proto.h>
#include <memalign.h>
#define DUMMY_WORD 0xffffffff
@ -195,6 +196,7 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf,
static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
bitstream_type bstype)
{
ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
u32 swap;
ulong bin_buf;
int ret;
@ -205,25 +207,37 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
return FPGA_FAIL;
bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
bsizeptr = (u32 *)&bsize;
debug("%s called!\n", __func__);
flush_dcache_range(bin_buf, bin_buf + bsize);
if (bsize % 4)
bsize = bsize / 4 + 1;
else
bsize = bsize / 4;
flush_dcache_range((ulong)bsizeptr, (ulong)bsizeptr + sizeof(size_t));
buf_lo = (u32)bin_buf;
buf_hi = upper_32_bits(bin_buf);
ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi, bsize,
bstype, ret_payload);
bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi,
(u32)(uintptr_t)bsizeptr, bstype, ret_payload);
if (ret)
debug("PL FPGA LOAD fail\n");
return ret;
}
static int zynqmp_pcap_info(xilinx_desc *desc)
{
int ret;
u32 ret_payload[PAYLOAD_ARG_CNT];
ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_STATUS, 0, 0, 0,
0, ret_payload);
if (!ret)
printf("PCAP status\t0x%x\n", ret_payload[1]);
return ret;
}
struct xilinx_fpga_op zynqmp_op = {
.load = zynqmp_load,
.info = zynqmp_pcap_info,
};

16
drivers/fpga/zynqpl.c
View File

@ -17,6 +17,7 @@
#include <asm/arch/sys_proto.h>
#define DEVCFG_CTRL_PCFG_PROG_B 0x40000000
#define DEVCFG_CTRL_PCFG_AES_EFUSE_MASK 0x00001000
#define DEVCFG_ISR_FATAL_ERROR_MASK 0x00740040
#define DEVCFG_ISR_ERROR_FLAGS_MASK 0x00340840
#define DEVCFG_ISR_RX_FIFO_OV 0x00040000
@ -205,9 +206,24 @@ static int zynq_dma_xfer_init(bitstream_type bstype)
/* Setting PCFG_PROG_B signal to high */
control = readl(&devcfg_base->ctrl);
writel(control | DEVCFG_CTRL_PCFG_PROG_B, &devcfg_base->ctrl);
/*
* Delay is required if AES efuse is selected as
* key source.
*/
if (control & DEVCFG_CTRL_PCFG_AES_EFUSE_MASK)
mdelay(5);
/* Setting PCFG_PROG_B signal to low */
writel(control & ~DEVCFG_CTRL_PCFG_PROG_B, &devcfg_base->ctrl);
/*
* Delay is required if AES efuse is selected as
* key source.
*/
if (control & DEVCFG_CTRL_PCFG_AES_EFUSE_MASK)
mdelay(5);
/* Polling the PCAP_INIT status for Reset */
ts = get_timer(0);
while (readl(&devcfg_base->status) & DEVCFG_STATUS_PCFG_INIT) {

4
drivers/mtd/nand/arasan_nfc.c
View File

@ -86,7 +86,7 @@ struct arasan_nand_command_format {
#define ARASAN_NAND_CMD_ADDR_CYCL_MASK 0x70000000
#define ARASAN_NAND_CMD_ADDR_CYCL_SHIFT 28
#define ARASAN_NAND_MEM_ADDR1_PAGE_MASK 0xFFFF
#define ARASAN_NAND_MEM_ADDR1_PAGE_MASK 0xFFFF0000
#define ARASAN_NAND_MEM_ADDR1_COL_MASK 0xFFFF
#define ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT 16
#define ARASAN_NAND_MEM_ADDR2_PAGE_MASK 0xFF
@ -796,7 +796,7 @@ static int arasan_nand_erase(struct arasan_nand_command_format *curr_cmd,
writel(reg_val, &arasan_nand_base->cmd_reg);
page = (page_addr >> ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT) &
ARASAN_NAND_MEM_ADDR1_PAGE_MASK;
ARASAN_NAND_MEM_ADDR1_COL_MASK;
column = page_addr & ARASAN_NAND_MEM_ADDR1_COL_MASK;
writel(column | (page << ARASAN_NAND_MEM_ADDR1_PAGE_SHIFT),
&arasan_nand_base->memadr_reg1);

2
drivers/net/phy/xilinx_phy.c
View File

@ -105,7 +105,7 @@ static int xilinxphy_of_init(struct phy_device *phydev)
debug("%s\n", __func__);
phytype = fdtdec_get_int(gd->fdt_blob, dev_of_offset(phydev->dev),
"phy-type", -1);
"xlnx,phy-type", -1);
if (phytype == XAE_PHY_TYPE_1000BASE_X)
phydev->flags |= XAE_PHY_TYPE_1000BASE_X;

33
drivers/net/xilinx_axi_emac.c
View File

@ -78,9 +78,10 @@ static u8 rxframe[PKTSIZE_ALIGN] __attribute((aligned(DMAALIGN)));
struct axidma_reg {
u32 control; /* DMACR */
u32 status; /* DMASR */
u32 current; /* CURDESC */
u32 reserved;
u32 tail; /* TAILDESC */
u32 current; /* CURDESC low 32 bit */
u32 current_hi; /* CURDESC high 32 bit */
u32 tail; /* TAILDESC low 32 bit */
u32 tail_hi; /* TAILDESC high 32 bit */
};
/* Private driver structures */
@ -168,6 +169,22 @@ static inline int mdio_wait(struct axi_regs *regs)
return 0;
}
/**
* axienet_dma_write - Memory mapped Axi DMA register Buffer Descriptor write.
* @bd: pointer to BD descriptor structure
* @desc: Address offset of DMA descriptors
*
* This function writes the value into the corresponding Axi DMA register.
*/
static inline void axienet_dma_write(struct axidma_bd *bd, u32 *desc)
{
#if defined(CONFIG_PHYS_64BIT)
writeq(bd, desc);
#else
writel((u32)bd, desc);
#endif
}
static u32 phyread(struct axidma_priv *priv, u32 phyaddress, u32 registernum,
u16 *val)
{
@ -465,7 +482,7 @@ static int axiemac_start(struct udevice *dev)
writel(temp, &priv->dmarx->control);
/* Start DMA RX channel. Now it's ready to receive data.*/
writel((u32)&rx_bd, &priv->dmarx->current);
axienet_dma_write(&rx_bd, &priv->dmarx->current);
/* Setup the BD. */
memset(&rx_bd, 0, sizeof(rx_bd));
@ -485,7 +502,7 @@ static int axiemac_start(struct udevice *dev)
writel(temp, &priv->dmarx->control);
/* Rx BD is ready - start */
writel((u32)&rx_bd, &priv->dmarx->tail);
axienet_dma_write(&rx_bd, &priv->dmarx->tail);
/* Enable TX */
writel(XAE_TC_TX_MASK, &regs->tc);
@ -527,7 +544,7 @@ static int axiemac_send(struct udevice *dev, void *ptr, int len)
if (readl(&priv->dmatx->status) & XAXIDMA_HALTED_MASK) {
u32 temp;
writel((u32)&tx_bd, &priv->dmatx->current);
axienet_dma_write(&tx_bd, &priv->dmatx->current);
/* Start the hardware */
temp = readl(&priv->dmatx->control);
temp |= XAXIDMA_CR_RUNSTOP_MASK;
@ -535,7 +552,7 @@ static int axiemac_send(struct udevice *dev, void *ptr, int len)
}
/* Start transfer */
writel((u32)&tx_bd, &priv->dmatx->tail);
axienet_dma_write(&tx_bd, &priv->dmatx->tail);
/* Wait for transmission to complete */
debug("axiemac: Waiting for tx to be done\n");
@ -626,7 +643,7 @@ static int axiemac_free_pkt(struct udevice *dev, uchar *packet, int length)
flush_cache((u32)&rxframe, sizeof(rxframe));
/* Rx BD is ready - start again */
writel((u32)&rx_bd, &priv->dmarx->tail);
axienet_dma_write(&rx_bd, &priv->dmarx->tail);
debug("axiemac: RX completed, framelength = %d\n", length);

16
include/configs/xilinx_zynqmp.h
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@ -172,12 +172,24 @@
# define BOOT_TARGET_DEVICES_USB(func)
#endif
#if defined(CONFIG_CMD_PXE)
# define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
#else
# define BOOT_TARGET_DEVICES_PXE(func)
#endif
#if defined(CONFIG_CMD_DHCP)
# define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
#else
# define BOOT_TARGET_DEVICES_DHCP(func)
#endif
#define BOOT_TARGET_DEVICES(func) \
BOOT_TARGET_DEVICES_MMC(func) \
BOOT_TARGET_DEVICES_USB(func) \
BOOT_TARGET_DEVICES_SCSI(func) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
BOOT_TARGET_DEVICES_PXE(func) \
BOOT_TARGET_DEVICES_DHCP(func)
#include <config_distro_bootcmd.h>

20
include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h Normal file
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@ -0,0 +1,20 @@
/*
* Configuration for Xilinx ZynqMP zc1751 XM017 DC3
*
* (C) Copyright 2015 Xilinx, Inc.
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H
#define __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H
#define CONFIG_ZYNQ_SDHCI1
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
ZYNQMP_USB1_XHCI_BASEADDR}
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H */

36
include/configs/xilinx_zynqmp_zcu100.h Normal file
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@ -0,0 +1,36 @@
/*
* Configuration for Xilinx ZynqMP zcu100
*
* (C) Copyright 2015 - 2016 Xilinx, Inc.
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_ZYNQMP_ZCU100_H
#define __CONFIG_ZYNQMP_ZCU100_H
/* FIXME Will go away soon */
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 9
#define CONFIG_SYS_I2C_BUSES { \
{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
}
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
ZYNQMP_USB1_XHCI_BASEADDR}
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZCU100_H */

36
include/configs/xilinx_zynqmp_zcu104.h Normal file
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@ -0,0 +1,36 @@
/*
* Configuration for Xilinx ZynqMP zcu104
*
* (C) Copyright 2017 Xilinx, Inc.
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_ZYNQMP_ZCU104_H
#define __CONFIG_ZYNQMP_ZCU104_H
#define CONFIG_ZYNQ_SDHCI1
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 9
#define CONFIG_SYS_I2C_BUSES { \
{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 5} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 6} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 7} } }, \
}
#define CONFIG_PCA953X
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZCU104_H */

47
include/configs/xilinx_zynqmp_zcu106.h Normal file
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@ -0,0 +1,47 @@
/*
* Configuration for Xilinx ZynqMP zcu106
*
* (C) Copyright 2016 Xilinx, Inc.
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_ZYNQMP_ZCU106_H
#define __CONFIG_ZYNQMP_ZCU106_H
#define CONFIG_ZYNQ_SDHCI1
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 18
#define CONFIG_SYS_I2C_BUSES { \
{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
{1, {I2C_NULL_HOP} }, \
{1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
}
#define CONFIG_PCA953X
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_EEPROM_BUS 5
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZCU106_H */

50
include/configs/xilinx_zynqmp_zcu111.h Normal file
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@ -0,0 +1,50 @@
/*
* Configuration for Xilinx ZynqMP zcu111
*
* (C) Copyright 2017 Xilinx, Inc.
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_ZYNQMP_ZCU111_H
#define __CONFIG_ZYNQMP_ZCU111_H
#define CONFIG_ZYNQ_SDHCI1
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 21
#define CONFIG_SYS_I2C_BUSES { \
{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 3} } }, \
{1, {I2C_NULL_HOP} }, \
{1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 5} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 6} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
}
#define CONFIG_PCA953X
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_EEPROM_BUS 5
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZCU111_H */

30
include/dt-bindings/pinctrl/pinctrl-zynqmp.h
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@ -1,30 +0,0 @@
/*
* MIO pin configuration defines for Xilinx ZynqMP
*
* Copyright (C) 2017 Xilinx, Inc.
* Author: Chirag Parekh <chirag.parekh@xilinx.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _DT_BINDINGS_PINCTRL_ZYNQMP_H
#define _DT_BINDINGS_PINCTRL_ZYNQMP_H
/* Bit value for IO standards */
#define IO_STANDARD_LVCMOS33 0
#define IO_STANDARD_LVCMOS18 1
/* Bit values for Slew Rates */
#define SLEW_RATE_FAST 0
#define SLEW_RATE_SLOW 1
/* Bit values for Pin inputs */
#define PIN_INPUT_TYPE_CMOS 0
#define PIN_INPUT_TYPE_SCHMITT 1
#endif /* _DT_BINDINGS_PINCTRL_ZYNQMP_H */

1
include/zynqmppl.h
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@ -12,6 +12,7 @@
#define ZYNQMP_SIP_SVC_CSU_DMA_CHIPID 0xC2000018
#define ZYNQMP_SIP_SVC_PM_FPGA_LOAD 0xC2000016
#define ZYNQMP_SIP_SVC_PM_FPGA_STATUS 0xC2000017
#define ZYNQMP_FPGA_OP_INIT (1 << 0)
#define ZYNQMP_FPGA_OP_LOAD (1 << 1)
#define ZYNQMP_FPGA_OP_DONE (1 << 2)