Commit Graph

1797 Commits

Author SHA1 Message Date
Tom Rini
b11f634b1c Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
 dtoc: Tidy up and add more tests
 ns16550 code clean-up
 x86 and sandbox minor fixes for of-platdata
 dtoc prepration for adding build-time instantiation
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAl/09LURHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIrebjwwf/fHRjYsAY/Yj/+y1xgo3L3sphIvQUqTDF
 KkLl+kHdV5r8W/HJULxLQcF2r7pcPEI6TAQxuj3qQ5SUvm2HviS8GHGPawDEwyht
 HgBp9VD56+HUadMfnbG//DVS73ycbL4XSKlYqpkINEejtnlttsCIawUXX5cTyGM/
 59VkgnKrKvJQRUXvYLa8MTugTs4fkPJGDqhActBk/7SP1SImj+rfalNSqA2/dx6y
 2RnPCSzB1x2231KSj+B1NgGlR3Xb8P8zgh20ijcEU/hrlXBTZyi7K7f4SJR30Efu
 LYkkuj4VbxcV/25RozR0fmknqCs0QyAI+/dql6TNtbTSPC/jAfj0jQ==
 =9kN3
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next

Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
2021-01-05 22:34:43 -05:00
Tom Rini
720620e691 Prepare v2021.01-rc5
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAl/0YVIACgkQFHw5/5Y0
 tywtEwv/cJWlKgcSnYjuJrxwuJdauUTfXdbUgtCxOtBw/BP4dsKkbGTJPw5q5M+4
 LJJSKyksmJVTX26h1dpkzQjOpWtTDnWqm5CTIxD52oQD7pxK+zCQ9T6S+QbQD0Se
 ogHmZluzFoluxbNgo8tiO52xvMhDO3TVAzxsNDdGfkd5/tAXOHClPc34RmAkdRHU
 VsR89AKdT2q543fiUfrRZYDzdctaNWhRGXMDcJ4+QU/8hQhrpcr8EtHbF+3mWX4K
 pA01pDz150Rn4UI6S2xKEWrjSTHe55fxVj/Qj0rq9z2E/+NqGXemf5s13AR0G/z3
 PqHdVLHzDe64pbOvmyU1pVQ0aMb8vMJUnqx68SQZY3On2c+MjRWQ+7aVVaKOcPGp
 uatk6QMrggHp3Li+3yZrLBE0qPr/sNMVb7mUesdZb6lFd2VIs8siwhfeGXMS+nDI
 xePzsR43Fnn5Q5KIqqvcWUb+TTTqUDUff0wyAU8NBgCaIBIZK8h2ppS1jjnbms0I
 mr8Er2vb
 =Dfum
 -----END PGP SIGNATURE-----

Merge tag 'v2021.01-rc5' into next

Prepare v2021.01-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05 16:20:26 -05:00
Simon Glass
e7144b07e4 x86: Drop rtc from SPL
The RTC is not currently used in SPL. Drop it so that it does not take up
space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
a59f3d230e x86: coral: Remove unwanted nodes from SPL/TPL
Some devices are not needed in SPL/TPL. For TPL this causes the
generation of unnecessary of-platadata structs. Make some adjustments to
fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
21303d1de7 x86: apl: Adjust how the UART gets its platform data
At present this driver calls malloc() to start a new platform data
structure, fills it in and tells driver model to use it.

We want to avoid malloc, particularly with the new version of of-platdata.
Create a new struct which encompasses both the dtd struct and the ns16550
one, to avoid this. Unfortunately we must copy the data into the right
place for the ns16550 driver. Add some comments about this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
6a2350f8c9 x86: sysreset: Move priv/plat structs to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them and add the dtd struct too.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:41 -07:00
Simon Glass
332b98660f x86: apl: Use struct spi_nor instead of struct spi_flash
This construct effectively uses struct spi_nor due to a #define in
spi-nor.h so we may as well use that struct here. This allows dtoc to
parse it correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
f6257f7914 x86: Move priv/plat structs for intel_common to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
366c4eb4b5 x86: apl: Move priv/plat structs to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
941e6304f4 x86: Fix header guard in asm/pmu.h
This has the wrong name. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
cee58bd2ad x86: tpl: Remove unwanted devicetree string
Update this driver to use of_match_ptr().

This reduces the TPL binary size by about 32 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
8b842be10c x86: apl: Reduce size for TPL
Update various drivers to use of_match_ptr() and to avoid including debug
strings in TPL. Omit the WiFi driver entirely, since it is not used in
TPL.

This reduces the TPL binary size by about 608 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
5e89be1efd x86: apl: Update hostbridge to remove unwanted TPL code
At present several strings from this file appear in the TPL binary. Add
preprocessor checks to drop them.

This reduces the TPL binary size by about 128 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
1d2b8585f6 x86: coral: Move fsp-m settings to a subnode
At present these settings are in the node for host-bridge and so are
visible in TPL as well as SPL. But they are only used for SPL.

Move them to a subnode so that TPL does not included them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
7dc82591d6 x86: Move call64 into its own section
When this code is not used (e.g. by TPL) we want it to be excluded from
the image. Put it in its own section so that this happens.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
52d2e9c142 x86: apl: Use const for driver operations
Update these declarations to const to ensure that the data ends up in the
rodata section.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
0fd3d91152 dm: Use access methods for dev/uclass private data
Most drivers use these access methods but a few do not. Update them.

In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
2021-01-05 12:24:40 -07:00
Simon Glass
c238eeebc9 x86: apl: Drop support for !OF_PLATDATA_PARENT
This code was kept around after of-platdata started supporting parent
devices. That feature seems stable now, so let's drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
d30c7209df serial: Update NS16550_t and struct NS16550
Typedefs should not be used in U-Boot and structs should be lower case.
Update the code to use struct ns16550 consistently.

Put a header guard on the file while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:40 -07:00
Sughosh Ganu
ab201a116f fsp: Move and rename fsp_types.h file
The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
6ef1b75087 fsp: Move and rename fsp_types.h file
The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-22 10:19:40 +08:00
Simon Glass
df3dc20952 x86: Drop unnecessary mp_init logic
Now that sequence numbers are set up when devices are bound, this code is
not needed. Also, we should use dev_seq() instead of req_seq. Update the
whole file accordingly.

Also fix up APL cpu while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Simon Glass
8b85dfc675 dm: Avoid accessing seq directly
At present various drivers etc. access the device's 'seq' member directly.
This makes it harder to change the meaning of that member. Change access
to go through a function instead.

The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Andy Shevchenko
f89e8acbc8 x86: edison: Switch to DM_USB_GADGET
DM is the modern default approach for the drivers in U-Boot.
It also allows to configure code via Device Tree.

Move Intel Edison to use DM_USB_GADGET and drop hard coded values.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:51:24 +08:00
Andy Shevchenko
23cdbba8b1 x86: edison: Use dwc3-generic driver for Intel Edison
Use generic Synopsys DesignWare 3 driver on Intel Edison.
For now it's just a stub which allows future refactoring.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:51:24 +08:00
Andy Shevchenko
d067fb7636 x86: edison: BINMAN selection is specific to the board
The platforms based on Intel Tangier may have different requirements
how to create bootloader bundle to supply to a device. Currently
the BINMAN approach is for Intel Edison only.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:50:42 +08:00
Andy Shevchenko
35d29a8f55 x86: edison: Add CPU to compatible string
Like in the rest of x86 boards append CPU to the board compatible string.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:50:03 +08:00
Andy Shevchenko
21096c0af3 x86: tangier: Find proper memory region for relocation
It appears that U-Boot works by luck on Intel Edison board because the amount
of RAM is less than 1 GB and standard way of calculating the top of it work
for this configuration. However, this won't work if the amount of RAM is
different and split differently in address space. We have to find the suitable
window correctly.

Find proper memory region for relocation by scanning MMAP SFI table in
board_get_usable_ram_top() callback.

According to the address map documentation the Main Memory is guaranteed to lie
in the 0..2 GB range, that's why we limit search by this range.

Fixes: e71de54a49 ("x86: Add Intel Tangier support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:47:34 +08:00
Simon Glass
6c9a83502f x86: zimage: Update cmdline parameter to be an env var
With the updated changes to bootargs substitution[1], the zboot command
needs to be updated to get its command line from an environment variable
instead of a memory address. This is because the command-line string must
be updated to convert %U to ${uuid}, etc.

In any case it is more flexible to use a environment variable and it is
best to do this before the release to avoid a subsequent change.

Update the command accordingly.

[1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:46:11 +08:00
Simon Glass
8a8d24bdf1 dm: treewide: Rename ..._platdata variables to just ..._plat
Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
b012ff1f1b dm: treewide: Update 'auto' declarations to be on one line
Fix up the code style for those declarations that should now fit onto one
line, which is all of them that currently do not.

This is needed for dtoc to detect the structs correctly, at present.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
d1998a9fde dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
c69cda25c9 dm: treewide: Rename dev_get_platdata() to dev_get_plat()
Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
caa4daa2ae dm: treewide: Rename 'platdata' variables to just 'plat'
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:08 -07:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Simon Glass
a2703ce10c dm: Remove uses of device_bind_offset()
This function is not needed since the standard device_bind() can be used
instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Simon Glass
e12052b322 dm: core: Rename device_bind() to device_bind_offset()
This function is not necessary anymore, since device_bind_ofnode() does
the same thing and works with both flattree and livetree.

Rename it to indicate that it is special.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:17 -07:00
Simon Glass
488d89afb8 x86: zimage: Add silent-console processing
At present zimage does its own command-line processing and does not
support the 'silent console' feature. There doesn't seem to be any good
reason for this.

Add support for silent console to zimage.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:10:00 -05:00
Simon Glass
ca010674ed x86: coral: Update smbios tables to latest definition
The accepted binding uses multiple nodes, one for each table type. Update
coral accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-10 09:44:20 +08:00
Bin Meng
f72d3d6b04 x86: Avoid using hardcoded number of variable range MTRRs in mtrr_commit()
Since commit 29d2d64ed5 ("x86: Add support for more than 8 MTRRs"),
the maximum number of variable range MTRRs was increased from 8 to 10.
On the BayTrail platform there are only 8 variable range MTRRs. In
mtrr_commit() it still uses MTRR_MAX_COUNT which caused a #GP during
VESA video driver probe. It should have been updated to use dynamically
probed number.

This fixes the boot failure seen on Intel Minnow Max board.

Fixes: 29d2d64ed5 ("x86: Add support for more than 8 MTRRs")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-10 09:25:25 +08:00
Simon Glass
839d66cdb5 x86: Provide default SMBIOS manufacturer/product
Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.

Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:25:56 +08:00
Simon Glass
8f1f374f63 x86: galileo: Use devicetree for SMBIOS settings
Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
a40f890bdb x86: zimage: Quieten down the zimage boot process
Much of the output is not very useful. The bootm command is quite a bit
quieter. Convert some output to use log_debug().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-11-06 09:51:34 +08:00
Simon Glass
7c79eddbec x86: zimage: Sanity-check the kernel version before printing it
With Chrome OS the kernel setup block is stored in a separate place from
the kernel, so it is not possible to access the kernel version string.
At present, garbage is printed.

Add a sanity check to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:34 +08:00
Simon Glass
b73d61a556 x86: zimage: Add a little more logging
Add logging for each part of the boot process, using a new

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-11-06 09:51:34 +08:00
Simon Glass
d46c0932a9 x86: fsp: Adjust calculations for MTRR range and DRAM top
At present the top of available DRAM is the same as the top of the range
of the low-memory MTRR.

In fact, U-Boot is allowed to use memory up until the start of the FSP
reserved memory. Use that value for low_end, since it makes more memory
available.

Keep the same calculation as before for mtrr_top, i.e. the top of
reserved memory.

A side-effect of this change is that the E820 tables have a single entry
that extends from the bottom of the memory used by U-Boot to the bottom
of the FSP reserved memory. This includes the bloblist, if ACPI tables
are placed there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:33 +08:00
Simon Glass
98bf740e7f x86: acpi: Don't show the UART address by default
This is useful when using Linux's earlycon since the MMIO address must be
provided on some platforms, e.g.:

   earlycon=uart8250,mmio32,0xddffc000,115200n8

However this is only for debugging, so don't show it by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:33 +08:00
Simon Glass
7f061e0d25 x86: acpi: Include the TPMv1 table only if needed
This table is not needed if a v2 TPM is in use. Add a condition to avoid
adding it when not needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:32 +08:00
Simon Glass
1da448bb9f x86: Silence some logging statements
Quite a few log_info() calls are included in the x86 code which should use
log_debug() instead. Convert them to reduce unwanted output.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:32 +08:00
Simon Glass
d0147fe8a2 x86: fsp: Convert fsp_dram to use log_debug()
Use log_debug() instead of debug() in this file, to enable the extra
features.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:32 +08:00