dm: Use access methods for dev/uclass private data

Most drivers use these access methods but a few do not. Update them.

In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
This commit is contained in:
Simon Glass 2020-12-22 19:30:28 -07:00
parent 12559f5bab
commit 0fd3d91152
113 changed files with 372 additions and 278 deletions

View File

@ -52,7 +52,11 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
continue;
}
#ifdef CONFIG_DM_ETH
priv = dev_get_priv(dev);
#else
priv = dev->priv;
#endif
if (priv->flags & TSEC_SGMII)
continue;

View File

@ -9,6 +9,7 @@
#include <syscon.h>
#include <asm/io.h>
#include <dm/device_compat.h>
#include <dm/device-internal.h>
#include <linux/bitops.h>
#include <linux/err.h>
#include <power/pmic.h>
@ -165,7 +166,7 @@ static int stm32mp_pwr_regulator_probe(struct udevice *dev)
}
uc_pdata->type = REGULATOR_TYPE_FIXED;
dev->priv = (void *)*p;
dev_set_priv(dev, (void *)*p);
return 0;
}

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@ -16,6 +16,7 @@
#include <asm/io.h>
#include <asm/pci.h>
#include <asm/lpss.h>
#include <dm/device-internal.h>
/* Low-power Subsystem (LPSS) clock register */
enum {
@ -105,7 +106,7 @@ static int apl_ns16550_of_to_plat(struct udevice *dev)
plat->clock = dtplat->clock_frequency;
plat->fcr = UART_FCR_DEFVAL;
plat->bdf = pci_ofplat_get_devfn(dtplat->reg[0]);
dev->plat = plat;
dev_set_plat(dev, plat);
#else
int ret;

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@ -18,7 +18,7 @@ static int slimbootloader_serial_of_to_plat(struct udevice *dev)
{
const efi_guid_t guid = SBL_SERIAL_PORT_INFO_GUID;
struct sbl_serial_port_info *data;
struct ns16550_plat *plat = dev->plat;
struct ns16550_plat *plat = dev_get_plat(dev);
if (!gd->arch.hob_list)
panic("hob list not found!");

View File

@ -44,8 +44,10 @@ int clk_register(struct clk *clk, const char *drv_name,
}
clk->enable_count = 0;
/* Store back pointer to clk from udevice */
clk->dev->uclass_priv = clk;
/* FIXME: This is not allowed...should be allocated by driver model */
dev_set_uclass_priv(clk->dev, clk);
return 0;
}

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@ -6,6 +6,7 @@
#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <linux/clk-provider.h>
static ulong clk_fixed_rate_get_rate(struct clk *clk)
@ -32,7 +33,8 @@ static int clk_fixed_rate_of_to_plat(struct udevice *dev)
dev_read_u32_default(dev, "clock-frequency", 0);
#endif
/* Make fixed rate clock accessible from higher level struct clk */
dev->uclass_priv = clk;
/* FIXME: This is not allowed */
dev_set_uclass_priv(dev, clk);
clk->dev = dev;
clk->enable_count = 0;

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@ -15,6 +15,7 @@
#include <asm/arch-rockchip/cru_px30.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/io.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/px30-cru.h>
#include <linux/bitops.h>
@ -1458,7 +1459,7 @@ static int px30_clk_bind(struct udevice *dev)
glb_srst_fst);
priv->glb_srst_snd_value = offsetof(struct px30_cru,
glb_srst_snd);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)

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@ -14,6 +14,7 @@
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/cru_rk3036.h>
#include <asm/arch-rockchip/hardware.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3036-cru.h>
#include <linux/delay.h>
@ -353,7 +354,7 @@ static int rk3036_clk_bind(struct udevice *dev)
cru_glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rk3036_cru,
cru_glb_srst_snd_value);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)

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@ -15,6 +15,7 @@
#include <asm/arch-rockchip/cru_rk3128.h>
#include <asm/arch-rockchip/hardware.h>
#include <bitfield.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3128-cru.h>
#include <linux/delay.h>
@ -581,7 +582,7 @@ static int rk3128_clk_bind(struct udevice *dev)
cru_glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rk3128_cru,
cru_glb_srst_snd_value);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
return 0;

View File

@ -593,7 +593,7 @@ static int rk3188_clk_bind(struct udevice *dev)
cru_glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rk3188_cru,
cru_glb_srst_snd_value);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)

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@ -14,6 +14,7 @@
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/cru_rk322x.h>
#include <asm/arch-rockchip/hardware.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3228-cru.h>
#include <linux/bitops.h>
@ -510,7 +511,7 @@ static int rk322x_clk_bind(struct udevice *dev)
cru_glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rk322x_cru,
cru_glb_srst_snd_value);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)

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@ -1018,7 +1018,7 @@ static int rk3288_clk_bind(struct udevice *dev)
cru_glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rockchip_cru,
cru_glb_srst_snd_value);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)

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@ -15,6 +15,7 @@
#include <asm/arch/cru_rk3308.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/hardware.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3308-cru.h>
#include <linux/bitops.h>
@ -1045,7 +1046,7 @@ static int rk3308_clk_bind(struct udevice *dev)
glb_srst_fst);
priv->glb_srst_snd_value = offsetof(struct rk3308_cru,
glb_srst_snd);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)

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@ -16,6 +16,7 @@
#include <asm/arch-rockchip/hardware.h>
#include <asm/arch-rockchip/grf_rk3328.h>
#include <asm/io.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3328-cru.h>
#include <linux/bitops.h>
@ -823,7 +824,7 @@ static int rk3328_clk_bind(struct udevice *dev)
glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rk3328_cru,
glb_srst_snd_value);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)

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@ -19,6 +19,7 @@
#include <asm/arch-rockchip/cru_rk3368.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/io.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3368-cru.h>
#include <linux/delay.h>
@ -621,7 +622,7 @@ static int rk3368_clk_bind(struct udevice *dev)
glb_srst_fst_val);
priv->glb_srst_snd_value = offsetof(struct rk3368_cru,
glb_srst_snd_val);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)

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@ -18,6 +18,7 @@
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/cru.h>
#include <asm/arch-rockchip/hardware.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rk3399-cru.h>
#include <linux/bitops.h>
@ -1425,7 +1426,7 @@ static int rk3399_clk_bind(struct udevice *dev)
glb_srst_fst_value);
priv->glb_srst_snd_value = offsetof(struct rockchip_cru,
glb_srst_snd_value);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)

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@ -16,6 +16,7 @@
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/cru_rv1108.h>
#include <asm/arch-rockchip/hardware.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dt-bindings/clock/rv1108-cru.h>
#include <linux/delay.h>
@ -697,7 +698,7 @@ static int rv1108_clk_bind(struct udevice *dev)
glb_srst_fst_val);
priv->glb_srst_snd_value = offsetof(struct rv1108_cru,
glb_srst_snd_val);
sys_child->priv = priv;
dev_set_priv(sys_child, priv);
}
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)

View File

@ -89,15 +89,15 @@ int device_unbind(struct udevice *dev)
return log_msg_ret("child unbind", ret);
if (dev->flags & DM_FLAG_ALLOC_PDATA) {
free(dev->plat);
dev->plat = NULL;
free(dev_get_plat(dev));
dev_set_plat(dev, NULL);
}
if (dev->flags & DM_FLAG_ALLOC_UCLASS_PDATA) {
free(dev->uclass_plat);
free(dev_get_uclass_plat(dev));
dev->uclass_plat = NULL;
}
if (dev->flags & DM_FLAG_ALLOC_PARENT_PDATA) {
free(dev->parent_plat);
free(dev_get_parent_plat(dev));
dev->parent_plat = NULL;
}
ret = uclass_unbind_device(dev);
@ -125,12 +125,12 @@ void device_free(struct udevice *dev)
int size;
if (dev->driver->priv_auto) {
free(dev->priv);
dev->priv = NULL;
free(dev_get_priv(dev));
dev_set_priv(dev, NULL);
}
size = dev->uclass->uc_drv->per_device_auto;
if (size) {
free(dev->uclass_priv);
free(dev_get_uclass_priv(dev));
dev->uclass_priv = NULL;
}
if (dev->parent) {
@ -140,7 +140,7 @@ void device_free(struct udevice *dev)
per_child_auto;
}
if (size) {
free(dev->parent_priv);
free(dev_get_parent_priv(dev));
dev->parent_priv = NULL;
}
}

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@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
int sdram_mmr_init_full(struct udevice *dev)
{
struct altera_sdram_plat *plat = dev->plat;
struct altera_sdram_plat *plat = dev_get_plat(dev);
struct altera_sdram_priv *priv = dev_get_priv(dev);
u32 i;
int ret;

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@ -565,7 +565,7 @@ static unsigned long sdram_calculate_size(struct socfpga_sdr_ctrl *sdr_ctrl)
static int altera_gen5_sdram_of_to_plat(struct udevice *dev)
{
struct altera_gen5_sdram_plat *plat = dev->plat;
struct altera_gen5_sdram_plat *plat = dev_get_plat(dev);
plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index(dev, 0);
if (!plat->sdr)
@ -578,7 +578,7 @@ static int altera_gen5_sdram_probe(struct udevice *dev)
{
int ret;
unsigned long sdram_size;
struct altera_gen5_sdram_plat *plat = dev->plat;
struct altera_gen5_sdram_plat *plat = dev_get_plat(dev);
struct altera_gen5_sdram_priv *priv = dev_get_priv(dev);
struct socfpga_sdr_ctrl *sdr_ctrl = &plat->sdr->sdr_ctrl;
struct reset_ctl_bulk resets;

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@ -70,7 +70,7 @@ int match_ddr_conf(u32 ddr_conf)
*/
int sdram_mmr_init_full(struct udevice *dev)
{
struct altera_sdram_plat *plat = dev->plat;
struct altera_sdram_plat *plat = dev_get_plat(dev);
struct altera_sdram_priv *priv = dev_get_priv(dev);
u32 update_value, io48_value, ddrioctl;
u32 i;

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@ -232,7 +232,7 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat)
static int altera_sdram_of_to_plat(struct udevice *dev)
{
struct altera_sdram_plat *plat = dev->plat;
struct altera_sdram_plat *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr_index(dev, 0);

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@ -141,7 +141,7 @@ static int gpio_dwapb_reset(struct udevice *dev)
static int gpio_dwapb_probe(struct udevice *dev)
{
struct gpio_dev_priv *priv = dev_get_uclass_priv(dev);
struct gpio_dwapb_plat *plat = dev->plat;
struct gpio_dwapb_plat *plat = dev_get_plat(dev);
if (!plat) {
/* Reset on parent device only */

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@ -1165,7 +1165,7 @@ int gpio_get_number(const struct gpio_desc *desc)
if (!dev)
return -1;
uc_priv = dev->uclass_priv;
uc_priv = dev_get_uclass_priv(dev);
return uc_priv->gpio_base + desc->offset;
}

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@ -67,7 +67,7 @@ static int hi6220_gpio_probe(struct udevice *dev)
{
struct gpio_bank *bank = dev_get_priv(dev);
struct hikey_gpio_plat *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev->uclass_priv;
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
char name[18], *str;
sprintf(name, "GPIO%d_", plat->bank_index);

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@ -11,6 +11,7 @@
#include <fdtdec.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <dm/device-internal.h>
#include <malloc.h>
enum imx_rgpio2p_direction {
@ -151,7 +152,7 @@ static int imx_rgpio2p_probe(struct udevice *dev)
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev->plat;
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
fdt_addr_t addr;
/*
@ -184,7 +185,7 @@ static int imx_rgpio2p_bind(struct udevice *dev)
plat->regs = (struct gpio_regs *)addr;
plat->bank_index = dev_seq(dev);
dev->plat = plat;
dev_set_plat(dev, plat);
return 0;
}

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@ -295,7 +295,7 @@ static const struct dm_gpio_ops gpio_lpc32xx_ops = {
static int lpc32xx_gpio_probe(struct udevice *dev)
{
struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
struct gpio_dev_priv *uc_priv = dev->uclass_priv;
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
if (dev_of_offset(dev) == -1) {
/* Tell the uclass how many GPIOs we have */

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@ -130,7 +130,7 @@ static int gpio_mediatek_probe(struct udevice *dev)
*/
static int gpio_mediatek_bind(struct udevice *parent)
{
struct mediatek_gpio_plat *plat = parent->plat;
struct mediatek_gpio_plat *plat = dev_get_plat(parent);
ofnode node;
int bank = 0;
int ret;

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@ -264,7 +264,7 @@ static int mxs_gpio_probe(struct udevice *dev)
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static int mxs_of_to_plat(struct udevice *dev)
{
struct mxs_gpio_plat *plat = dev->plat;
struct mxs_gpio_plat *plat = dev_get_plat(dev);
struct fdtdec_phandle_args args;
int node = dev_of_offset(dev);
int ret;

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@ -22,6 +22,7 @@
#include <fdtdec.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <dm/device-internal.h>
#include <linux/errno.h>
#include <malloc.h>
@ -328,7 +329,7 @@ static int omap_gpio_bind(struct udevice *dev)
plat->base = base_addr;
plat->port_name = fdt_get_name(gd->fdt_blob, dev_of_offset(dev), NULL);
dev->plat = plat;
dev_set_plat(dev, plat);
return 0;
}

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@ -286,8 +286,8 @@ static const struct dm_gpio_ops gpio_exynos_ops = {
static int gpio_exynos_probe(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct exynos_bank_info *priv = dev->priv;
struct exynos_gpio_plat *plat = dev->plat;
struct exynos_bank_info *priv = dev_get_priv(dev);
struct exynos_gpio_plat *plat = dev_get_plat(dev);
/* Only child devices have ports */
if (!plat)
@ -307,7 +307,7 @@ static int gpio_exynos_probe(struct udevice *dev)
*/
static int gpio_exynos_bind(struct udevice *parent)
{
struct exynos_gpio_plat *plat = parent->plat;
struct exynos_gpio_plat *plat = dev_get_plat(parent);
struct s5p_gpio_bank *bank, *base;
const void *blob = gd->fdt_blob;
int node;

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@ -11,6 +11,7 @@
#include <acpi/acpi_device.h>
#include <asm/gpio.h>
#include <dm/acpi.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
#include <dm/lists.h>
#include <dm/of.h>
@ -297,14 +298,15 @@ static int gpio_sandbox_probe(struct udevice *dev)
/* Tell the uclass how many GPIOs we have */
uc_priv->gpio_count = CONFIG_SANDBOX_GPIO_COUNT;
dev->priv = calloc(sizeof(struct gpio_state), uc_priv->gpio_count);
dev_set_priv(dev,
calloc(sizeof(struct gpio_state), uc_priv->gpio_count));
return 0;
}
static int gpio_sandbox_remove(struct udevice *dev)
{
free(dev->priv);
free(dev_get_priv(dev));
return 0;
}

View File

@ -285,7 +285,7 @@ static int gpio_sunxi_bind(struct udevice *parent)
{
struct sunxi_gpio_soc_data *soc_data =
(struct sunxi_gpio_soc_data *)dev_get_driver_data(parent);
struct sunxi_gpio_plat *plat = parent->plat;
struct sunxi_gpio_plat *plat = dev_get_plat(parent);
struct sunxi_gpio_reg *ctlr;
int bank, ret;

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@ -34,7 +34,7 @@ struct tegra186_gpio_plat {
static uint32_t *tegra186_gpio_reg(struct udevice *dev, uint32_t reg,
uint32_t gpio)
{
struct tegra186_gpio_plat *plat = dev->plat;
struct tegra186_gpio_plat *plat = dev_get_plat(dev);
uint32_t index = (reg + (gpio * TEGRA186_GPIO_PER_GPIO_STRIDE)) / 4;
return &(plat->regs[index]);
@ -166,7 +166,7 @@ static const struct dm_gpio_ops tegra186_gpio_ops = {
*/
static int tegra186_gpio_bind(struct udevice *parent)
{
struct tegra186_gpio_plat *parent_plat = parent->plat;
struct tegra186_gpio_plat *parent_plat = dev_get_plat(parent);
struct tegra186_gpio_ctlr_data *ctlr_data =
(struct tegra186_gpio_ctlr_data *)dev_get_driver_data(parent);
uint32_t *regs;
@ -201,7 +201,7 @@ static int tegra186_gpio_bind(struct udevice *parent)
static int tegra186_gpio_probe(struct udevice *dev)
{
struct tegra186_gpio_plat *plat = dev->plat;
struct tegra186_gpio_plat *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
/* Only child devices have ports */

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@ -291,8 +291,8 @@ static const struct udevice_id tegra_gpio_ids[] = {
static int gpio_tegra_probe(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct tegra_port_info *priv = dev->priv;
struct tegra_gpio_plat *plat = dev->plat;
struct tegra_port_info *priv = dev_get_priv(dev);
struct tegra_gpio_plat *plat = dev_get_plat(dev);
/* Only child devices have ports */
if (!plat)
@ -313,7 +313,7 @@ static int gpio_tegra_probe(struct udevice *dev)
*/
static int gpio_tegra_bind(struct udevice *parent)
{
struct tegra_gpio_plat *plat = parent->plat;
struct tegra_gpio_plat *plat = dev_get_plat(parent);
struct gpio_ctlr *ctlr;
int bank_count;
int bank;

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@ -59,7 +59,7 @@ U_BOOT_CMD(
static int altera_sysid_read(struct udevice *dev,
int offset, void *buf, int size)
{
struct altera_sysid_plat *plat = dev->plat;
struct altera_sysid_plat *plat = dev_get_plat(dev);
struct altera_sysid_regs *const regs = plat->regs;
u32 *sysid = buf;

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@ -522,8 +522,8 @@ void cros_ec_check_keyboard(struct udevice *dev)
int cros_ec_probe(struct udevice *dev)
{
struct ec_state *ec = dev->priv;
struct cros_ec_dev *cdev = dev->uclass_priv;
struct ec_state *ec = dev_get_priv(dev);
struct cros_ec_dev *cdev = dev_get_uclass_priv(dev);
struct udevice *keyb_dev;
ofnode node;
int err;

View File

@ -161,7 +161,7 @@ static int fw_get_filesystem_firmware(struct udevice *dev)
else
ret = -ENODEV;
} else {
ret = select_fs_dev(dev->plat);
ret = select_fs_dev(dev_get_plat(dev));
}
if (ret)
@ -228,7 +228,7 @@ static int fs_loader_of_to_plat(struct udevice *dev)
if (ofnode_valid(fs_loader_node)) {
struct device_plat *plat;
plat = dev->plat;
plat = dev_get_plat(dev);
if (!ofnode_read_u32_array(fs_loader_node,
"phandlepart",
phandlepart, 2)) {
@ -250,7 +250,7 @@ static int fs_loader_probe(struct udevice *dev)
{
#if CONFIG_IS_ENABLED(DM) && CONFIG_IS_ENABLED(BLK)
int ret;
struct device_plat *plat = dev->plat;
struct device_plat *plat = dev_get_plat(dev);
if (plat->phandlepart.phandle) {
ofnode node = ofnode_get_by_phandle(plat->phandlepart.phandle);

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@ -109,7 +109,7 @@ static int vexpress_config_probe(struct udevice *dev)
if (!priv)
return -ENOMEM;
dev->uclass_priv = priv;
dev_get_uclass_priv(dev) = priv;
priv->addr = ofnode_get_addr(args.node);
return dev_read_u32(dev, "arm,vexpress,site", &priv->site);

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@ -421,7 +421,7 @@ static int arm_pl180_mmc_probe(struct udevice *dev)
struct arm_pl180_mmc_plat *pdata = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct mmc *mmc = &pdata->mmc;
struct pl180_mmc_host *host = dev->priv;
struct pl180_mmc_host *host = dev_get_priv(dev);
struct mmc_config *cfg = &pdata->cfg;
struct clk clk;
u32 bus_width;
@ -508,7 +508,7 @@ static int dm_host_set_ios(struct udevice *dev)
static int dm_mmc_getcd(struct udevice *dev)
{
struct pl180_mmc_host *host = dev->priv;
struct pl180_mmc_host *host = dev_get_priv(dev);
int value = 1;
if (dm_gpio_is_valid(&host->cd_gpio))
@ -525,7 +525,7 @@ static const struct dm_mmc_ops arm_pl180_dm_mmc_ops = {
static int arm_pl180_mmc_of_to_plat(struct udevice *dev)
{
struct pl180_mmc_host *host = dev->priv;
struct pl180_mmc_host *host = dev_get_priv(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);

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@ -668,7 +668,7 @@ static const struct dm_mmc_ops mxsmmc_ops = {
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static int mxsmmc_of_to_plat(struct udevice *bus)
{
struct mxsmmc_plat *plat = bus->plat;
struct mxsmmc_plat *plat = dev_get_plat(bus);
u32 prop[2];
int ret;

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@ -30,6 +30,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/csrs/csrs-mio_emm.h>
#include <asm/io.h>
#include <dm/device-internal.h>
#include <power/regulator.h>
@ -3841,7 +3842,7 @@ static int octeontx_mmc_host_child_pre_probe(struct udevice *dev)
}
slot = &host->slots[bus_id];
dev->priv = slot;
dev_set_priv(dev, slot);
slot->host = host;
slot->bus_id = bus_id;
slot->dev = dev;
@ -3852,16 +3853,21 @@ static int octeontx_mmc_host_child_pre_probe(struct udevice *dev)
snprintf(name, sizeof(name), "octeontx-mmc%d", bus_id);
err = device_set_name(dev, name);
if (!dev->uclass_priv) {
/* FIXME: This code should not be needed */
if (!dev_get_uclass_priv(dev)) {
debug("%s(%s): Allocating uclass priv\n", __func__,
dev->name);
upriv = calloc(1, sizeof(struct mmc_uclass_priv));
if (!upriv)
return -ENOMEM;
dev->uclass_priv = upriv;
dev->uclass->priv = upriv;
/*
* FIXME: This is not allowed
* dev_set_uclass_priv(dev, upriv);
* uclass_set_priv(dev->uclass, upriv);
*/
} else {
upriv = dev->uclass_priv;
upriv = dev_get_uclass_priv(dev);
}
upriv->mmc = &slot->mmc;
@ -3878,6 +3884,7 @@ static const struct udevice_id octeontx_hsmmc_host_ids[] = {
U_BOOT_DRIVER(octeontx_hsmmc_host) = {
.name = "octeontx_hsmmc_host",
/* FIXME: Why is this not UCLASS_MMC? */
.id = UCLASS_MISC,
.of_match = of_match_ptr(octeontx_hsmmc_host_ids),
.probe = octeontx_mmc_host_probe,

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@ -12,6 +12,7 @@
#include <regmap.h>
#include <syscon.h>
#include <dm/device.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
#include <dm/read.h>
#include <dm/devres.h>
@ -68,7 +69,7 @@ static int mmio_mux_probe(struct udevice *dev)
fields = devm_kmalloc(dev, num_fields * sizeof(*fields), __GFP_ZERO);
if (!fields)
return -ENOMEM;
dev->priv = fields;
dev_set_priv(dev, fields);
mux_reg_masks = devm_kmalloc(dev, num_fields * 2 * sizeof(u32),
__GFP_ZERO);

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@ -54,7 +54,7 @@ int eth_phy_set_mdio_bus(struct udevice *eth_dev, struct mii_dev *mdio_bus)
for (uclass_first_device(UCLASS_ETH_PHY, &dev); dev;
uclass_next_device(&dev)) {
if (dev->parent == eth_dev) {
uc_priv = (struct eth_phy_device_priv *)(dev->uclass_priv);
uc_priv = (struct eth_phy_device_priv *)(dev_get_uclass_priv(dev));
if (!uc_priv->mdio_bus)
uc_priv->mdio_bus = mdio_bus;
@ -79,7 +79,7 @@ struct mii_dev *eth_phy_get_mdio_bus(struct udevice *eth_dev)
* phy_dev is shared and controlled by
* other eth controller
*/
uc_priv = (struct eth_phy_device_priv *)(phy_dev->uclass_priv);
uc_priv = (struct eth_phy_device_priv *)(dev_get_uclass_priv(phy_dev));
if (uc_priv->mdio_bus)
printf("Get shared mii bus on %s\n", eth_dev->name);
else

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@ -547,7 +547,11 @@ static void fm_eth_halt(struct udevice *dev)
struct fm_eth *fm_eth;
struct fsl_enet_mac *mac;
#ifndef CONFIG_DM_ETH
fm_eth = (struct fm_eth *)dev->priv;
#else
fm_eth = dev_get_priv(dev);
#endif
mac = fm_eth->mac;
/* graceful stop the transmission of frames */
@ -577,7 +581,11 @@ static int fm_eth_send(struct udevice *dev, void *buf, int len)
u16 offset_in;
int i;
#ifndef CONFIG_DM_ETH
fm_eth = (struct fm_eth *)dev->priv;
#else
fm_eth = dev_get_priv(dev);
#endif
pram = fm_eth->tx_pram;
txbd = fm_eth->cur_txbd;
@ -664,13 +672,19 @@ static int fm_eth_recv(struct eth_device *dev)
static int fm_eth_recv(struct udevice *dev, int flags, uchar **packetp)
#endif
{
struct fm_eth *fm_eth = (struct fm_eth *)dev->priv;
struct fm_port_bd *rxbd = fm_eth->cur_rxbd;
struct fm_eth *fm_eth;
struct fm_port_bd *rxbd;
u32 buf_lo, buf_hi;
u16 status, len;
int ret = -1;
u8 *data;
#ifndef CONFIG_DM_ETH
fm_eth = (struct fm_eth *)dev->priv;
#else
fm_eth = dev_get_priv(dev);
#endif
rxbd = fm_eth->cur_rxbd;
status = muram_readw(&rxbd->status);
while (!(status & RxBD_EMPTY)) {
@ -704,7 +718,7 @@ static int fm_eth_recv(struct udevice *dev, int flags, uchar **packetp)
#ifdef CONFIG_DM_ETH
static int fm_eth_free_pkt(struct udevice *dev, uchar *packet, int length)
{
struct fm_eth *fm_eth = (struct fm_eth *)dev->priv;
struct fm_eth *fm_eth = (struct fm_eth *)dev_get_priv(dev);
fm_eth->cur_rxbd = fm_eth_free_one(fm_eth, fm_eth->cur_rxbd);
@ -1004,7 +1018,7 @@ static struct udevice *fm_get_internal_mdio(struct udevice *dev)
static int fm_eth_probe(struct udevice *dev)
{
struct fm_eth *fm_eth = (struct fm_eth *)dev->priv;
struct fm_eth *fm_eth = (struct fm_eth *)dev_get_priv(dev);
struct ofnode_phandle_args args;
void *reg;
int ret, index;

View File

@ -79,7 +79,7 @@ static void init_eth_info(struct fec_info_dma *info)
static void fec_halt(struct udevice *dev)
{
struct fec_info_dma *info = dev->priv;
struct fec_info_dma *info = dev_get_priv(dev);
volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
int counter = 0xffff;
@ -230,7 +230,7 @@ static void fec_set_hwaddr(volatile fecdma_t *fecp, u8 *mac)
static int fec_init(struct udevice *dev)
{
struct fec_info_dma *info = dev->priv;
struct fec_info_dma *info = dev_get_priv(dev);
volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
int rval, i;
uchar enetaddr[6];
@ -352,7 +352,7 @@ static int mcdmafec_init(struct udevice *dev)
static int mcdmafec_send(struct udevice *dev, void *packet, int length)
{
struct fec_info_dma *info = dev->priv;
struct fec_info_dma *info = dev_get_priv(dev);
cbd_t *p_tbd, *p_used_tbd;
u16 phy_status;
@ -412,7 +412,7 @@ static int mcdmafec_send(struct udevice *dev, void *packet, int length)
static int mcdmafec_recv(struct udevice *dev, int flags, uchar **packetp)
{
struct fec_info_dma *info = dev->priv;
struct fec_info_dma *info = dev_get_priv(dev);
volatile fecdma_t *fecp = (fecdma_t *)info->iobase;
cbd_t *prbd = &info->rxbd[info->rx_idx];
@ -496,7 +496,7 @@ static const struct eth_ops mcdmafec_ops = {
*/
static int mcdmafec_probe(struct udevice *dev)
{
struct fec_info_dma *info = dev->priv;
struct fec_info_dma *info = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_plat(dev);
int node = dev_of_offset(dev);
int retval;

View File

@ -125,7 +125,7 @@ static void set_fec_duplex_speed(volatile fec_t *fecp, int dup_spd)
#ifdef ET_DEBUG
static void dbg_fec_regs(struct udevice *dev)
{
struct fec_info_s *info = dev->priv;
struct fec_info_s *info = dev_get_priv(dev);
volatile fec_t *fecp = (fec_t *)(info->iobase);
printf("=====\n");
@ -275,7 +275,7 @@ static void dbg_fec_regs(struct udevice *dev)
int mcffec_init(struct udevice *dev)
{
struct fec_info_s *info = dev->priv;
struct fec_info_s *info = dev_get_priv(dev);
volatile fec_t *fecp = (fec_t *) (info->iobase);
int rval, i;
uchar ea[6];
@ -374,7 +374,7 @@ int mcffec_init(struct udevice *dev)
static int mcffec_send(struct udevice *dev, void *packet, int length)
{
struct fec_info_s *info = dev->priv;
struct fec_info_s *info = dev_get_priv(dev);
volatile fec_t *fecp = (fec_t *)info->iobase;
int j, rc;
u16 phy_status;
@ -440,7 +440,7 @@ static int mcffec_send(struct udevice *dev, void *packet, int length)
static int mcffec_recv(struct udevice *dev, int flags, uchar **packetp)
{
struct fec_info_s *info = dev->priv;
struct fec_info_s *info = dev_get_priv(dev);
volatile fec_t *fecp = (fec_t *)info->iobase;
int length = -1;
@ -492,7 +492,7 @@ static int mcffec_recv(struct udevice *dev, int flags, uchar **packetp)
static void mcffec_halt(struct udevice *dev)
{
struct fec_info_s *info = dev->priv;
struct fec_info_s *info = dev_get_priv(dev);
fec_reset(info);
fecpin_setclear(info, 0);
@ -519,7 +519,7 @@ static const struct eth_ops mcffec_ops = {
static int mcffec_probe(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
struct fec_info_s *info = dev->priv;
struct fec_info_s *info = dev_get_priv(dev);
int node = dev_of_offset(dev);
int retval, fec_idx;
const u32 *val;

View File

@ -100,7 +100,11 @@ uint mii_send(uint mii_cmd)
/* retrieve from register structure */
dev = eth_get_dev();
#ifdef CONFIG_DM_ETH
info = dev_get_priv(dev);
#else
info = dev->priv;
#endif
ep = (FEC_T *) info->miibase;
@ -216,7 +220,11 @@ void __mii_init(void)
/* retrieve from register structure */
dev = eth_get_dev();
#ifdef CONFIG_DM_ETH
info = dev_get_priv(dev);
#else
info = dev->priv;
#endif
fecp = (FEC_T *) info->miibase;

View File

@ -157,7 +157,7 @@ static int pfe_eth_start(struct udevice *dev)
static int pfe_eth_send(struct udevice *dev, void *packet, int length)
{
struct pfe_eth_dev *priv = (struct pfe_eth_dev *)dev->priv;
struct pfe_eth_dev *priv = (struct pfe_eth_dev *)dev_get_priv(dev);
int rc;
int i = 0;

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@ -537,7 +537,7 @@ static int sunxi_emac_eth_start(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_plat(dev);
return _sunxi_emac_eth_init(dev->priv, pdata->enetaddr);
return _sunxi_emac_eth_init(dev_get_priv(dev), pdata->enetaddr);
}
static int sunxi_emac_eth_send(struct udevice *dev, void *packet, int length)

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@ -131,11 +131,17 @@ static int tsec_mcast_addr(struct eth_device *dev, const u8 *mcast_mac,
static int tsec_mcast_addr(struct udevice *dev, const u8 *mcast_mac, int join)
#endif
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
struct tsec __iomem *regs = priv->regs;
struct tsec_private *priv;
struct tsec __iomem *regs;
u32 result, value;
u8 whichbit, whichreg;
#ifndef CONFIG_DM_ETH
priv = (struct tsec_private *)dev->priv;
#else
priv = dev_get_priv(dev);
#endif
regs = priv->regs;
result = ether_crc(MAC_ADDR_LEN, mcast_mac);
whichbit = (result >> 24) & 0x1f; /* the 5 LSB = which bit to set */
whichreg = result >> 29; /* the 3 MSB = which reg to set it in */
@ -260,12 +266,18 @@ static int tsec_send(struct eth_device *dev, void *packet, int length)
static int tsec_send(struct udevice *dev, void *packet, int length)
#endif
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
struct tsec __iomem *regs = priv->regs;
struct tsec_private *priv;
struct tsec __iomem *regs;
int result = 0;
u16 status;
int i;
#ifndef CONFIG_DM_ETH
priv = (struct tsec_private *)dev->priv;
#else
priv = dev_get_priv(dev);
#endif
regs = priv->regs;
/* Find an empty buffer descriptor */
for (i = 0;
in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_READY;
@ -339,7 +351,7 @@ static int tsec_recv(struct eth_device *dev)
#else
static int tsec_recv(struct udevice *dev, int flags, uchar **packetp)
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
struct tsec_private *priv = (struct tsec_private *)dev_get_priv(dev);
struct tsec __iomem *regs = priv->regs;
int ret = -1;
@ -368,7 +380,7 @@ static int tsec_recv(struct udevice *dev, int flags, uchar **packetp)
static int tsec_free_pkt(struct udevice *dev, uchar *packet, int length)
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
struct tsec_private *priv = (struct tsec_private *)dev_get_priv(dev);
u16 status;
out_be16(&priv->rxbd[priv->rx_idx].length, 0);
@ -392,8 +404,14 @@ static void tsec_halt(struct eth_device *dev)
static void tsec_halt(struct udevice *dev)
#endif
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
struct tsec __iomem *regs = priv->regs;
struct tsec_private *priv;
struct tsec __iomem *regs;
#ifndef CONFIG_DM_ETH
priv = (struct tsec_private *)dev->priv;
#else
priv = dev_get_priv(dev);
#endif
regs = priv->regs;
clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
setbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
@ -560,16 +578,22 @@ static int tsec_init(struct eth_device *dev, struct bd_info *bd)
static int tsec_init(struct udevice *dev)
#endif
{
struct tsec_private *priv = (struct tsec_private *)dev->priv;
struct tsec_private *priv;
struct tsec __iomem *regs;
#ifdef CONFIG_DM_ETH
struct eth_pdata *pdata = dev_get_plat(dev);
#else
struct eth_device *pdata = dev;
#endif
struct tsec __iomem *regs = priv->regs;
u32 tempval;
int ret;
#ifndef CONFIG_DM_ETH
priv = (struct tsec_private *)dev->priv;
#else
priv = dev_get_priv(dev);
#endif
regs = priv->regs;
/* Make sure the controller is stopped */
tsec_halt(dev);
@ -865,7 +889,7 @@ int tsec_probe(struct udevice *dev)
int tsec_remove(struct udevice *dev)
{
struct tsec_private *priv = dev->priv;
struct tsec_private *priv = dev_get_priv(dev);
free(priv->phydev);
mdio_unregister(priv->bus);

View File

@ -457,7 +457,7 @@ static int emaclite_recv(struct udevice *dev, int flags, uchar **packetp)
{
u32 length, first_read, reg, attempt = 0;
void *addr, *ack;
struct xemaclite *emaclite = dev->priv;
struct xemaclite *emaclite = dev_get_priv(dev);
struct emaclite_regs *regs = emaclite->regs;
struct ethernet_hdr *eth;
struct ip_udp_hdr *ip;

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@ -82,7 +82,7 @@ uint sandbox_pci_read_bar(u32 barval, int type, uint size)
static int sandbox_pci_emul_post_probe(struct udevice *dev)
{
struct sandbox_pci_emul_priv *priv = dev->uclass->priv;
struct sandbox_pci_emul_priv *priv = uclass_get_priv(dev->uclass);
priv->dev_count++;
sandbox_set_enable_pci_map(true);
@ -92,7 +92,7 @@ static int sandbox_pci_emul_post_probe(struct udevice *dev)
static int sandbox_pci_emul_pre_remove(struct udevice *dev)
{
struct sandbox_pci_emul_priv *priv = dev->uclass->priv;
struct sandbox_pci_emul_priv *priv = uclass_get_priv(dev->uclass);
priv->dev_count--;
sandbox_set_enable_pci_map(priv->dev_count > 0);

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@ -524,7 +524,7 @@ static void set_vga_bridge_bits(struct udevice *dev)
int pci_auto_config_devices(struct udevice *bus)
{
struct pci_controller *hose = bus->uclass_priv;
struct pci_controller *hose = dev_get_uclass_priv(bus);
struct pci_child_plat *pplat;
unsigned int sub_bus;
struct udevice *dev;
@ -1007,7 +1007,7 @@ static int pci_uclass_pre_probe(struct udevice *bus)
debug("%s, bus=%d/%s, parent=%s\n", __func__, dev_seq(bus), bus->name,
bus->parent->name);
hose = bus->uclass_priv;
hose = dev_get_uclass_priv(bus);
/*
* Set the sequence number, if device_bind() doesn't. We want control
@ -1109,7 +1109,7 @@ static int pci_bridge_read_config(const struct udevice *bus, pci_dev_t bdf,
uint offset, ulong *valuep,
enum pci_size_t size)
{
struct pci_controller *hose = bus->uclass_priv;
struct pci_controller *hose = dev_get_uclass_priv(bus);
return pci_bus_read_config(hose->ctlr, bdf, offset, valuep, size);
}
@ -1118,7 +1118,7 @@ static int pci_bridge_write_config(struct udevice *bus, pci_dev_t bdf,
uint offset, ulong value,
enum pci_size_t size)
{
struct pci_controller *hose = bus->uclass_priv;
struct pci_controller *hose = dev_get_uclass_priv(bus);
return pci_bus_write_config(hose->ctlr, bdf, offset, value, size);
}

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@ -122,7 +122,7 @@ void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
#else
static int qe_io_of_to_plat(struct udevice *dev)
{
struct qe_io_plat *plat = dev->plat;
struct qe_io_plat *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);
@ -143,7 +143,7 @@ static int qe_io_of_to_plat(struct udevice *dev)
*/
static int par_io_of_config_node(struct udevice *dev, ofnode pio)
{
struct qe_io_plat *plat = dev->plat;
struct qe_io_plat *plat = dev_get_plat(dev);
qepio83xx_t *par_io = plat->base;
const unsigned int *pio_map;
int pio_map_len;

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@ -47,7 +47,7 @@ static int single_configure_pins(struct udevice *dev,
const struct single_fdt_pin_cfg *pins,
int size)
{
struct single_pdata *pdata = dev->plat;
struct single_pdata *pdata = dev_get_plat(dev);
int count = size / sizeof(struct single_fdt_pin_cfg);
phys_addr_t n, reg;
u32 val;
@ -81,7 +81,7 @@ static int single_configure_bits(struct udevice *dev,
const struct single_fdt_bits_cfg *pins,
int size)
{
struct single_pdata *pdata = dev->plat;
struct single_pdata *pdata = dev_get_plat(dev);
int count = size / sizeof(struct single_fdt_bits_cfg);
phys_addr_t n, reg;
u32 val, mask;
@ -153,7 +153,7 @@ static int single_of_to_plat(struct udevice *dev)
fdt_addr_t addr;
u32 of_reg[2];
int res;
struct single_pdata *pdata = dev->plat;
struct single_pdata *pdata = dev_get_plat(dev);
pdata->width =
dev_read_u32_default(dev, "pinctrl-single,register-width", 0);

View File

@ -135,7 +135,7 @@ static const struct da9063_reg_info da9063_buck_info[] = {
static int da9063_get_enable(struct udevice *dev)
{
const struct da9063_priv *priv = dev->priv;
const struct da9063_priv *priv = dev_get_priv(dev);
const struct da9063_reg_info *info = priv->reg_info;
int ret;
@ -148,7 +148,7 @@ static int da9063_get_enable(struct udevice *dev)
static int da9063_set_enable(struct udevice *dev, bool enable)
{
const struct da9063_priv *priv = dev->priv;
const struct da9063_priv *priv = dev_get_priv(dev);
const struct da9063_reg_info *info = priv->reg_info;
return pmic_clrsetbits(dev->parent, info->en_reg,
@ -157,7 +157,7 @@ static int da9063_set_enable(struct udevice *dev, bool enable)
static int da9063_get_voltage(struct udevice *dev)
{
const struct da9063_priv *priv = dev->priv;
const struct da9063_priv *priv = dev_get_priv(dev);
const struct da9063_reg_info *info = priv->reg_info;
int ret;
@ -170,7 +170,7 @@ static int da9063_get_voltage(struct udevice *dev)
static int da9063_set_voltage(struct udevice *dev, int uV)
{
const struct da9063_priv *priv = dev->priv;
const struct da9063_priv *priv = dev_get_priv(dev);
const struct da9063_reg_info *info = priv->reg_info;
uint sel;
@ -198,7 +198,7 @@ static const struct dm_regulator_mode
static int ldo_get_mode(struct udevice *dev)
{
const struct da9063_priv *priv = dev->priv;
const struct da9063_priv *priv = dev_get_priv(dev);
const struct da9063_reg_info *info = priv->reg_info;
int val;
@ -214,7 +214,7 @@ static int ldo_get_mode(struct udevice *dev)
static int ldo_set_mode(struct udevice *dev, int mode_id)
{
const struct da9063_priv *priv = dev->priv;
const struct da9063_priv *priv = dev_get_priv(dev);
const struct da9063_reg_info *info = priv->reg_info;
const struct dm_regulator_mode *mode;
@ -230,7 +230,7 @@ static int ldo_set_mode(struct udevice *dev, int mode_id)
static int buck_get_mode(struct udevice *dev)
{
const struct da9063_priv *priv = dev->priv;
const struct da9063_priv *priv = dev_get_priv(dev);
const struct da9063_reg_info *info = priv->reg_info;
int i;
int val;
@ -261,7 +261,7 @@ static int buck_get_mode(struct udevice *dev)
static int buck_set_mode(struct udevice *dev, int mode_id)
{
const struct da9063_priv *priv = dev->priv;
const struct da9063_priv *priv = dev_get_priv(dev);
const struct da9063_reg_info *info = priv->reg_info;
const struct dm_regulator_mode *mode;
@ -277,7 +277,7 @@ static int buck_set_mode(struct udevice *dev, int mode_id)
static int buck_get_current_limit(struct udevice *dev)
{
const struct da9063_priv *priv = dev->priv;
const struct da9063_priv *priv = dev_get_priv(dev);
const struct da9063_reg_info *info = priv->reg_info;
int val;
@ -293,7 +293,7 @@ static int buck_get_current_limit(struct udevice *dev)
static int buck_set_current_limit(struct udevice *dev, int uA)
{
const struct da9063_priv *priv = dev->priv;
const struct da9063_priv *priv = dev_get_priv(dev);
const struct da9063_reg_info *info = priv->reg_info;
int val;
@ -310,7 +310,7 @@ static int buck_set_current_limit(struct udevice *dev, int uA)
static int da9063_ldo_probe(struct udevice *dev)
{
struct dm_regulator_uclass_plat *uc_pdata;
struct da9063_priv *priv = dev->priv;
struct da9063_priv *priv = dev_get_priv(dev);
/* LDOs are named numerically in DT so can directly index */
if (dev->driver_data < 1 ||
@ -329,7 +329,7 @@ static int da9063_ldo_probe(struct udevice *dev)
static int da9063_buck_probe(struct udevice *dev)
{
struct dm_regulator_uclass_plat *uc_pdata;
struct da9063_priv *priv = dev->priv;
struct da9063_priv *priv = dev_get_priv(dev);
int i;
/* Bucks have names rather than numbers so need to match with DT */

View File

@ -16,6 +16,7 @@
#include <syscon.h>
#include <linux/bitops.h>
#include <linux/ioport.h>
#include <dm/device-internal.h>
#include <dm/read.h>
#ifdef CONFIG_MMC_OMAP36XX_PINS
#include <asm/arch/sys_proto.h>
@ -208,7 +209,7 @@ static int pbias_regulator_probe(struct udevice *dev)
}
uc_pdata->type = REGULATOR_TYPE_OTHER;
dev->priv = (void *)*p;
dev_set_priv(dev, (void *)*p);
return 0;
}

View File

@ -115,7 +115,7 @@ static int rproc_pre_probe(struct udevice *dev)
/* See if we need to populate via fdt */
if (!dev->plat) {
if (!dev_get_plat(dev)) {
#if CONFIG_IS_ENABLED(OF_CONTROL)
int node = dev_of_offset(dev);
const void *blob = gd->fdt_blob;
@ -140,7 +140,7 @@ static int rproc_pre_probe(struct udevice *dev)
#endif
} else {
struct dm_rproc_uclass_pdata *pdata = dev->plat;
struct dm_rproc_uclass_pdata *pdata = dev_get_plat(dev);
debug("'%s': using legacy data\n", dev->name);
if (pdata->name)

View File

@ -14,6 +14,7 @@
#include <regmap.h>
#include <reset-uclass.h>
#include <syscon.h>
#include <dm/device-internal.h>
#include <linux/bitops.h>
#include <linux/err.h>
@ -92,7 +93,7 @@ int mediatek_reset_bind(struct udevice *pdev, u32 regofs, u32 num_regs)
priv = malloc(sizeof(struct mediatek_reset_priv));
priv->regofs = regofs;
priv->nr_resets = num_regs * 32;
rst_dev->priv = priv;
dev_set_priv(rst_dev, priv);
return 0;
}

View File

@ -11,6 +11,7 @@
#include <linux/bitops.h>
#include <linux/io.h>
#include <asm/arch-rockchip/hardware.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
/*
* Each reg has 16 bits reset signal for devices
@ -121,7 +122,7 @@ int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number)
priv = malloc(sizeof(struct rockchip_reset_priv));
priv->reset_reg_offset = reg_offset;
priv->reset_reg_num = reg_number;
rst_dev->priv = priv;
dev_set_priv(rst_dev, priv);
return 0;
}

View File

@ -9,6 +9,7 @@
#include <reset-uclass.h>
#include <asm/io.h>
#include <dm/device_compat.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <linux/bitops.h>
@ -97,7 +98,7 @@ int sifive_reset_bind(struct udevice *dev, ulong count)
}
priv = malloc(sizeof(struct sifive_reset_priv));
priv->nr_reset = count;
rst_dev->priv = priv;
dev_set_priv(rst_dev, priv);
return 0;
}

View File

@ -11,6 +11,7 @@
#include <malloc.h>
#include <reset-uclass.h>
#include <asm/io.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <linux/bitops.h>
#include <linux/log2.h>
@ -113,7 +114,7 @@ int sunxi_reset_bind(struct udevice *dev, ulong count)
priv = malloc(sizeof(struct sunxi_reset_priv));
priv->count = count;
priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev);
rst_dev->priv = priv;
dev_set_priv(rst_dev, priv);
return 0;
}

View File

@ -37,7 +37,7 @@ static int altera_jtaguart_setbrg(struct udevice *dev, int baudrate)
static int altera_jtaguart_putc(struct udevice *dev, const char ch)
{
struct altera_jtaguart_plat *plat = dev->plat;
struct altera_jtaguart_plat *plat = dev_get_plat(dev);
struct altera_jtaguart_regs *const regs = plat->regs;
u32 st = readl(&regs->control);
@ -56,7 +56,7 @@ static int altera_jtaguart_putc(struct udevice *dev, const char ch)
static int altera_jtaguart_pending(struct udevice *dev, bool input)
{
struct altera_jtaguart_plat *plat = dev->plat;
struct altera_jtaguart_plat *plat = dev_get_plat(dev);
struct altera_jtaguart_regs *const regs = plat->regs;
u32 st = readl(&regs->control);
@ -68,7 +68,7 @@ static int altera_jtaguart_pending(struct udevice *dev, bool input)
static int altera_jtaguart_getc(struct udevice *dev)
{
struct altera_jtaguart_plat *plat = dev->plat;
struct altera_jtaguart_plat *plat = dev_get_plat(dev);
struct altera_jtaguart_regs *const regs = plat->regs;
u32 val;
@ -83,7 +83,7 @@ static int altera_jtaguart_getc(struct udevice *dev)
static int altera_jtaguart_probe(struct udevice *dev)
{
#ifdef CONFIG_ALTERA_JTAG_UART_BYPASS
struct altera_jtaguart_plat *plat = dev->plat;
struct altera_jtaguart_plat *plat = dev_get_plat(dev);
struct altera_jtaguart_regs *const regs = plat->regs;
writel(ALTERA_JTAG_AC, &regs->control); /* clear AC flag */

View File

@ -32,7 +32,7 @@ struct altera_uart_plat {
static int altera_uart_setbrg(struct udevice *dev, int baudrate)
{
struct altera_uart_plat *plat = dev->plat;
struct altera_uart_plat *plat = dev_get_plat(dev);
struct altera_uart_regs *const regs = plat->regs;
u32 div;
@ -44,7 +44,7 @@ static int altera_uart_setbrg(struct udevice *dev, int baudrate)
static int altera_uart_putc(struct udevice *dev, const char ch)
{
struct altera_uart_plat *plat = dev->plat;
struct altera_uart_plat *plat = dev_get_plat(dev);
struct altera_uart_regs *const regs = plat->regs;
if (!(readl(&regs->status) & ALTERA_UART_TRDY))
@ -57,7 +57,7 @@ static int altera_uart_putc(struct udevice *dev, const char ch)
static int altera_uart_pending(struct udevice *dev, bool input)
{
struct altera_uart_plat *plat = dev->plat;
struct altera_uart_plat *plat = dev_get_plat(dev);
struct altera_uart_regs *const regs = plat->regs;
u32 st = readl(&regs->status);
@ -69,7 +69,7 @@ static int altera_uart_pending(struct udevice *dev, bool input)
static int altera_uart_getc(struct udevice *dev)
{
struct altera_uart_plat *plat = dev->plat;
struct altera_uart_plat *plat = dev_get_plat(dev);
struct altera_uart_regs *const regs = plat->regs;
if (!(readl(&regs->status) & ALTERA_UART_RRDY))

View File

@ -262,7 +262,7 @@ static int atmel_serial_enable_clk(struct udevice *dev)
static int atmel_serial_probe(struct udevice *dev)
{
struct atmel_serial_plat *plat = dev->plat;
struct atmel_serial_plat *plat = dev_get_plat(dev);
struct atmel_serial_priv *priv = dev_get_priv(dev);
int ret;
#if CONFIG_IS_ENABLED(OF_CONTROL)

View File

@ -498,7 +498,7 @@ static int ns16550_serial_assign_base(struct ns16550_plat *plat, ulong base)
int ns16550_serial_probe(struct udevice *dev)
{
struct ns16550_plat *plat = dev->plat;
struct ns16550_plat *plat = dev_get_plat(dev);
struct ns16550 *const com_port = dev_get_priv(dev);
struct reset_ctl_bulk reset_bulk;
fdt_addr_t addr;
@ -535,7 +535,7 @@ enum {
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
int ns16550_serial_of_to_plat(struct udevice *dev)
{
struct ns16550_plat *plat = dev->plat;
struct ns16550_plat *plat = dev_get_plat(dev);
const u32 port_type = dev_get_driver_data(dev);
fdt_addr_t addr;
struct clk clk;

View File

@ -72,7 +72,7 @@ static int sandbox_serial_probe(struct udevice *dev)
static int sandbox_serial_remove(struct udevice *dev)
{
struct sandbox_serial_plat *plat = dev->plat;
struct sandbox_serial_plat *plat = dev_get_plat(dev);
if (plat->colour != -1)
output_ansi_reset();
@ -83,7 +83,7 @@ static int sandbox_serial_remove(struct udevice *dev)
static int sandbox_serial_putc(struct udevice *dev, const char ch)
{
struct sandbox_serial_priv *priv = dev_get_priv(dev);
struct sandbox_serial_plat *plat = dev->plat;
struct sandbox_serial_plat *plat = dev_get_plat(dev);
/* With of-platdata we don't real the colour correctly, so disable it */
if (!CONFIG_IS_ENABLED(OF_PLATDATA) && priv->start_of_line &&
@ -203,7 +203,7 @@ static const char * const ansi_colour[] = {
static int sandbox_serial_of_to_plat(struct udevice *dev)
{
struct sandbox_serial_plat *plat = dev->plat;
struct sandbox_serial_plat *plat = dev_get_plat(dev);
const char *colour;
int i;

View File

@ -37,7 +37,7 @@ struct arc_serial_plat {
static int arc_serial_setbrg(struct udevice *dev, int baudrate)
{
struct arc_serial_plat *plat = dev->plat;
struct arc_serial_plat *plat = dev_get_plat(dev);
struct arc_serial_regs *const regs = plat->reg;
int arc_console_baud = gd->cpu_clk / (baudrate * 4) - 1;
@ -49,7 +49,7 @@ static int arc_serial_setbrg(struct udevice *dev, int baudrate)
static int arc_serial_putc(struct udevice *dev, const char c)
{
struct arc_serial_plat *plat = dev->plat;
struct arc_serial_plat *plat = dev_get_plat(dev);
struct arc_serial_regs *const regs = plat->reg;
while (!(readb(&regs->status) & UART_TXEMPTY))
@ -67,7 +67,7 @@ static int arc_serial_tstc(struct arc_serial_regs *const regs)
static int arc_serial_pending(struct udevice *dev, bool input)
{
struct arc_serial_plat *plat = dev->plat;
struct arc_serial_plat *plat = dev_get_plat(dev);
struct arc_serial_regs *const regs = plat->reg;
uint32_t status = readb(&regs->status);
@ -79,7 +79,7 @@ static int arc_serial_pending(struct udevice *dev, bool input)
static int arc_serial_getc(struct udevice *dev)
{
struct arc_serial_plat *plat = dev->plat;
struct arc_serial_plat *plat = dev_get_plat(dev);
struct arc_serial_regs *const regs = plat->reg;
while (!arc_serial_tstc(regs))

View File

@ -168,7 +168,7 @@ static void linflex_serial_init_internal(struct linflex_fsl *lfuart)
static int linflex_serial_probe(struct udevice *dev)
{
struct linflex_serial_plat *plat = dev->plat;
struct linflex_serial_plat *plat = dev_get_plat(dev);
struct linflex_serial_priv *priv = dev_get_priv(dev);
priv->lfuart = (struct linflex_fsl *)plat->base_addr;

View File

@ -138,7 +138,7 @@ static inline int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
static bool is_lpuart32(struct udevice *dev)
{
struct lpuart_serial_plat *plat = dev->plat;
struct lpuart_serial_plat *plat = dev_get_plat(dev);
return plat->flags & LPUART_FLAG_REGMAP_32BIT_REG;
}
@ -445,7 +445,7 @@ static int lpuart_serial_setbrg(struct udevice *dev, int baudrate)
static int lpuart_serial_getc(struct udevice *dev)
{
struct lpuart_serial_plat *plat = dev->plat;
struct lpuart_serial_plat *plat = dev_get_plat(dev);
if (is_lpuart32(dev))
return _lpuart32_serial_getc(plat);
@ -455,7 +455,7 @@ static int lpuart_serial_getc(struct udevice *dev)
static int lpuart_serial_putc(struct udevice *dev, const char c)
{
struct lpuart_serial_plat *plat = dev->plat;
struct lpuart_serial_plat *plat = dev_get_plat(dev);
if (is_lpuart32(dev))
_lpuart32_serial_putc(plat, c);
@ -467,7 +467,7 @@ static int lpuart_serial_putc(struct udevice *dev, const char c)
static int lpuart_serial_pending(struct udevice *dev, bool input)
{
struct lpuart_serial_plat *plat = dev->plat;
struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct lpuart_fsl *reg = plat->reg;
struct lpuart_fsl_reg32 *reg32 = plat->reg;
u32 stat;
@ -513,7 +513,7 @@ static int lpuart_serial_probe(struct udevice *dev)
static int lpuart_serial_of_to_plat(struct udevice *dev)
{
struct lpuart_serial_plat *plat = dev->plat;
struct lpuart_serial_plat *plat = dev_get_plat(dev);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(dev);
fdt_addr_t addr;

View File

@ -83,7 +83,7 @@ static void mcf_serial_setbrg_common(uart_t *uart, int baudrate)
static int coldfire_serial_probe(struct udevice *dev)
{
struct coldfire_serial_plat *plat = dev->plat;
struct coldfire_serial_plat *plat = dev_get_plat(dev);
plat->port = dev_seq(dev);
@ -93,7 +93,7 @@ static int coldfire_serial_probe(struct udevice *dev)
static int coldfire_serial_putc(struct udevice *dev, const char ch)
{
struct coldfire_serial_plat *plat = dev->plat;
struct coldfire_serial_plat *plat = dev_get_plat(dev);
uart_t *uart = (uart_t *)plat->base;
/* Wait for last character to go. */
@ -107,7 +107,7 @@ static int coldfire_serial_putc(struct udevice *dev, const char ch)
static int coldfire_serial_getc(struct udevice *dev)
{
struct coldfire_serial_plat *plat = dev->plat;
struct coldfire_serial_plat *plat = dev_get_plat(dev);
uart_t *uart = (uart_t *)(plat->base);
/* Wait for a character to arrive. */
@ -119,7 +119,7 @@ static int coldfire_serial_getc(struct udevice *dev)
int coldfire_serial_setbrg(struct udevice *dev, int baudrate)
{
struct coldfire_serial_plat *plat = dev->plat;
struct coldfire_serial_plat *plat = dev_get_plat(dev);
uart_t *uart = (uart_t *)(plat->base);
mcf_serial_setbrg_common(uart, baudrate);
@ -129,7 +129,7 @@ int coldfire_serial_setbrg(struct udevice *dev, int baudrate)
static int coldfire_serial_pending(struct udevice *dev, bool input)
{
struct coldfire_serial_plat *plat = dev->plat;
struct coldfire_serial_plat *plat = dev_get_plat(dev);
uart_t *uart = (uart_t *)(plat->base);
if (input)

View File

@ -57,7 +57,7 @@ static void meson_serial_init(struct meson_uart *uart)
static int meson_serial_probe(struct udevice *dev)
{
struct meson_serial_plat *plat = dev->plat;
struct meson_serial_plat *plat = dev_get_plat(dev);
struct meson_uart *const uart = plat->reg;
meson_serial_init(uart);
@ -67,7 +67,7 @@ static int meson_serial_probe(struct udevice *dev)
static void meson_serial_rx_error(struct udevice *dev)
{
struct meson_serial_plat *plat = dev->plat;
struct meson_serial_plat *plat = dev_get_plat(dev);
struct meson_uart *const uart = plat->reg;
u32 val = readl(&uart->control);
@ -83,7 +83,7 @@ static void meson_serial_rx_error(struct udevice *dev)
static int meson_serial_getc(struct udevice *dev)
{
struct meson_serial_plat *plat = dev->plat;
struct meson_serial_plat *plat = dev_get_plat(dev);
struct meson_uart *const uart = plat->reg;
uint32_t status = readl(&uart->status);
@ -100,7 +100,7 @@ static int meson_serial_getc(struct udevice *dev)
static int meson_serial_putc(struct udevice *dev, const char ch)
{
struct meson_serial_plat *plat = dev->plat;
struct meson_serial_plat *plat = dev_get_plat(dev);
struct meson_uart *const uart = plat->reg;
if (readl(&uart->status) & AML_UART_TX_FULL)
@ -113,7 +113,7 @@ static int meson_serial_putc(struct udevice *dev, const char ch)
static int meson_serial_pending(struct udevice *dev, bool input)
{
struct meson_serial_plat *plat = dev->plat;
struct meson_serial_plat *plat = dev_get_plat(dev);
struct meson_uart *const uart = plat->reg;
uint32_t status = readl(&uart->status);
@ -138,7 +138,7 @@ static int meson_serial_pending(struct udevice *dev, bool input)
static int meson_serial_of_to_plat(struct udevice *dev)
{
struct meson_serial_plat *plat = dev->plat;
struct meson_serial_plat *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);

View File

@ -264,7 +264,7 @@ __weak struct serial_device *default_serial_console(void)
int mxc_serial_setbrg(struct udevice *dev, int baudrate)
{
struct mxc_serial_plat *plat = dev->plat;
struct mxc_serial_plat *plat = dev_get_plat(dev);
u32 clk = imx_get_uartclk();
_mxc_serial_setbrg(plat->reg, clk, baudrate, plat->use_dte);
@ -274,7 +274,7 @@ int mxc_serial_setbrg(struct udevice *dev, int baudrate)
static int mxc_serial_probe(struct udevice *dev)
{
struct mxc_serial_plat *plat = dev->plat;
struct mxc_serial_plat *plat = dev_get_plat(dev);
_mxc_serial_init(plat->reg, plat->use_dte);
@ -283,7 +283,7 @@ static int mxc_serial_probe(struct udevice *dev)
static int mxc_serial_getc(struct udevice *dev)
{
struct mxc_serial_plat *plat = dev->plat;
struct mxc_serial_plat *plat = dev_get_plat(dev);
struct mxc_uart *const uart = plat->reg;
if (readl(&uart->ts) & UTS_RXEMPTY)
@ -294,7 +294,7 @@ static int mxc_serial_getc(struct udevice *dev)
static int mxc_serial_putc(struct udevice *dev, const char ch)
{
struct mxc_serial_plat *plat = dev->plat;
struct mxc_serial_plat *plat = dev_get_plat(dev);
struct mxc_uart *const uart = plat->reg;
if (!(readl(&uart->ts) & UTS_TXEMPTY))
@ -307,7 +307,7 @@ static int mxc_serial_putc(struct udevice *dev, const char ch)
static int mxc_serial_pending(struct udevice *dev, bool input)
{
struct mxc_serial_plat *plat = dev->plat;
struct mxc_serial_plat *plat = dev_get_plat(dev);
struct mxc_uart *const uart = plat->reg;
uint32_t sr2 = readl(&uart->sr2);
@ -327,7 +327,7 @@ static const struct dm_serial_ops mxc_serial_ops = {
#if CONFIG_IS_ENABLED(OF_CONTROL)
static int mxc_serial_of_to_plat(struct udevice *dev)
{
struct mxc_serial_plat *plat = dev->plat;
struct mxc_serial_plat *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);

View File

@ -101,7 +101,7 @@ DEBUG_UART_FUNCS
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static int omap_serial_of_to_plat(struct udevice *dev)
{
struct ns16550_plat *plat = dev->plat;
struct ns16550_plat *plat = dev_get_plat(dev);
fdt_addr_t addr;
struct clk clk;
int err;

View File

@ -268,7 +268,7 @@ void pxa_serial_initialize(void)
#ifdef CONFIG_DM_SERIAL
static int pxa_serial_probe(struct udevice *dev)
{
struct pxa_serial_plat *plat = dev->plat;
struct pxa_serial_plat *plat = dev_get_plat(dev);
pxa_setbrg_common((struct pxa_uart_regs *)plat->base, plat->port,
plat->baudrate);
@ -277,7 +277,7 @@ static int pxa_serial_probe(struct udevice *dev)
static int pxa_serial_putc(struct udevice *dev, const char ch)
{
struct pxa_serial_plat *plat = dev->plat;
struct pxa_serial_plat *plat = dev_get_plat(dev);
struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base;
/* Wait for last character to go. */
@ -291,7 +291,7 @@ static int pxa_serial_putc(struct udevice *dev, const char ch)
static int pxa_serial_getc(struct udevice *dev)
{
struct pxa_serial_plat *plat = dev->plat;
struct pxa_serial_plat *plat = dev_get_plat(dev);
struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base;
/* Wait for a character to arrive. */
@ -303,7 +303,7 @@ static int pxa_serial_getc(struct udevice *dev)
int pxa_serial_setbrg(struct udevice *dev, int baudrate)
{
struct pxa_serial_plat *plat = dev->plat;
struct pxa_serial_plat *plat = dev_get_plat(dev);
struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base;
int port = plat->port;
@ -314,7 +314,7 @@ int pxa_serial_setbrg(struct udevice *dev, int baudrate)
static int pxa_serial_pending(struct udevice *dev, bool input)
{
struct pxa_serial_plat *plat = dev->plat;
struct pxa_serial_plat *plat = dev_get_plat(dev);
struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base;
if (input)

View File

@ -10,6 +10,7 @@
#include <ns16550.h>
#include <serial.h>
#include <asm/arch-rockchip/clock.h>
#include <dm/device-internal.h>
#if defined(CONFIG_ROCKCHIP_RK3188)
struct rockchip_uart_plat {
@ -34,7 +35,7 @@ static int rockchip_serial_probe(struct udevice *dev)
plat->plat.reg_shift = plat->dtplat.reg_shift;
plat->plat.clock = plat->dtplat.clock_frequency;
plat->plat.fcr = UART_FCR_DEFVAL;
dev->plat = &plat->plat;
dev_set_plat(dev, &plat->plat);
return ns16550_serial_probe(dev);
}

View File

@ -88,7 +88,7 @@ static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,
#ifndef CONFIG_SPL_BUILD
int s5p_serial_setbrg(struct udevice *dev, int baudrate)
{
struct s5p_serial_plat *plat = dev->plat;
struct s5p_serial_plat *plat = dev_get_plat(dev);
struct s5p_uart *const uart = plat->reg;
u32 uclk;
@ -111,7 +111,7 @@ int s5p_serial_setbrg(struct udevice *dev, int baudrate)
static int s5p_serial_probe(struct udevice *dev)
{
struct s5p_serial_plat *plat = dev->plat;
struct s5p_serial_plat *plat = dev_get_plat(dev);
struct s5p_uart *const uart = plat->reg;
s5p_serial_init(uart);
@ -140,7 +140,7 @@ static int serial_err_check(const struct s5p_uart *const uart, int op)
static int s5p_serial_getc(struct udevice *dev)
{
struct s5p_serial_plat *plat = dev->plat;
struct s5p_serial_plat *plat = dev_get_plat(dev);
struct s5p_uart *const uart = plat->reg;
if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
@ -152,7 +152,7 @@ static int s5p_serial_getc(struct udevice *dev)
static int s5p_serial_putc(struct udevice *dev, const char ch)
{
struct s5p_serial_plat *plat = dev->plat;
struct s5p_serial_plat *plat = dev_get_plat(dev);
struct s5p_uart *const uart = plat->reg;
if (readl(&uart->ufstat) & TX_FIFO_FULL)
@ -166,7 +166,7 @@ static int s5p_serial_putc(struct udevice *dev, const char ch)
static int s5p_serial_pending(struct udevice *dev, bool input)
{
struct s5p_serial_plat *plat = dev->plat;
struct s5p_serial_plat *plat = dev_get_plat(dev);
struct s5p_uart *const uart = plat->reg;
uint32_t ufstat = readl(&uart->ufstat);
@ -178,7 +178,7 @@ static int s5p_serial_pending(struct udevice *dev, bool input)
static int s5p_serial_of_to_plat(struct udevice *dev)
{
struct s5p_serial_plat *plat = dev->plat;
struct s5p_serial_plat *plat = dev_get_plat(dev);
fdt_addr_t addr;
addr = dev_read_addr(dev);

View File

@ -27,7 +27,7 @@
static int cadence_spi_write_speed(struct udevice *bus, uint hz)
{
struct cadence_spi_plat *plat = bus->plat;
struct cadence_spi_plat *plat = dev_get_plat(bus);
struct cadence_spi_priv *priv = dev_get_priv(bus);
cadence_qspi_apb_config_baudrate_div(priv->regbase,
@ -130,7 +130,7 @@ static int spi_calibration(struct udevice *bus, uint hz)
static int cadence_spi_set_speed(struct udevice *bus, uint hz)
{
struct cadence_spi_plat *plat = bus->plat;
struct cadence_spi_plat *plat = dev_get_plat(bus);
struct cadence_spi_priv *priv = dev_get_priv(bus);
int err;
@ -165,7 +165,7 @@ static int cadence_spi_set_speed(struct udevice *bus, uint hz)
static int cadence_spi_probe(struct udevice *bus)
{
struct cadence_spi_plat *plat = bus->plat;
struct cadence_spi_plat *plat = dev_get_plat(bus);
struct cadence_spi_priv *priv = dev_get_priv(bus);
struct clk clk;
int ret;
@ -212,7 +212,7 @@ static int cadence_spi_remove(struct udevice *dev)
static int cadence_spi_set_mode(struct udevice *bus, uint mode)
{
struct cadence_spi_plat *plat = bus->plat;
struct cadence_spi_plat *plat = dev_get_plat(bus);
struct cadence_spi_priv *priv = dev_get_priv(bus);
/* Disable QSPI */
@ -235,7 +235,7 @@ static int cadence_spi_mem_exec_op(struct spi_slave *spi,
const struct spi_mem_op *op)
{
struct udevice *bus = spi->dev->parent;
struct cadence_spi_plat *plat = bus->plat;
struct cadence_spi_plat *plat = dev_get_plat(bus);
struct cadence_spi_priv *priv = dev_get_priv(bus);
void *base = priv->regbase;
int err = 0;
@ -284,7 +284,7 @@ static int cadence_spi_mem_exec_op(struct spi_slave *spi,
static int cadence_spi_of_to_plat(struct udevice *bus)
{
struct cadence_spi_plat *plat = bus->plat;
struct cadence_spi_plat *plat = dev_get_plat(bus);
ofnode subnode;
plat->regbase = (void *)devfdt_get_addr_index(bus, 0);

View File

@ -387,7 +387,7 @@ static int coldfire_spi_probe(struct udevice *bus)
static int coldfire_dspi_of_to_plat(struct udevice *bus)
{
fdt_addr_t addr;
struct coldfire_spi_plat *plat = bus->plat;
struct coldfire_spi_plat *plat = dev_get_plat(bus);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);
int *ctar, len;

View File

@ -383,7 +383,7 @@ static const struct dm_spi_ops davinci_spi_ops = {
static int davinci_spi_probe(struct udevice *bus)
{
struct davinci_spi_slave *ds = dev_get_priv(bus);
struct davinci_spi_plat *plat = bus->plat;
struct davinci_spi_plat *plat = dev_get_plat(bus);
ds->regs = plat->regs;
ds->num_cs = plat->num_cs;
@ -393,7 +393,7 @@ static int davinci_spi_probe(struct udevice *bus)
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static int davinci_ofdata_to_platadata(struct udevice *bus)
{
struct davinci_spi_plat *plat = bus->plat;
struct davinci_spi_plat *plat = dev_get_plat(bus);
fdt_addr_t addr;
addr = dev_read_addr(bus);

View File

@ -155,7 +155,7 @@ static int request_gpio_cs(struct udevice *bus)
static int dw_spi_of_to_plat(struct udevice *bus)
{
struct dw_spi_plat *plat = bus->plat;
struct dw_spi_plat *plat = dev_get_plat(bus);
plat->regs = dev_read_addr_ptr(bus);
@ -478,7 +478,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
static int dw_spi_set_speed(struct udevice *bus, uint speed)
{
struct dw_spi_plat *plat = bus->plat;
struct dw_spi_plat *plat = dev_get_plat(bus);
struct dw_spi_priv *priv = dev_get_priv(bus);
u16 clk_div;

View File

@ -253,7 +253,7 @@ static void spi_cs_deactivate(struct udevice *dev)
static int exynos_spi_of_to_plat(struct udevice *bus)
{
struct exynos_spi_plat *plat = bus->plat;
struct exynos_spi_plat *plat = dev_get_plat(bus);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);
@ -368,7 +368,7 @@ static int exynos_spi_xfer(struct udevice *dev, unsigned int bitlen,
static int exynos_spi_set_speed(struct udevice *bus, uint speed)
{
struct exynos_spi_plat *plat = bus->plat;
struct exynos_spi_plat *plat = dev_get_plat(bus);
struct exynos_spi_priv *priv = dev_get_priv(bus);
int ret;

View File

@ -486,7 +486,7 @@ static int fsl_dspi_probe(struct udevice *bus)
struct dm_spi_bus *dm_spi_bus;
uint mcr_cfg_val;
dm_spi_bus = bus->uclass_priv;
dm_spi_bus = dev_get_uclass_priv(bus);
/* cpu speical pin muxing configure */
cpu_dspi_port_conf();
@ -576,7 +576,7 @@ static int fsl_dspi_bind(struct udevice *bus)
static int fsl_dspi_of_to_plat(struct udevice *bus)
{
fdt_addr_t addr;
struct fsl_dspi_plat *plat = bus->plat;
struct fsl_dspi_plat *plat = dev_get_plat(bus);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);

View File

@ -544,7 +544,7 @@ static const struct dm_spi_ops fsl_espi_ops = {
static int fsl_espi_of_to_plat(struct udevice *bus)
{
fdt_addr_t addr;
struct fsl_espi_plat *plat = bus->plat;
struct fsl_espi_plat *plat = dev_get_plat(bus);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);

View File

@ -795,7 +795,7 @@ static const struct spi_controller_mem_ops fsl_qspi_mem_ops = {
static int fsl_qspi_probe(struct udevice *bus)
{
struct dm_spi_bus *dm_bus = bus->uclass_priv;
struct dm_spi_bus *dm_bus = dev_get_uclass_priv(bus);
struct fsl_qspi *q = dev_get_priv(bus);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);

View File

@ -443,7 +443,7 @@ static const struct dm_spi_ops mxs_spi_ops = {
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
static int mxs_of_to_plat(struct udevice *bus)
{
struct mxs_spi_plat *plat = bus->plat;
struct mxs_spi_plat *plat = dev_get_plat(bus);
u32 prop[2];
int ret;

View File

@ -288,7 +288,7 @@ static const struct dm_spi_ops pl022_spi_ops = {
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
static int pl022_spi_of_to_plat(struct udevice *bus)
{
struct pl022_spi_pdata *plat = bus->plat;
struct pl022_spi_pdata *plat = dev_get_plat(bus);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(bus);
struct clk clkdev;

View File

@ -135,7 +135,7 @@ static int rkspi_wait_till_not_busy(struct rockchip_spi *regs)
static void spi_cs_activate(struct udevice *dev, uint cs)
{
struct udevice *bus = dev->parent;
struct rockchip_spi_plat *plat = bus->plat;
struct rockchip_spi_plat *plat = dev_get_plat(bus);
struct rockchip_spi_priv *priv = dev_get_priv(bus);
struct rockchip_spi *regs = priv->regs;
@ -161,7 +161,7 @@ static void spi_cs_activate(struct udevice *dev, uint cs)
static void spi_cs_deactivate(struct udevice *dev, uint cs)
{
struct udevice *bus = dev->parent;
struct rockchip_spi_plat *plat = bus->plat;
struct rockchip_spi_plat *plat = dev_get_plat(bus);
struct rockchip_spi_priv *priv = dev_get_priv(bus);
struct rockchip_spi *regs = priv->regs;
@ -176,7 +176,7 @@ static void spi_cs_deactivate(struct udevice *dev, uint cs)
#if CONFIG_IS_ENABLED(OF_PLATDATA)
static int conv_of_plat(struct udevice *dev)
{
struct rockchip_spi_plat *plat = dev->plat;
struct rockchip_spi_plat *plat = dev_get_plat(dev);
struct dtd_rockchip_rk3288_spi *dtplat = &plat->of_plat;
struct rockchip_spi_priv *priv = dev_get_priv(dev);
int ret;

View File

@ -228,7 +228,7 @@ static const struct dm_spi_ops soft_spi_ops = {
static int soft_spi_of_to_plat(struct udevice *dev)
{
struct soft_spi_plat *plat = dev->plat;
struct soft_spi_plat *plat = dev_get_plat(dev);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(dev);
@ -240,7 +240,7 @@ static int soft_spi_of_to_plat(struct udevice *dev)
static int soft_spi_probe(struct udevice *dev)
{
struct spi_slave *slave = dev_get_parent_priv(dev);
struct soft_spi_plat *plat = dev->plat;
struct soft_spi_plat *plat = dev_get_plat(dev);
int cs_flags, clk_flags;
int ret;

View File

@ -99,7 +99,7 @@ struct tegra114_spi_priv {
static int tegra114_spi_of_to_plat(struct udevice *bus)
{
struct tegra_spi_plat *plat = bus->plat;
struct tegra_spi_plat *plat = dev_get_plat(bus);
plat->base = dev_read_addr(bus);
plat->periph_id = clock_decode_periph_id(bus);
@ -352,7 +352,7 @@ static int tegra114_spi_xfer(struct udevice *dev, unsigned int bitlen,
static int tegra114_spi_set_speed(struct udevice *bus, uint speed)
{
struct tegra_spi_plat *plat = bus->plat;
struct tegra_spi_plat *plat = dev_get_plat(bus);
struct tegra114_spi_priv *priv = dev_get_priv(bus);
if (speed > plat->frequency)

View File

@ -89,7 +89,7 @@ int tegra20_sflash_cs_info(struct udevice *bus, unsigned int cs,
static int tegra20_sflash_of_to_plat(struct udevice *bus)
{
struct tegra_spi_plat *plat = bus->plat;
struct tegra_spi_plat *plat = dev_get_plat(bus);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);
@ -314,7 +314,7 @@ static int tegra20_sflash_xfer(struct udevice *dev, unsigned int bitlen,
static int tegra20_sflash_set_speed(struct udevice *bus, uint speed)
{
struct tegra_spi_plat *plat = bus->plat;
struct tegra_spi_plat *plat = dev_get_plat(bus);
struct tegra20_sflash_priv *priv = dev_get_priv(bus);
if (speed > plat->frequency)

View File

@ -95,7 +95,7 @@ struct tegra_spi_slave {
static int tegra30_spi_of_to_plat(struct udevice *bus)
{
struct tegra_spi_plat *plat = bus->plat;
struct tegra_spi_plat *plat = dev_get_plat(bus);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);
@ -314,7 +314,7 @@ static int tegra30_spi_xfer(struct udevice *dev, unsigned int bitlen,
static int tegra30_spi_set_speed(struct udevice *bus, uint speed)
{
struct tegra_spi_plat *plat = bus->plat;
struct tegra_spi_plat *plat = dev_get_plat(bus);
struct tegra30_spi_priv *priv = dev_get_priv(bus);
if (speed > plat->frequency)

View File

@ -99,7 +99,7 @@ struct tegra210_qspi_priv {
static int tegra210_qspi_of_to_plat(struct udevice *bus)
{
struct tegra_spi_plat *plat = bus->plat;
struct tegra_spi_plat *plat = dev_get_plat(bus);
plat->base = dev_read_addr(bus);
plat->periph_id = clock_decode_periph_id(bus);
@ -380,7 +380,7 @@ static int tegra210_qspi_xfer(struct udevice *dev, unsigned int bitlen,
static int tegra210_qspi_set_speed(struct udevice *bus, uint speed)
{
struct tegra_spi_plat *plat = bus->plat;
struct tegra_spi_plat *plat = dev_get_plat(bus);
struct tegra210_qspi_priv *priv = dev_get_priv(bus);
if (speed > plat->frequency)

View File

@ -113,7 +113,7 @@ static void uniphier_spi_regdump(struct uniphier_spi_priv *priv)
static void spi_cs_activate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
struct uniphier_spi_plat *plat = bus->plat;
struct uniphier_spi_plat *plat = dev_get_plat(bus);
struct uniphier_spi_priv *priv = dev_get_priv(bus);
ulong delay_us; /* The delay completed so far */
u32 val;
@ -139,7 +139,7 @@ static void spi_cs_activate(struct udevice *dev)
static void spi_cs_deactivate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
struct uniphier_spi_plat *plat = bus->plat;
struct uniphier_spi_plat *plat = dev_get_plat(bus);
struct uniphier_spi_priv *priv = dev_get_priv(bus);
u32 val;
@ -279,7 +279,7 @@ static int uniphier_spi_xfer(struct udevice *dev, unsigned int bitlen,
static int uniphier_spi_set_speed(struct udevice *bus, uint speed)
{
struct uniphier_spi_plat *plat = bus->plat;
struct uniphier_spi_plat *plat = dev_get_plat(bus);
struct uniphier_spi_priv *priv = dev_get_priv(bus);
u32 val, ckdiv;
@ -364,7 +364,7 @@ static int uniphier_spi_set_mode(struct udevice *bus, uint mode)
static int uniphier_spi_of_to_plat(struct udevice *bus)
{
struct uniphier_spi_plat *plat = bus->plat;
struct uniphier_spi_plat *plat = dev_get_plat(bus);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);

View File

@ -100,7 +100,7 @@ struct zynq_qspi_priv {
static int zynq_qspi_of_to_plat(struct udevice *bus)
{
struct zynq_qspi_plat *plat = bus->plat;
struct zynq_qspi_plat *plat = dev_get_plat(bus);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);
@ -592,7 +592,7 @@ static int zynq_qspi_xfer(struct udevice *dev, unsigned int bitlen,
static int zynq_qspi_set_speed(struct udevice *bus, uint speed)
{
struct zynq_qspi_plat *plat = bus->plat;
struct zynq_qspi_plat *plat = dev_get_plat(bus);
struct zynq_qspi_priv *priv = dev_get_priv(bus);
struct zynq_qspi_regs *regs = priv->regs;
uint32_t confr;

View File

@ -75,7 +75,7 @@ struct zynq_spi_priv {
static int zynq_spi_of_to_plat(struct udevice *bus)
{
struct zynq_spi_plat *plat = bus->plat;
struct zynq_spi_plat *plat = dev_get_plat(bus);
const void *blob = gd->fdt_blob;
int node = dev_of_offset(bus);
@ -162,7 +162,7 @@ static int zynq_spi_probe(struct udevice *bus)
static void spi_cs_activate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
struct zynq_spi_plat *plat = bus->plat;
struct zynq_spi_plat *plat = dev_get_plat(bus);
struct zynq_spi_priv *priv = dev_get_priv(bus);
struct zynq_spi_regs *regs = priv->regs;
u32 cr;
@ -193,7 +193,7 @@ static void spi_cs_activate(struct udevice *dev)
static void spi_cs_deactivate(struct udevice *dev)
{
struct udevice *bus = dev->parent;
struct zynq_spi_plat *plat = bus->plat;
struct zynq_spi_plat *plat = dev_get_plat(bus);
struct zynq_spi_priv *priv = dev_get_priv(bus);
struct zynq_spi_regs *regs = priv->regs;
@ -296,7 +296,7 @@ static int zynq_spi_xfer(struct udevice *dev, unsigned int bitlen,
static int zynq_spi_set_speed(struct udevice *bus, uint speed)
{
struct zynq_spi_plat *plat = bus->plat;
struct zynq_spi_plat *plat = dev_get_plat(bus);
struct zynq_spi_priv *priv = dev_get_priv(bus);
struct zynq_spi_regs *regs = priv->regs;
uint32_t confr;

View File

@ -177,7 +177,7 @@ struct zynqmp_qspi_priv {
static int zynqmp_qspi_of_to_plat(struct udevice *bus)
{
struct zynqmp_qspi_plat *plat = bus->plat;
struct zynqmp_qspi_plat *plat = dev_get_plat(bus);
debug("%s\n", __func__);
@ -255,7 +255,7 @@ static void zynqmp_qspi_chipselect(struct zynqmp_qspi_priv *priv, int is_on)
void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval)
{
struct zynqmp_qspi_plat *plat = bus->plat;
struct zynqmp_qspi_plat *plat = dev_get_plat(bus);
struct zynqmp_qspi_priv *priv = dev_get_priv(bus);
struct zynqmp_qspi_regs *regs = priv->regs;
u32 tapdlybypass = 0, lpbkdlyadj = 0, datadlyadj = 0, clk_rate;
@ -295,7 +295,7 @@ void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval)
static int zynqmp_qspi_set_speed(struct udevice *bus, uint speed)
{
struct zynqmp_qspi_plat *plat = bus->plat;
struct zynqmp_qspi_plat *plat = dev_get_plat(bus);
struct zynqmp_qspi_priv *priv = dev_get_priv(bus);
struct zynqmp_qspi_regs *regs = priv->regs;
u32 confr;

View File

@ -64,7 +64,7 @@ struct atftmr_timer_plat {
static u64 atftmr_timer_get_count(struct udevice *dev)
{
struct atftmr_timer_plat *plat = dev->plat;
struct atftmr_timer_plat *plat = dev_get_plat(dev);
struct atftmr_timer_regs *const regs = plat->regs;
u32 val;
val = readl(&regs->t3_counter);
@ -73,7 +73,7 @@ static u64 atftmr_timer_get_count(struct udevice *dev)
static int atftmr_timer_probe(struct udevice *dev)
{
struct atftmr_timer_plat *plat = dev->plat;
struct atftmr_timer_plat *plat = dev_get_plat(dev);
struct atftmr_timer_regs *const regs = plat->regs;
u32 cr;
writel(0, &regs->t3_load);

View File

@ -34,7 +34,7 @@ struct altera_timer_plat {
static u64 altera_timer_get_count(struct udevice *dev)
{
struct altera_timer_plat *plat = dev->plat;
struct altera_timer_plat *plat = dev_get_plat(dev);
struct altera_timer_regs *const regs = plat->regs;
u32 val;
@ -49,7 +49,7 @@ static u64 altera_timer_get_count(struct udevice *dev)
static int altera_timer_probe(struct udevice *dev)
{
struct altera_timer_plat *plat = dev->plat;
struct altera_timer_plat *plat = dev_get_plat(dev);
struct altera_timer_regs *const regs = plat->regs;
writel(0, &regs->status);

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