Commit Graph

4060 Commits

Author SHA1 Message Date
Marek Vasut
0e06d63d19 ARM: imx: ddr: Add missing PHY reset
The iMX7D RM 9.2.4.9.3 Power removal flow Table 9-11. Re-enabling power
explicitly says both the DDR controller and the PHY must be reset in the
correct sequence. Currently the code only resets the controller. This
leads to a misbehavior where the system brings the DRAM up after reboot,
but the DRAM is unstable. Add the missing reset.

The easiest way to trigger this is by triggering WDT without having the
WDT assert WDOG_B signal, i.e. mw.w 0x30280000 0x25 .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-06-08 10:42:54 +02:00
Tom Rini
1b6ae82a5a Pull request for UEFI sub-system for efi-2020-07-rc4
This patch series addresses the following issues:
 
 * allow compiling with clang
 * add missing function descriptions to the HTML documentation
 * simplify the validation of UEFI images
 * validate load options in the UEFI boot manager
 
 In a preparatory patch a structure definition is moved.
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Merge tag 'efi-2020-07-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-07-rc4

This patch series addresses the following issues:

* allow compiling with clang
* add missing function descriptions to the HTML documentation
* simplify the validation of UEFI images
* validate load options in the UEFI boot manager

In a preparatory patch a structure definition is moved.
2020-06-03 14:10:03 -04:00
Heinrich Schuchardt
4f7dc5f608 efi_loader: allow compiling with clang
On ARM systems gd is stored in register r9 or x18. When compiling with
clang gd is defined as a macro calling function gd_ptr(). So we can not
make assignments to gd.

In the UEFI sub-system we need to save gd when leaving to UEFI binaries and
have to restore gd when reentering U-Boot.

Define a new function set_gd() for setting gd and use it in the UEFI
sub-system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tom Rini <trini@konsulko.com>
2020-06-03 17:19:17 +02:00
Masahiro Yamada
9f8aa0fbee ARM: add psci_arch_init() declaration for CONFIG_ARMV7_PSCI
arch/arm/include/asm/system.h declares psci_arch_init(), but it is
surrounded by #ifdef CONFIG_ARMV8_PSCI.

psci_arch_init() is called for CONFIG_ARMV7_PSCI too. Add the missing
function declaration.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-06-02 17:27:04 -04:00
Adam Ford
94ed66194f usb: ehci-omap: Add Support for DM_USB and OF_CONTROL
The omap3.dtsi file shows the usbhshost node with two sub-nodes
for ohci and ehci.  This patch file creates the usbhshost, and
pulls the portX-mode information.  It then locates the EHCI
sub-node, and initializes the EHCI controller with the info
pulled from the usbhshost node.

There is still more to do since there isn't an actual link
between the 'phys' reference and the corresponding phy driver,
and there is no nop-xceiv driver yet.

In the meantime, the older style reference to
CONFIG_OMAP_EHCI_PHYx_RESET_GPIO is still needed to pull
the phy out of reset until the phy driver is completed and the
phandle reference is made.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-22 15:22:35 +02:00
Tom Rini
b0b13f4114 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add DM_ETH support for lx2160aqds, ls2080aqds, ls1088aqds
- QSI related fixes on ls1012a, ls2080a, ls1046a, ls1088a, ls1043a based
  platforms
- Bug-fixes/updtaes related to ls1046afrwy, fsl-mc, msi-map property
2020-05-20 08:46:56 -04:00
Kuldeep Singh
c93ad777b8 treewide: Remove unused FSL QSPI config options for Layerscape platforms
Some of these options are not used by the driver anymore and some of
them are obsolete as the information is gathered from the dt. Also
consolidating defines in common headers.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19 09:22:05 +05:30
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f09f1ecbe7 Use __ASSEMBLY__ as the assembly macros
Some places use __ASSEMBLER__ instead which does not work since the
Makefile does not define it. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Simon Glass
90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
Simon Glass
c3dc39a2f8 arm: Don't include common.h in header files
It is bad practice to include common.h in other header files since it can
bring in any number of superfluous definitions. It implies that some C
files don't include it and thus may be missing CONFIG options that are set
up by that file. The C files should include these themselves.

Update some header files in arch/arm to drop this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 14:54:24 -04:00
Peng Fan
ed5b253d0e imx: imx8qm/qxp: check whether m4 partition booted
Add code to check m4 partition booted or not, we will use this
to runtime set device tree file that passed to Linux Kernel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
231401de2e imx: imx8qm/imx8qxp: Power down the resources before SPL jump to u-boot
Make sure that all devices that are powered up by SPL are powered down
before entering into the u-boot. Otherwise the subsystem/device will
never be powered down by SCFW, due to SPL and u-boot are in different
partitions.

Benefiting from power domain driver, this patch implements the function
"imx8_power_off_pd_devices" to power off all active devices.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Han Xu
214b7d534d cmd: nandbcb: Reconstruct the nandbcb tool for all platforms
The original nandbcb tool was designed for imx6 only, when trying to
leverage it to replace the kobs-ng tool, we found the design is not
friendly for supporting all platforms. To support all iMX6/7/8 platforms
and for easy further maintain, I reconstruct the structure of the tool.

The main changes including:

1. Use platform_data to determine the logic branches rather than simply
   use SOC name.
2. More data structures as parameter for functions.
3. Global variables to define the FCB/DBBT/FW locations.
4. Implement the kobs-ng default 4 FCB/4 DBBT/2 FW layout.
5. Support Hamming coding/ 40bit BCH/ 62bit BCH coding FCB.
6. Dump and compare all written FCB/DBBT to verify data integrity.

The tool has been verified on iMX6Q/DL, 6SX, 7D, 6ULL, iMX8QX, iMX8MM.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
8c0a1c6de8 imx8: power: Add PD device lookup interface to power domain uclass
Add power_domain_lookup_name interface to power domain uclass to find
a power domain device by its DTB node name, not using its associated
client device.

Through this interface, we can operate the power domain devices directly.
This is needed for non-DM drivers.

Modified from Ye's NXP downstream patch

only for legacy imx8 power domain driver, since we have not migrated
to use new power domain driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
39320e7256 mtd: nand: support GPMI NAND driver for i.MX8
enable the GPMI NAND driver for i.MX8, i.MX8 use similar controller as
i.MX8M

- register definition for i.mx8
- DMA structure must be 32bit address

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Han Xu
17282f45ab mtd: mxs_nand: fix the gf_13/14 definition issue
gf_13/14 mask was not set correctly in register definition.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
ff99041b3b mxs_nand: Add support for i.MX8M
Update the gpmi/apbh_dma/bch drivers and relevant registers for i.MX8M.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
29f40c07e7 nand: mxs: correct bitflip for erased NAND page
This patch is a porting of
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/
commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38
"
i.MX6QP and i.MX7D BCH module integrated a new feature to detect the
bitflip number for erased NAND page. So for these two platform, set the
erase threshold to gf/2 and if bitflip detected, GPMI driver will
correct the data to all 0xFF.

Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q
with the one for i.MX6QP.
"

In this patch, i.MX6UL is added and threshold changed to use ecc_strength.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
ef56281cf3 imx: regs: add more fuse bank structure
Add more fuse bank structure for use.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Ye Li
9d4194f179 fec: Move imx_get_mac_from_fuse declare to imx file
imx_get_mac_from_fuse is used to load MAC address from fuse. On imx8mp,
we have two different ENET controllers and both need to call this
function. So decouple its declare from fec driver.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 20:55:20 +02:00
Peng Fan
3c42c0f673 imx: add module fuse support
There are different parts from one SoC. Take i.MX6ULL for example,
some part might not have ENET, some might have; some might not have
USB, some might have. The information could be got from OCOTP,
to make one image support the different parts, we need runtime
disable linux kernel dts node and uboot driver probe if the
corresponding module not exists in the part.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10 13:21:13 +02:00
Stefano Babic
b77d0292ca Merge branch 'master' of git://git.denx.de/u-boot 2020-05-10 13:03:56 +02:00
Tom Rini
143414c03f i.MX for 2020.07
----------------
 
 - imxrt: fix LCD clock, fix doc
 - new board: Coral Dev
 - imx8: enable Cache in SPL. SNVS, update SCFW API
 - imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
 - MX6ULL : is_imx6ull to include i.MX6ULZ
 - Net: add config to enable TXC delay
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
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Merge tag 'u-boot-imx-20200502' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2020.07
----------------

- imxrt: fix LCD clock, fix doc
- new board: Coral Dev
- imx8: enable Cache in SPL. SNVS, update SCFW API
- imx8MM: fix reset, 8MQ quand and QuadLite, CPU speed grading
- MX6ULL : is_imx6ull to include i.MX6ULZ
- Net: add config to enable TXC delay

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/682033914
2020-05-04 09:29:42 -04:00
Frank Li
8142a97d54 cpu: imx8: show RevC instead of Rev? at boot log
Add REVC informaiton.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-03 15:45:49 +02:00
Patrick Delaunay
2e8d68e241 arm: caches: add DCACHE_DEFAULT_OPTION
Add the new flags DCACHE_DEFAULT_OPTION to define the default
option to use according the compilation flags
CONFIG_SYS_ARM_CACHE_*.

This new compilation flag allows to simplify dram_bank_mmu_setup()
and can be used as third parameter (option=dcache option to select)
of mmu_set_region_dcache_behaviour function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-01 11:34:01 -04:00
Patrick Delaunay
f8dc7f2f18 configs: migrate CONFIG_SYS_ARM_CACHE_* in Kconfig
Move CONFIG_SYS_ARM_CACHE_WRITETHROUGH and
CONFIG_SYS_ARM_CACHE_WRITEALLOC into Kconfig done by moveconfig.py.

Kconfig uses a choice between the 3 values supported in U-Boot,
including the new configuration CONFIG_SYS_ARM_CACHE_WRITEBACK
(the default configuration).

The patch also avoids to select simultaneously 2 configurations.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-05-01 11:34:01 -04:00
Franck LENORMAND
242d1cd69b imx8: Configure SNVS
Add a module to configure the tamper and secure violation of
the SNVS using the SCU API.

The module also adds some commands:
 - snvs_cfg: Configure the SNVS HP and LP registers
 - snvs_dgo_cfg: Configure the SNVS DGO bloc if present (8QXP)
 - tamper_pin_cfg: Change the configuration of the tamper pins
 - snvs_clear_status: Allow to write to LPSR and LPTDSR to clear
   status bits

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Ye Li
73d769d8af imx8: Update SCFW API to version 1.5
Sync the latest SCFW API with below commit
6dcd0242ae7a53ac ("SCF-105: Revert accidental change") to add
interfaces for PM resource reset and read/write SNVS security
violation and tamper DGO registers.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Breno Lima
f959594db2 imx8: scu api: Add support for SECO manufacturing protection APIs
SECO provides APIs to support CAAM manufacturing protection:

- sc_seco_get_mp_key()
- sc_seco_get_mp_sign()
- sc_seco_update_mpmr()

Add SCFW APIs support.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Ye Li
1c97fcda7f imx8mm: clock: fix fracpll decode issue
The fracpll decoding is using the bit definitions for int pll. Most of
them are same, but the CLKE bit is different. Fix the wrong CLKE_MASK
for fracpll and correct all bit definitions in fracpll decoding.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:22 +02:00
Peng Fan
712a341c76 imx8mq: Set ARM core clock directly from ARM PLL
For ARM core clock, there are two input branches, and can select via mux:
one from ARM PLL directly, second from CCM A53 clock root.

Currently we are using second branch. But IC confirmed the CCM A53 root
signoff timing is 1Ghz, so we should switch to input from ARM PLL directly.

This patch fixes the CORE SEL slice configuration and switch ARM clock
to ARM PLL.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
6b87b3f4dc imx8m: update clock root and fix core_sel
Update clock root table to let it be easy to configure clock at
very early stage. Also the core_sel mux parent should be A53 CLK
root and ARM PLL.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
9b4e197d4b imx: update is_imx6ull to include i.MX6ULZ
Update is_imx6ull helper to include i.MX6ULZ SoC. i.MX6ULZ could
share same macro, then we no need to add is_imx6ulz in various drivers.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
c915403218 imx: imx8m: add i.MX8MN variants support
Add i.MX8MN variants support

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
cb1a1de6a0 imx: imx8m: add i.MX8MQ Dual and QuadLite support
Add i.MX8MQ Dual and QuadLite variants.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Peng Fan
499c94975e imx: fix cpu_type helper
i.MX8MP use 0x182 as its ID, so 0xff is not valid to get the cpu type,
extend it to 0x1ff.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-01 13:46:21 +02:00
Tom Rini
b9da77f195 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add DM_ETH support for DPAA1, DPAA2 based RDB platforms: ls1046ardb,
  ls1043ardb, lx2160ardb, ls2088ardb, ls1088ardb.
- Add GICv3 support for ls1028a, ls2088a, ls1088a.
- Add lpuart support on ls1028aqds.
- Few bug fixes and updates on ls2088a, ls1012a, ls1046a, ls1021a based
  platforms.
2020-04-30 10:06:54 -04:00
Tom Rini
306881a0bf Convert CONFIG_PHYLIB et al to Kconfig
This converts the following to Kconfig:
   CONFIG_PHYLIB
   CONFIG_BITBANGMII
   CONFIG_MV88E6352_SWITCH
   CONFIG_MV88E61XX_SWITCH
   CONFIG_PHYLIB_10G
   CONFIG_PHY_AQUANTIA
   CONFIG_PHY_ATHEROS
   CONFIG_PHY_BROADCOM
   CONFIG_PHY_CORTINA
   CONFIG_PHY_DAVICOM
   CONFIG_PHY_ET1011C
   CONFIG_PHY_LXT
   CONFIG_PHY_MARVELL
   CONFIG_PHY_MICREL
   CONFIG_PHY_NATSEMI
   CONFIG_PHY_REALTEK
   CONFIG_RTL8211X_PHY_FORCE_MASTER
   CONFIG_PHY_SMSC
   CONFIG_PHY_TERANETICS
   CONFIG_PHY_TI
   CONFIG_PHY_VITESSE
   CONFIG_PHY_XILINX

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 15:57:58 -04:00
Hou Zhiqiang
f40b120e93 fsl-layerscape: Move GIC RD tables init to soc.c
Move GIC redistributor tables initialization to CPU setup function.

This patch introduces a GIC redistributor tables init function, and
moves the function of reserving memory for GIC redistributor tables
to soc.c and adds a argument for the memory size to reserve, BTW
rename the function so that it is more readable.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-28 17:46:46 +05:30
Amit Singh Tomar
8b520ac153 clk: actions: Add common clock driver
This patch converts S900 clock driver to something common that can
be used for other SoCs, for instance S700(few of clk registers are same).

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Ovidiu Panait
6184858b85 arm: asm/cache.c: Introduce arm_reserve_mmu
As a preparation for turning reserve_mmu into an arch-specific variant,
introduce arm_reserve_mmu on ARM. It implements the default routine for
reserving memory for MMU TLB and needs to be weakly defined in order to allow
for machines to override it.

Without this decoupling, after introducing arch_reserve_mmu, there would be two
weak definitions for it, one in common/board_f.c and one in
arch/arm/lib/cache.c.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 15:17:14 -04:00
Tom Rini
bdcb29960e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Backplane support and bug fixes
2020-04-21 15:20:42 -04:00
Tom Rini
e4837da782 - enable DM_RNG on meson boards
- fix SMBIOS info on Odroid-C2
 - Fix video output on GXBB/GXL/GXM boards
 - add USB gadget support for GXL/GXM boards
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Merge tag 'u-boot-amlogic-20200420' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- enable DM_RNG on meson boards
- fix SMBIOS info on Odroid-C2
- Fix video output on GXBB/GXL/GXM boards
- add USB gadget support for GXL/GXM boards
2020-04-20 13:44:27 -04:00
Neil Armstrong
838c0af9d2 phy: meson-gxl-usb: add set_mode call to force switch to peripheral mode
Add set_mode function in the Amlogic GXL PHYs that will be called by
the arch code to switch PHYs from/to gadget mode.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Yinbo Zhu
316fc6ff76 armv8: ls1028a: define esdhc_status_fixup
This patch is to define esdhc_status_fixup function for ls1028a to disable
SDHC1/SDHC2 status in device tree node if not selected.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-20 13:35:11 +05:30
Giulio Benetti
aa045701c2 video: mxsfb: add support for i.MXRT
Add support for i.MXRT by adding CONFIG_IMXRT in register structure and
adding .compatible = "fsl,imxrt-lcdif".

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Bernhard Messerklinger
7794d889d3 arm: imx6: configure NoC on i.MX6DQP
The i.MX6DP and i.MX6QP incorporate NoC interconnect logic
which needs to be configured in order to use external DDR memory.

This patch enables the SPL to configure the necessary registers
in accordance with the NXP engineering bulletin EB828.

Co-developed-by: Filip Brozović <fbrozovic@gmail.com>

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2020-04-17 18:56:19 +02:00