mtd: mxs_nand: fix the gf_13/14 definition issue

gf_13/14 mask was not set correctly in register definition.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Han Xu 2020-05-04 22:08:58 +08:00 committed by Stefano Babic
parent 9fdb5f0a0c
commit 17282f45ab
3 changed files with 7 additions and 4 deletions

View File

@ -151,9 +151,9 @@ struct mxs_bch_regs {
#define BCH_FLASHLAYOUT0_ECC0_ECC28 (0xe << 12)
#define BCH_FLASHLAYOUT0_ECC0_ECC30 (0xf << 12)
#define BCH_FLASHLAYOUT0_ECC0_ECC32 (0x10 << 12)
#define BCH_FLASHLAYOUT0_GF13_0_GF14_1 (1 << 10)
#define BCH_FLASHLAYOUT0_GF13_0_GF14_1_MASK BIT(10)
#define BCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET 10
#define BCH_FLASHLAYOUT0_DATA0_SIZE_MASK 0xfff
#define BCH_FLASHLAYOUT0_DATA0_SIZE_MASK 0x3ff
#define BCH_FLASHLAYOUT0_DATA0_SIZE_OFFSET 0
#define BCH_FLASHLAYOUT1_PAGE_SIZE_MASK (0xffff << 16)
@ -182,9 +182,9 @@ struct mxs_bch_regs {
#define BCH_FLASHLAYOUT1_ECCN_ECC28 (0xe << 12)
#define BCH_FLASHLAYOUT1_ECCN_ECC30 (0xf << 12)
#define BCH_FLASHLAYOUT1_ECCN_ECC32 (0x10 << 12)
#define BCH_FLASHLAYOUT1_GF13_0_GF14_1 (1 << 10)
#define BCH_FLASHLAYOUT1_GF13_0_GF14_1_MASK BIT(10)
#define BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET 10
#define BCH_FLASHLAYOUT1_DATAN_SIZE_MASK 0xfff
#define BCH_FLASHLAYOUT1_DATAN_SIZE_MASK 0x3ff
#define BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET 0
#define BCH_DEBUG0_RSVD1_MASK (0x1f << 27)

View File

@ -1474,6 +1474,8 @@ void mxs_nand_get_layout(struct mtd_info *mtd, struct mxs_nand_layout *l)
BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET);
l->eccn = (tmp & BCH_FLASHLAYOUT1_ECCN_MASK) >>
BCH_FLASHLAYOUT1_ECCN_OFFSET;
l->gf_len = (tmp & BCH_FLASHLAYOUT1_GF13_0_GF14_1_MASK) >>
BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET;
}
/*

View File

@ -88,6 +88,7 @@ struct mxs_nand_layout {
u32 ecc0;
u32 datan_size;
u32 eccn;
u32 gf_len;
};
int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info);