Commit Graph

60937 Commits

Author SHA1 Message Date
Tom Rini
15147dc6a9 Merge branch '2019-10-24-ti-imports'
- Enable DFU on dra7xx boards
- Further Keystone 3 platform improvements
2019-10-25 17:33:28 -04:00
Suman Anna
d0e134b909 arm: dts: k3-am65: Add R5F ranges in interconnect nodes
Add the address spaces for the R5F cores in MCU domain to the ranges
property of the cbass_mcu interconnect node so that the addresses
within the R5F nodes can be translated properly by the relevant OF
address API.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
22b548044b armv7R: K3: j721e: Add support for triggering ddr init from SPL
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
ec2fa9f76e arm: dts: k3-j721e: Add ddr node
Use the 3733MTs DDR configuration that is auto generated from
DDR_Regconfig tool.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
2019-10-25 17:33:21 -04:00
Kevin Scholz
3bb3f266ee ram: k3-j721e: Add support for J721E DDR controller
The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper
logic to integrate these blocks in the device. The DDR subsystem is
used to provide an interface to external SDRAM devices which can be
utilized for storing program or data. Introduce support for the
DDR controller and DDR phy within the DDR subsystem.

Signed-off-by: Kevin Scholz <k-scholz@ti.com
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
ffb6b8e540 dt-bindings: memory-controller: Introduce J721E DDRSS bindings
Add DT binding documentation for DDR sub system present on J721E device.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
James Doublesin
34f27b2e86 ram: k3-am654: Do not rely on default values for certain DDR register
Added the following registers to the DDR configuration:
- ACIOCR0,
- ACIOCR3,
- V2H_CTL_REG,
- DX8SLxDQSCTL.

Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
bit fields for pullup and pulldown registers (to preserve slew rate and
other bits in that same register). Also update the dts files in the same
patch to maintain git bisectability.

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
James Doublesin
c78ac7a0c9 ram: k3-am654: add support for LPDDR4 and DDR3L DDRs
Added training support for LPDDR4 and DDR3L DDRs.  Also added/changed
some register configuration to support all 3 DDR types

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
James Doublesin
d5e08fd204 armv7r: dts: am654-base-board: Rename 1600MHz to 1600MTs in dtsi filename
The current configuration of DDR on AM654 base board is for 1600MTs but
the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi.
Since 1600MHz is misleading, rename it to
k3-am654-base-board-ddr4-1600MTs.dtsi

Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
e938b22521 arm: K3: Clean and invalidate Linux Image before jumping to Linux
U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux
by set/way in cleanup_before_linux(). Additionally there is a custom
hook provided to clean and invalidate L3 cache.

Unfortunately on K3 devices(having a coherent architecture), there is no
easy way to quickly clean all the cache lines for L3. The entire address
range needs to be cleaned and invalidated by Virtual Address. This can
be implemented using the L3 custom hook but it take lot of time to clean
the entire address range. In the interest of boot time this might not be
a viable solution.

The best hit is to make sure the loaded Linux image is flushed so that
the entire image is written to DDR from L3. When Linux starts running with
caches disabled the full image is available from DDR.

Reported-by: Andrew F. Davis <afd@ti.com>
Reported-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
683cdd6837 cmd: booti: Store OS start and end info in images structure
Store the start and end of the OS image that is loaded in images
structure.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Lokesh Vutla
899a9de3e4 boot: arm: Enable support for custom board_prep_linux
Once the arch specific boot_prepare_linux completes, boards wants to
have a custom preparation for linux. Add support for a custom
board_prep_linux.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25 17:33:21 -04:00
Faiz Abbas
18df182b63 configs: dra7xx_evm: Increase the size of SPL_MULTI_DTB_FIT
Expand SPL_MULTI_DTB_FIT to accommodate usb peripheral nodes being
added to support SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-25 17:33:21 -04:00
Faiz Abbas
add2242c49 configs: dra7xx_evm: Add Kconfigs for SPL_DFU bootmode
Enable configs for supporting SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-25 17:33:21 -04:00
Faiz Abbas
6b23f53b08 ARM: dts: dra7: Add usb peripheral nodes in spl
Add usb peripheral and usb phy nodes in spl to enable SPL_DFU bootmode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-10-25 17:33:21 -04:00
Tom Rini
271103ac0b Merge branch 'master' of git://git.denx.de/u-boot-usb
- DWC3 improvements
- i.MX7 EHCI bugfix
2019-10-25 13:50:51 -04:00
Tom Rini
c9e50bb12a Second set of u-boot-atmel features and fixes for 2020.01 cycle
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJdspnqAAoJEB6zHgIOrC/Ixi4IAJEEiCZPu6Z3fbkFX/Um7vCX
 eMTltJN8nz4oiSi3xdx3ejueqWdW3F8VuCkHb0j0bVAhMlUlVgwCzfd0cD+D2iwS
 jkrgzASNAr+JeYKYEdWqqfaUxOCd2qfuBu9EXlpvKQLWLt+KRfsOsHWcgR4bf095
 aGCihvd/fKhKYUvbf5cEQnsWa3UwtsKk4Web5MKjxXx3p0iVNlu4KLd/vDWfTios
 X1NqiO5ZjXNrDxyG6Aj8lgDXlE5kfeKaN/aCJU1/0U2cXm8JRu2w2dv1P/e/kU+j
 NHIGzICAG4Lk/4gQTeuohJxLyvj7K3i1H12ik9Qeh4H1/5fsyybyltGUo7H443s=
 =JYe3
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-atmel-2020.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

Second set of u-boot-atmel features and fixes for 2020.01 cycle

This feature set includes Eugen's work on a new tiny flexcom driver and
eeprom mac retrieval for the sam9x60-ek board.
2019-10-25 13:50:33 -04:00
Tom Rini
e382713d22 Xilinx/FPGA changes for v2020.01 part 2
common:
 - Fix manual relocation for repeatable commands
 
 arm:
 - Also clean up generated dtbos
 
 microblaze:
 - Add support for Manual relocation in crypto framework
 - Tune and align architecture bootm support
 
 zynq:
 - DT sync ups
 - Some defconfig updates
 - Remove empty board_early_init_f()
 
 zynqmp:
 - Clean firmware handing via drivers/firmware/
 - DT/defconfig name alignments
 - DT cleanups with using firmware based clock driver
 - Some defconfig updates
 - Add IIO ina226 DT description
 - Tune zynqmp_psu_init_minimalize.sh script
 - Add single nand mini configuration, e-a2197, m-a2197-02/03 and zcu216
 
 versal:
 - Clean firmware handing via drivers/firmware/
 - Add gpio support
 - Enable DT overlay/USB/CLK/FPGA
 - DT updates
 - Tune mini configuration
 
 spi:
 - gqspi - Remove unused headers
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXbKa4QAKCRDKSWXLKUoM
 ISzJAJ0YpGS7HziGFVRBlcsyRH8QlWCqOQCfb0jIWzhL8pvj9TA01CdU0Axdbwk=
 =GIpp
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2020.01-part2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.01 part 2

common:
- Fix manual relocation for repeatable commands

arm:
- Also clean up generated dtbos

microblaze:
- Add support for Manual relocation in crypto framework
- Tune and align architecture bootm support

zynq:
- DT sync ups
- Some defconfig updates
- Remove empty board_early_init_f()

zynqmp:
- Clean firmware handing via drivers/firmware/
- DT/defconfig name alignments
- DT cleanups with using firmware based clock driver
- Some defconfig updates
- Add IIO ina226 DT description
- Tune zynqmp_psu_init_minimalize.sh script
- Add single nand mini configuration, e-a2197, m-a2197-02/03 and zcu216

versal:
- Clean firmware handing via drivers/firmware/
- Add gpio support
- Enable DT overlay/USB/CLK/FPGA
- DT updates
- Tune mini configuration

spi:
- gqspi - Remove unused headers
2019-10-25 11:23:46 -04:00
Tom Rini
17fd9915a4 Merge branch '2019-10-24-UFS-support'
- Add Universal Flash Storage (UFS) support
2019-10-24 09:51:48 -04:00
Ye Li
235f5e158e ehci-mx6: Update EHCI driver to support OTG0 on i.MX7ULP
The ULP has two USB controllers. These two controllers have similar NC
registers layout as i.MX7D. But OTG0 uses UTMI PHY simliar as i.MX6, not
the integrated PHY on i.MX7D. The OTG1 needs off-chip HSIC PHY or ULPI PHY
to work.

This patch only supports OTG0 with UTMI PHY.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-10-24 15:31:13 +02:00
Igor Opaniuk
1198a104d3 usb: ehci-mx6: Fix bus enumeration for iMX7 SoCs
This fixes the issues with calculation of controller indexes in
ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
placed next to each other, and their addresses incremented by 0x10000.

Example of USB nodes for iMX7S/D:

usbotg1: usb@30b10000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b10000 0x200>;
           ^^^^^^^^^^
....
usbotg2: usb@30b20000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b20000 0x200>;
           ^^^^^^^^^^
....

usbh: usb@30b30000 {
    compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
    reg = <0x30b30000 0x200>;
           ^^^^^^^^^^
....

Which was leading to usb enumeration issues:
Colibri iMX7 # usb start
starting USB...
Bus usb@30b10000: USB EHCI 1.00
Bus usb@30b20000: probe failed, error -22
scanning bus usb@30b10000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Fixes: 501547cec1("usb: ehci-mx6: Fix bus enumeration for DM case")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-10-24 15:31:13 +02:00
Michal Simek
3ad95ed6f8 microblaze: Fix tab indentation in start.S
Use tab instead of spaces.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
6f94daf915 common: command: Fix manual relocation for repeatable command
All platforms which are using MANUAL_RELOC are jumping back to origin
location when repeatable command is called. The reason is that cmd_rep link
is not updated properly. Issue can be reproduced by rewriting origin
U-Boot location through (for example) file download by tftp command.

Fixes: 80a48dd47e ("common: command: Rework the 'cmd is repeatable' logic")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
f3035cf299 microblaze: Unify Linux bootm process
Record two bootstages and add "Starting kernel" message to have standard
handoff message between U-Boot and OS.
Also use debug() instead of #ifdef DEBUG to clean the code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
4ab8d63282 microblaze: Fix FDT message in boot_prep_linux()
There is no need to show FDT message in regular flow that's why switch it
to debug level.

Fixes: 0905046050 ("microblaze: Switch to generic bootm implementation")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
6bf27ed9ae arm64: zynqmp: Add support for e-a2197-00 System Controller
Add support for System Controller available on e-a2197-00 base board.
System is very similar to p-a2197-00 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
19096aba4f arm64: zynqmp: Enables SPI_FLASH_BAR
Enable the SPI flash Bank/Extended address register support for all ZynqMP
boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
7e856eff20 ARM: zynq: Disable fdt and evn exist for cse_qspi
Mini u-boot should be really small that's why it is necessary to disable
all unneeded configs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
3e5476c6cd ARM: zynq: Remove unused board_early_init_f()
board_early_init_f added by commit e6cc3b25d7
("arm: zynq: Wire watchdog internals") is no longer needed that's why
remove it also with Kconfig enabling.

Fixes: ccd063e981 ("watchdog: Move watchdog_dev to data section (BSS may not be cleared)")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
2ce5641df0 ARM: zynq: Dont use 4K sector size support for mini qspi configuration
This patch removes 4K sector size support for Zynq mini qspi configuration
in favour of fast erase speed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Siva Durga Prasad Paladugu
542ff688ed arm64: zynqmp: Dont use 4K sector size support for mini qspi configuration
This patch removes 4K sector size support for ZynqMP mini qspi
configuration in favour of fast erase speed.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Siva Durga Prasad Paladugu
6452fb36a4 arm64: zynqmp: Enable Micrel phy support for xilinx zc1275 revB
This patch enables Micrel phy support for Xilinx ZynqMP zc1275
revB board.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
9a133f6fae arm64: versal: Enable BDI for mini mtest configuration
bdi is useful to see how memory is mapped.
Also enable 3 memory banks to be mapped.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
dd7a3291cc arm64: zynqmp: Add support for zcu216
zcu104/6 defconfig was used as source. Standard features are enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
3d5c9060c5 arm64: zynqmp: Add support for m-a2197-03
It is based on m-a2197-01 with some changes in i2c intrastructure.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
137c4aef0c arm64: zynqmp: Add support for m-a2197-02
It is based on m-a2197-01 with some changes in i2c intrastructure.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
2038e46f48 arm64: zynqmp: List lpd watchdog in dtsi
There are use cases where lpd watchdog can be configured for APU use. By
design this IP should be listed in zynqmp.dtsi to make sure that node is
properly enabled by DTG.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
332996ce18 arm64: zynqmp: Use power header in zynqmp.dtsi
Use power header and add power-domains property.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:03 +02:00
Michal Simek
b07e97b4ba arm64: zynqmp: Use reset header in zynqmp.dtsi
Wire reset-controller and use macros from reset header.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
Michal Simek
0435a82f32 dt-bindings: arm64: zynqmp: Add power and reset headers
Add power and reset headers to be sources by ZynqMP dtses.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
Michal Simek
dead6f67c7 arm64: zynqmp: Use backward compatible string for gem
Add backward compatible string for gem ("cdns,gem").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
Michal Simek
039c740d66 arm64: zynqmp: Switch to xlnx-zynqmp-clk header
Use prepared header instead of hardcoded values.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
Rajan Vaja
bdc27185bc dt-bindings: clock: zynqmp: Add clk header
Add dt clock header which can be included by dtses. And also use zynqmp-clk
compatible string.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
Naga Sureshkumar Relli
c3a34b8006 arm64: zynqmp: Update nand device tree node properties
This patch updates the nand device tree node properties as per
updated driver.

Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
Michal Simek
631ed92a30 arm64: zynqmp: Fix DT style for ipi mailbox
Remove additional empty space.

Fixes: 95497afada ("arm64: zynqmp: add firmware and mailbox node to DT")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
T Karthik Reddy
bf60910025 zynqmp: configs: Add single nand flash mini u-boot configuration
This patch adds configuration for single nand flash mini u-boot.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
T Karthik Reddy
1ed8c13730 common: image-sig.c: Add manual relocation
This patch adds manual relocation for struct checksum_algo & struct
crypto_algo structures.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
T Karthik Reddy
ef92ed26a5 drivers: crypto: rsa_mod_exp: Add manual relocation for ops->mod_exp()
This patch adds manual relocation for Modular Exponentiation if
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
T Karthik Reddy
10088fb037 common: hash: Manually relocate struct hash_algo
This patch adds manual relocation for struct hash_algo if
CONFIG_NEEDS_MANUAL_RELOC is enabled.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
Michal Simek
62e3fb027b ARM: dt: Also clean dtbo files
dtbo files can be also generated that's why also clean them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00