Commit Graph

70788 Commits

Author SHA1 Message Date
David Wu
1231184caa net: eth-uclass: Change uclass driver name to ethernet
dev_read_alias_seq() used uc_drv->name compared to alias
stem string, Ethernet's alias stem uses "ethernet", which
does not match the eth-uclass driver name "eth", can not
get the correct index of ethernet alias namer. So it seems
change uclass driver name to match the alias stem is a more
reasonable way.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-19 09:15:02 -05:00
Marek Vasut
6f1e668d96 net: dwc_eth_qos: Pad descriptors to cacheline size
The DWMAC4 IP has the possibility to skip up to 7 AXI bus width size words
after the descriptor. Use this to pad the descriptors to cacheline size and
remove the need for noncached memory altogether. Moreover, this lets Tegra
use the generic cache flush / invalidate operations.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-01-19 09:15:02 -05:00
Marek Vasut
dd70ff4815 net: ks8851: Reset internal RXFC count on bad packet
A sporadic condition occurs when the "bad packet" error is triggered
repeatedly, which results in "bad packet" messages scrolling on the
console during transfer. To avoid triggering this, reset the internal
RXFC count on the first occurance of the "bad packet", which forces
the code to re-read the RX packet count from the MAC, and prevents
any additional "bad packet" messages if there are no more packets in
the MAC. Also print better debug information if this condition occurs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Tom Rini <trini@konsulko.com>
2021-01-19 09:15:02 -05:00
Matthias Brugger
ea707dc0aa net: Use NDRNG device in srand_mac()
When calling srand_mac we use a weak seed dependent on the
mac address. If present, use a RNG device instead to incerase entropy.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
2021-01-19 09:15:02 -05:00
Matthias Brugger
92fdad28cf lib: uuid: use RNG device if present
When calculating a random UUID we use a weak seed.
Use a RNG device if present to increase entropy.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
2021-01-19 09:15:02 -05:00
Hongwei Zhang
0be3d1fafb net: ftgmac100: Read and retain MAC address
Read and retain MAC address across flash and QEMU support.

Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
2021-01-19 09:15:02 -05:00
Jorge Ramirez-Ortiz
c1ab738145 net: eth_legacy - fix build CMD_PCAP
Fix typo which would cause a build error.

Fixes: 3eaac6307d ("net: introduce packet capture support")

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
2021-01-19 09:15:02 -05:00
Harm Berntsen
beb61e13b8 net: tftp: Fix incorrect tftp_next_ack on no OACK
When the tftp server did not send any OACK, the tftp_next_ack variable
was not set to the correct value . As the server was transmitting
blocks we generated a lot of 'Received unexpected block: $n, expected
$n+1' error messages. Depending on the timeout setting the transfer
could still complete though.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Ramon Fried <rfried.dev@gmail.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2021-01-19 09:15:02 -05:00
David Rivshin
51723c5581 net: Do not respond to ICMP_ECHO_REQUEST if we do not have an IP address
While doing DHCP the interface IP is set to 0.0.0.0. This causes the
check in net.c on dst_ip to be effectively skipped, and all IP datagrams
are accepted up the IP stack. In the case of an ICMP_ECHO_REQUEST for the
matching MAC address (regardless of destination IP), the result is that
an ICMP_ECHO_REPLY is sent. The source address of the ICMP_ECHO_REPLY is
0.0.0.0, which is an illegal source address.

This can happen in common practice with the following sequence:
DHCP (U-Boot or OS) acquires IP address 10.0.0.1
System reboots
U-Boot starts DHCP and send DHCP DISCOVER
DHCP server decides to OFFER 10.0.0.1 again
  (perhaps because of existing lease or manual configuration)
DHCP server tries to PING 10.0.0.1 to see if anyone is squatting on it
DHCP server still has our MAC address in its ARP table for 10.0.0.1
U-Boot receives PING, and responds with an illegal source address
This may further result in a the DHCP server seeing the response as
  confirmation that someone is squatting on 10.0.0.1, and picking a
  new IP address from the pool to try again

Signed-off-by: David Rivshin <drivshin@allworx.com>
2021-01-19 09:15:02 -05:00
Ian Ray
3f8905ade2 net: e1000: implement eth_write_hwaddr for DM_ETH
Implement programming MAC address to the hardware also for device model
configuration.

Fixes: b565b18a29 ("board: ge: bx50v3: Enable DM for PCI and ethernet")
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-01-19 09:15:01 -05:00
Matthias Schiffer
fa795f4525 net: eth-uclass: avoid running start() twice without stop()
Running the start() handler twice without a stop() inbetween completely
breaks communication for some ethernet drivers like fec_mxc.

eth_halt() is called before each eth_init(). Due to the switch to
eth_is_active() in commit 68acb51f44 ("net: Only call halt on a driver
that has been init'ed"), this is not sufficient anymore when netconsole
is active: eth_init_state_only()/eth_halt_state_only() manipulate the
state check that is performed by eth_is_active() without actually
calling into the driver.

The issue can be triggered by starting a network operation (e.g. ping or
tftp) while netconsole is active.

Add an additional "running" flag that reflects the actual state of the
driver and use it to ensure that eth_halt() actually stops the device as
it is supposed to.

Fixes: 68acb51f44 ("net: Only call halt on a driver that has been init'ed")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-01-19 09:06:15 -05:00
Tom Rini
db0dd72e27 Merge branch '2021-01-18-assorted-platform-updates'
- Assorted MediaTek, AST2x00 updates
- Assorted driver fixes for various platforms
- Keymile platform updates
- Add pwm command, mp5416 pmic driver
2021-01-19 07:56:59 -05:00
Claudiu Beznea
36dfddc553 net: phy: micrel: fix typo
Fix typo.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-19 10:11:14 +02:00
Claudiu Beznea
c6df0e2ffd net: phy: micrel: add support for DLL setup on ksz9131
Add support for DLL setup on KSZ9131.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-19 10:11:14 +02:00
Weijie Gao
ac7a51c0e4 dts: mt7622: use accurate clock source fot mtk_timer
The input system clock for mt7622 timer is 10MHz and can be retrieved
through the clk driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-18 15:23:06 -05:00
Weijie Gao
63779b2407 timer: mtk_timer: initialize the timer before use
The timer being used by this driver may have already been used by first
stage bootloader (e.g. ATF/preloader), and it's settings may differ from
what this driver is going to use.

This may cause issues, such as inaccurate timer frequency due to
incorrect clock divider.

This patch adds the initialization code to avoid them.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-18 15:23:06 -05:00
Heinrich Schuchardt
97bf73762f pinctrl: mediatek: correct error handling
If no GPIO controller is found, the return value should not depend on a
random value on the stack. Initialize variable ret.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2021-01-18 15:23:06 -05:00
Heinrich Schuchardt
c65b7d1acf mtd: remove drivers/mtd/mw_eeprom.c
drivers/mtd/mw_eeprom.c contains code that never worked. mw_eeprom_write()
and mw_eeprom_read() have incorrect loop conditions:

	while (len <= 2) {

CONFIG_MW_EEPROM is not set anywhere. So let's simply drop the module.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-18 15:23:06 -05:00
Heinrich Schuchardt
80b1ef942d drivers: qe: avoid double free()
Avoid calling free(addr) twice if the device for ucode is not found.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-18 15:23:06 -05:00
Heinrich Schuchardt
f11b38e3ae mmc: fsl_esdhc_spl: remove superfluous free()
Freeing a buffer before calling hang() is superfluous. Removing the call
reduces the SPL size.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-18 15:23:06 -05:00
Andrey Zhizhikin
1396e41c1f doc: board: freescale: advise to use newer atf and firmware
Update branch and version information of ATF and DDR firmware files to
point to latest releases provided by NXP.

This is especially critical for imx8mp evk, as the ATF support for that
SoC is only available in latest releases.

Align all SoCs from imx8m family to use identical revisions of ATF and
DDR firmware.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-01-18 15:23:06 -05:00
Heinrich Schuchardt
4908067b8f dma: bcm6348: incorrect buffer allocation
Calling calloc() for 0 members does not make any sense.
Setting ch_priv->busy_desc = NULL for ch_priv->desc_cnt > 0 is equally
unreasonable.

The current code will lead to a NULL dereference in bcm6348_iudma_enable().

The assignments for ch_priv->busy_desc are obviously swapped.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-18 15:23:06 -05:00
Pragnesh Patel
9e9a530a61 cmd: Add a pwm command
Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-18 15:23:06 -05:00
Tim Harvey
2767d881f0 power: pmic: add driver for Monolithic Power mp5416
This adds basic register access and child regulator binding
for the Monolithic MP5416 Power Management IC which integrates
four DC/DC switching converters and five LDO regulators.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
ccdb58dc0a configs: aspeed: Add defconfig for AST2600 EVB
Add the default configuration for the AST2600 EVB.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
4a84cf06aa aspeed: Add AST2600 platform support
Add low level platform initialization for the AST2600 SoC.
The 2-stage booting with U-Boot SPL are leveraged to support
different booting mode.

However, currently the patch supports only the booting from
memory-mapped SPI flash.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
ec55a1df39 ARM: dts: aspeed: Add AST2600 SoC support
AST2600 is the 7th generation of Aspeed SoC designated for
Interated Remote Management Processor.

AST2600 has significant performance improvement by integrating
1.2GHz dual-core ARM Cortex A7 (r0p5) CPU with FPU. Most of the
controllers are also improved with more features and better
performance than preceding AST24xx/AST25xx.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
9fc21086b7 reset: aspeed: Add AST2600 reset support
Add controller reset support through the
System Control Unit (SCU) of AST2600 SoC.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:06 -05:00
Chia-Wei, Wang
337d95c4aa wdt: aspeed: Add AST2600 watchdog support
AST2600 has 8 watchdog timers including 8 sets of
32-bit decrement counters, based on 1MHz clock.

A 64-bit reset mask is also supported to specify
which controllers should be reset by the WDT reset.

Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:23:05 -05:00
Dylan Hung
fde9314346 ram: aspeed: Add AST2600 DRAM control support
AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600.
The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb),
512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-01-18 15:19:15 -05:00
Ryan Chen
a3c85990c3 clk: aspeed: Add AST2600 clock support
This patch adds the clock control driver
for the AST2600 SoC.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2021-01-18 15:14:56 -05:00
Kate Liu
34a5addb7b board: presidio: Add Parallel NAND support
Set environment for Nand flash (U-boot 2020.04):
- add nand flash in the device tree
- add new default configuration file for G3 using parallel Nand
- set nand parameters in presidio_asic.h

Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-01-18 15:14:37 -05:00
Kate Liu
161df94b3c mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC support
Add Cortina Access parallel Nand support for CAxxxx SOCs

Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
CC: Scott Wood <oss@buserror.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-01-18 15:14:34 -05:00
Holger Brunck
49fd12db39 km/arm: cleanup defconfig files
Disable some unneeded config options and adapt the ident string.

CC: Stefan Roese <sr@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-18 15:14:15 -05:00
Holger Brunck
cbfc3b76b0 km/kirkwood: enable USB support and the host controller driver
Our kirkwood device embeds a USB host controller that is now used
on some boards. This enables the support of USB and the corresponding
driver.

Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
CC: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-01-18 15:14:15 -05:00
Harm Berntsen
7b4fe6dac1 mmc: Only retrieve cd pin when GPIO is enabled
The driver only needs to retrieve the pin for the ACPI info. The driver
itself works without depending on GPIO.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-18 15:14:15 -05:00
Harm Berntsen
e8fcb61852 acpi: Add missing ARM acpi_table header
The pci_mmc.c driver can generate ACPI info and therefore includes
asm/acpi_table.h by proxy. This file does not exist for the ARM
architecture and thus code compilation failed when using this
driver on ARM.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-18 15:14:15 -05:00
Harm Berntsen
30569b47db gpio: do not include <asm/arch/gpio.h> on ARCH_QEMU
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
QEMU.

Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
2021-01-18 15:14:15 -05:00
Fabien Parent
c9d7e79f02 clk: mediatek: Add MT8183 clock driver
Add the topckgen, apmixedsys and infracfg clock driver for the MT8183
SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 15:14:13 -05:00
Fabien Parent
44165e4c67 tools: mtk_image: add support for booting ARM64 images
mkimage is only able to package aarch32 binaries. Add support for
AArch64 images.

One can create a ARM64 image using the following command line:
mkimage -T mtk_image -a 0x201000 -e 0x201000 -n "media=emmc;arm64=1"
-d bl2.bin bl2.img

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:29 -05:00
Fabien Parent
9f6322bd6b configs: pumpkin: enable fastboot
Enable fastboot commands for mt8516 pumpkin board.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:29 -05:00
Fabien Parent
d67393503b configs: pumpkin: enable USB gadget
Enable USB gadget on pumpkin. This requires to also enable
BOARD_LATE_INIT since the init is done in board_late_init function.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:19 -05:00
Fabien Parent
c2984eb38e board: mediatek: pumpkin: initialize usb device
Initialize USB device on pumpkin if it is enabled in the config.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:19 -05:00
Fabien Parent
3dbff96256 arm: dts: mt8516-pumpkin: enable usb port
Enable the USB port for MT8516 Pumpkin Board.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:19 -05:00
Fabien Parent
9fe7493b80 arm: dts: mt8516: add support for USB
Add support for USB on mt8516 based SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18 14:59:19 -05:00
Tom Rini
ae3d8b6c40 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- R-Car pinctrl updates
2021-01-18 12:38:22 -05:00
Tom Rini
59e4e391df Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Update qemu-riscv.rst build instructions.
- Add support for SPI on Kendryte K210.
- Add Microchip PolarFire SoC Icicle Kit support.
- Add support for an early timer.
  - Select TIMER_EARLY to avoid infinite recursion for Trace.
2021-01-18 08:04:28 -05:00
Tom Rini
b5b0237d02 Pull request for documentation tag doc-2021-04-rc1
* document man-page base command
 * move README.fdt-overlays to HTML documentation
 * add synopsis for pstore command
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Merge tag 'doc-2021-04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for documentation tag doc-2021-04-rc1

* document man-page base command
* move README.fdt-overlays to HTML documentation
* add synopsis for pstore command
2021-01-18 08:04:05 -05:00
Tom Rini
19c5fdffdc Merge branch '2021-01-16-assorted-improvements'
- Assorted testing improvements and fixes
- Assorted code cleanups
2021-01-18 07:55:54 -05:00
Lad Prabhakar
67704d6dfb ARM: dts: renesas: Remove leading 0x from rpc node
Remove the leading "0x" from rpc node to fix the below dtc warning:

Warning (simple_bus_reg): Node /soc/rpc@0xee200000 simple-bus unit
address format error, expected "ee200000"

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-01-18 13:29:12 +01:00