Commit Graph

13208 Commits

Author SHA1 Message Date
Adrian Alonso
a996534911 MLK-24932-3: dts: arm64: freescale: imx8mn evk hifiberry dacplus
Enable support for Hifiberry dacplus audio hats on
iMX8MNano EVK.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit c0bee3e1d91937b49e22e635f2bca53e8b25f57c)
2020-11-19 13:28:06 -06:00
Adrian Alonso
eb7f3995e9 MLK-24932-2: dts: arm64: freescale: imx8mn evk iqaudio dacpro
Enable support for IQauidio dacpro audio hats on
iMX8MNano EVK.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 9ebf35bcd2ce93b3595dee2b3a3f662b70f10088)
2020-11-19 13:27:23 -06:00
Adrian Alonso
e50e707b70 MLK-24932-1: dts: arm64: freescale: imx8mn evk iqaudio dacplus
Enable support for IQauidio dacplus audio hats on
iMX8MNano EVK.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0fe19d3f2e949c65ffa636d4971b9f5f463497fd)
2020-11-19 13:26:39 -06:00
Adrian Alonso
90fa71978a MLK-24930-2: configs: arm64: enable imx sound pcm512x
Enable imx-pcm512x sound driver as built-in module
for iMX8M EVK support

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 84db7260f5a350f6e3d5418e7a90e8b352aaa183)
2020-11-19 13:25:01 -06:00
Fancy Fang
ce8dea542e MLK-24998-9 arm64: dts: imx8mn: assign osc_24m to dsi PHY REF clock source
Due to commit b3a420c9cf3f (MLK-24998-4 drm/bridge: sec-dsim:
use 12MHz for default PHY REF clock), the dsi PHY reference
clock source need to be assigned to osc_24m clock.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 8e43cd16c8bbfe5b7e3c0fc1e7c3ddf738d8db01)
2020-11-19 13:51:02 +08:00
Fancy Fang
b2afd6ee3f MLK-24998-8 arm64: dts: imx8mm: assign osc_24m to dsi PHY REF clock source
Due to commit b3a420c9cf3f (MLK-24998-4 drm/bridge: sec-dsim:
use 12MHz for default PHY REF clock), the dsi PHY reference
clock source need to be assigned to osc_24m clock.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 2972241b831ed65f641ccdb80b504cadef0ba591)
2020-11-19 13:51:02 +08:00
Fancy Fang
6a759a0628 MLK-24998-5 arm64: dts: imx8mp: correct assigned-clock-rates for lcdif2
According to i.MX8MP Architecture Defition Document, the maximum
clock rate comes generated by 'ccm_media_disp2_pix_clk_root' is
160MHz, so 1039.5MHz clock rate is not supported. And besides,
this clock rate will be set to the matched rate with display mode
in lcdif driver, so it is not necessary to set its rate in its
assigned-clock-rates property, and just leave it to be 0.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit 0e3556f282466e6b91def024afc815ef77733161)
2020-11-19 13:51:02 +08:00
Fancy Fang
5fb6a0554e MLK-24998-3 arm64: dts: imx8mp: assign osc_24m to dsi PHY REF clock source
Due to commit 26ef2488a2ef (MLK-24998-1 arm64: dts: imx8mp: correct
assigned-clock-rates for video_pll1), default 27MHz dsi PHY reference
clock cannot be derived from 'vide_pll1', so change to use osc_24m
for the clock source and use 12MHz for dsi reference clock rate, since
below usual DDR clock rates can be derived through 12MHz clock rate:

	891000,
	810000,
	792000,
	648000,
	472500,
	445500,
	390000,
	297000,
	240000,
	189000,

All these clock rates comes from ADV7535 bridge driver.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit f3915cb61639821fbdcdc9db3cf3a8e0880cbca3)
2020-11-19 13:51:02 +08:00
Fancy Fang
255751ef23 MLK-24998-2 arm64: dts: imx8mp-ddr4-evk: correct assigned-clock-rates for video_pll1
According to i.MX8MP Architecture Defition Document, the maximum
output frequency generated by video_pll1 is 1190MHz, so correct
its assigned-clock-rates to be 1039.5MHz to meet the spec.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 1dff13053bf83c2d4fb818562a086ad834f2a0bf)
2020-11-19 13:51:02 +08:00
Fancy Fang
f144aafa9f MLK-24998-1 arm64: dts: imx8mp: correct assigned-clock-rates for video_pll1
According to i.MX8MP Architecture Defition Document, the maximum
output frequency generated by video_pll1 is 1190MHz, so correct
its assigned-clock-rates to be 1039.5MHz to meet the spec.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit b935595aa00859887a407dc6900763bfd41dfac2)
2020-11-19 13:51:02 +08:00
Andrew Jones
11c14da8d0 KVM: arm64: Don't hide ID registers from userspace
commit f81cb2c3ad41ac6d8cb2650e3d72d5f67db1aa28 upstream.

ID registers are RAZ until they've been allocated a purpose, but
that doesn't mean they should be removed from the KVM_GET_REG_LIST
list. So far we only have one register, SYS_ID_AA64ZFR0_EL1, that
is hidden from userspace when its function, SVE, is not present.

Expose SYS_ID_AA64ZFR0_EL1 to userspace as RAZ when SVE is not
implemented. Removing the userspace visibility checks is enough
to reexpose it, as it will already return zero to userspace when
SVE is not present. The register already behaves as RAZ for the
guest when SVE is not present.

Fixes: 73433762fc ("KVM: arm64/sve: System register context switch and access support")
Reported-by: 张东旭 <xu910121@sina.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org#v5.2+
Link: https://lore.kernel.org/r/20201105091022.15373-2-drjones@redhat.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-11-18 19:20:29 +01:00
Anson Huang
4a85f59f3f LF-2777 arm64: dts: imx8qm: Update A53 opp table
The A53 900MHz opp is actually 896MHz when reading back from SCFW, so
use the 896MHz instead of 900MHz to make it accurate enough.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 58be8bf3e6e8f51ed3a3b8f992baaa9eeaf3516d)
2020-11-16 12:34:35 +08:00
Oliver F. Brown
02d63a2afb MLK-25000-2: imx8mp: Add IDs in ISP nodes
Adding "id" parameter in the ISP deivce nodes.

Signed-off-by: Oliver F. Brown <oliver.brown@nxp.com>
2020-11-13 07:58:53 -06:00
Thies Moeller
cbccc8fc02 MLK-24996: arm64: dts: imx8mp: Change the name for the Basler camera
Change the name of the Balser camera node from basler_camera to basler_camera_vvcam.

Signed-off-by: Oliver F. Brown <oliver.brown@nxp.com>
2020-11-13 07:58:53 -06:00
Shengjiu Wang
bf89c5f6cb MLK-25004-2: arm64: dts: imx8mp-evk-dsp: remove unused pll clock
Remove unused pll8k and pll11k clock.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Zhang <peng.zhang_8@nxp.com>
2020-11-13 18:54:31 +08:00
Jacky Bai
8a28e705c2 MLK-24992-02 arm64: dts: freescale: Update the clock frequency to ND mode on imx8mp ddr4 evk
As the i.MX8MP DDR4 EVK board is running at ND mode, so the clock
frequency of bus & peripherals need to be updated to ND mode setting
accordingly. GIC, NOC & NOC_IO frequency is already configured as
ND mode setting when boot into linux kernel, so skip the configure
for them.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-11-13 17:32:22 +08:00
Robin Gong
73408def6a LF-2661: arm64: dts: imx8mq: correct sdma device name
correct sdma device name as other socS, otherwise sdma firmware loaded in
Yocto will be failed since its rule is based on '30bd0000.dma-controller'
instead of '30bd0000.sdma' as other socS.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 1d3c451b9703cd7b3b59c25f58bc541f8c30e8ae)
2020-11-13 02:20:25 +08:00
Li Jun
9edb51f39e MLK-24050-2 arm64: dts: imx8mp-evk: add usb phy tuning for certification
Add phy tuning result for USB certification, mainly for pass
eye pattern test, 6 parameters involved, details please check
its dt binding doc:
Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt

Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit 87c832bb437df4a88a6331217ca64f6771ca569f)
2020-11-12 14:07:24 +08:00
Pali Rohár
c3d60c6957 arm64: dts: marvell: espressobin: Add ethernet switch aliases
commit b64d814257b027e29a474bcd660f6372490138c7 upstream.

Espressobin boards have 3 ethernet ports and some of them got assigned more
then one MAC address. MAC addresses are stored in U-Boot environment.

Since commit a2c7023f70 ("net: dsa: read mac address from DT for slave
device") kernel can use MAC addresses from DT for particular DSA port.

Currently Espressobin DTS file contains alias just for ethernet0.

This patch defines additional ethernet aliases in Espressobin DTS files, so
bootloader can fill correct MAC address for DSA switch ports if more MAC
addresses were specified.

DT alias ethernet1 is used for wan port, DT aliases ethernet2 and ethernet3
are used for lan ports for both Espressobin revisions (V5 and V7).

Fixes: 5253cb8c00a6f ("arm64: dts: marvell: espressobin: add ethernet alias")
Cc: <stable@vger.kernel.org> # a2c7023f7075c: dsa: read mac address
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
[pali: Backported Espressobin rev V5 changes to 5.4 and 4.19 versions]
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-11-10 12:37:34 +01:00
Qian Cai
8ee6a0f254 arm64/smp: Move rcu_cpu_starting() earlier
[ Upstream commit ce3d31ad3cac765484463b4f5a0b6b1f8f1a963e ]

The call to rcu_cpu_starting() in secondary_start_kernel() is not early
enough in the CPU-hotplug onlining process, which results in lockdep
splats as follows:

 WARNING: suspicious RCU usage
 -----------------------------
 kernel/locking/lockdep.c:3497 RCU-list traversed in non-reader section!!

 other info that might help us debug this:

 RCU used illegally from offline CPU!
 rcu_scheduler_active = 1, debug_locks = 1
 no locks held by swapper/1/0.

 Call trace:
  dump_backtrace+0x0/0x3c8
  show_stack+0x14/0x60
  dump_stack+0x14c/0x1c4
  lockdep_rcu_suspicious+0x134/0x14c
  __lock_acquire+0x1c30/0x2600
  lock_acquire+0x274/0xc48
  _raw_spin_lock+0xc8/0x140
  vprintk_emit+0x90/0x3d0
  vprintk_default+0x34/0x40
  vprintk_func+0x378/0x590
  printk+0xa8/0xd4
  __cpuinfo_store_cpu+0x71c/0x868
  cpuinfo_store_cpu+0x2c/0xc8
  secondary_start_kernel+0x244/0x318

This is avoided by moving the call to rcu_cpu_starting up near the
beginning of the secondary_start_kernel() function.

Signed-off-by: Qian Cai <cai@redhat.com>
Acked-by: Paul E. McKenney <paulmck@kernel.org>
Link: https://lore.kernel.org/lkml/160223032121.7002.1269740091547117869.tip-bot2@tip-bot2/
Link: https://lore.kernel.org/r/20201028182614.13655-1-cai@redhat.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-11-10 12:37:31 +01:00
Scott K Logan
3283d4d784 arm64: dts: meson: add missing g12 rng clock
[ Upstream commit a1afbbb0285797e01313779c71287d936d069245 ]

This adds the missing perpheral clock for the RNG for Amlogic G12. As
stated in amlogic,meson-rng.yaml, this isn't always necessary for the
RNG to function, but is better to have in case the clock is disabled for
some reason prior to loading.

Signed-off-by: Scott K Logan <logans@cottsay.net>
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/520a1a8ec7a958b3d918d89563ec7e93a4100a45.camel@cottsay.net
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-11-10 12:37:29 +01:00
Fangrui Song
ca16a42f5f arm64: Change .weak to SYM_FUNC_START_WEAK_PI for arch/arm64/lib/mem*.S
commit ec9d78070de986ecf581ea204fd322af4d2477ec upstream.

Commit 39d114ddc6 ("arm64: add KASAN support") added .weak directives to
arch/arm64/lib/mem*.S instead of changing the existing SYM_FUNC_START_PI
macros. This can lead to the assembly snippet `.weak memcpy ... .globl
memcpy` which will produce a STB_WEAK memcpy with GNU as but STB_GLOBAL
memcpy with LLVM's integrated assembler before LLVM 12. LLVM 12 (since
https://reviews.llvm.org/D90108) will error on such an overridden symbol
binding.

Use the appropriate SYM_FUNC_START_WEAK_PI instead.

Fixes: 39d114ddc6 ("arm64: add KASAN support")
Reported-by: Sami Tolvanen <samitolvanen@google.com>
Signed-off-by: Fangrui Song <maskray@google.com>
Tested-by: Sami Tolvanen <samitolvanen@google.com>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20201029181951.1866093-1-maskray@google.com
Signed-off-by: Will Deacon <will@kernel.org>
Cc: Jian Cai <jiancai@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-11-10 12:37:24 +01:00
Mark Brown
d94589900d arm64: lib: Use modern annotations for assembly functions
commit 3ac0f4526dfb80625f5c2365bccd85be68db93ef upstream.

In an effort to clarify and simplify the annotation of assembly functions
in the kernel new macros have been introduced. These replace ENTRY and
ENDPROC and also add a new annotation for static functions which previously
had no ENTRY equivalent. Update the annotations in the library code to the
new macros.

Signed-off-by: Mark Brown <broonie@kernel.org>
[will: Use SYM_FUNC_START_WEAK_PI]
Signed-off-by: Will Deacon <will@kernel.org>
Cc: Jian Cai <jiancai@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-11-10 12:37:24 +01:00
Mark Brown
3e7050661d arm64: asm: Add new-style position independent function annotations
commit 35e61c77ef386555f3df1bc2057098c6997ca10b upstream.

As part of an effort to make the annotations in assembly code clearer and
more consistent new macros have been introduced, including replacements
for ENTRY() and ENDPROC().

On arm64 we have ENDPIPROC(), a custom version of ENDPROC() which is
used for code that will need to run in position independent environments
like EFI, it creates an alias for the function with the prefix __pi_ and
then emits the standard ENDPROC. Add new-style macros to replace this
which expand to the standard SYM_FUNC_*() and SYM_FUNC_ALIAS_*(),
resulting in the same object code. These are added in linkage.h for
consistency with where the generic assembler code has its macros.

Signed-off-by: Mark Brown <broonie@kernel.org>
[will: Rename 'WEAK' macro, use ';' instead of ASM_NL, deprecate ENDPIPROC]
Signed-off-by: Will Deacon <will@kernel.org>
Cc: Jian Cai <jiancai@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-11-10 12:37:24 +01:00
Robert Chiras
acc1b3c876 MLK-24344: arch: arm64: dts: imx8dxl: Fix lcdif pinctrl settings
The pinctrl settings for LCDIF were wrongly implemented, so correct
them.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Acked-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
2020-11-06 10:58:30 +02:00
Jian Li
876a268f04 MLK-24970 imx8mp: vpu: change vpu clock to max frequency in OD mode
Change to max frequency that defined in OD mode for higher performance.
G1: 800M
G2: 700M
VC8000E: 500M
VPU_BUS: 800M

Signed-off-by: Jian Li <jian.li@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
2020-11-06 15:29:10 +08:00
Marc Zyngier
8fd792948e KVM: arm64: Fix AArch32 handling of DBGD{CCINT,SCRext} and DBGVCR
commit 4a1c2c7f63c52ccb11770b5ae25920a6b79d3548 upstream.

The DBGD{CCINT,SCRext} and DBGVCR register entries in the cp14 array
are missing their target register, resulting in all accesses being
targetted at the guard sysreg (indexed by __INVALID_SYSREG__).

Point the emulation code at the actual register entries.

Fixes: bdfb4b389c ("arm64: KVM: add trap handlers for AArch32 debug registers")
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20201029172409.2768336-1-maz@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-11-05 11:43:37 +01:00
Jisheng Zhang
4bf2a744a4 arm64: berlin: Select DW_APB_TIMER_OF
commit b0fc70ce1f028e14a37c186d9f7a55e51439b83a upstream.

Berlin SoCs always contain some DW APB timers which can be used as an
always-on broadcast timer.

Link: https://lore.kernel.org/r/20201009150536.214181fb@xhacker.debian
Cc: <stable@vger.kernel.org> # v3.14+
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-11-05 11:43:36 +01:00
Yoshihiro Shimoda
c70f909e7a arm64: dts: renesas: ulcb: add full-pwr-cycle-in-suspend into eMMC nodes
[ Upstream commit 992d7a8b88c83c05664b649fc54501ce58e19132 ]

Add full-pwr-cycle-in-suspend property to do a graceful shutdown of
the eMMC device in system suspend.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594989201-24228-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-11-05 11:43:21 +01:00
Zhengyuan Liu
64129ad98b arm64/mm: return cpu_all_mask when node is NUMA_NO_NODE
[ Upstream commit a194c5f2d2b3a05428805146afcabe5140b5d378 ]

The @node passed to cpumask_of_node() can be NUMA_NO_NODE, in that
case it will trigger the following WARN_ON(node >= nr_node_ids) due to
mismatched data types of @node and @nr_node_ids. Actually we should
return cpu_all_mask just like most other architectures do if passed
NUMA_NO_NODE.

Also add a similar check to the inline cpumask_of_node() in numa.h.

Signed-off-by: Zhengyuan Liu <liuzhengyuan@tj.kylinos.cn>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Link: https://lore.kernel.org/r/20200921023936.21846-1-liuzhengyuan@tj.kylinos.cn
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-11-05 11:43:18 +01:00
Valentin Schneider
80685a94f7 arm64: topology: Stop using MPIDR for topology information
[ Upstream commit 3102bc0e6ac752cc5df896acb557d779af4d82a1 ]

In the absence of ACPI or DT topology data, we fallback to haphazardly
decoding *something* out of MPIDR. Sadly, the contents of that register are
mostly unusable due to the implementation leniancy and things like Aff0
having to be capped to 15 (despite being encoded on 8 bits).

Consider a simple system with a single package of 32 cores, all under the
same LLC. We ought to be shoving them in the same core_sibling mask, but
MPIDR is going to look like:

  | CPU  | 0 | ... | 15 | 16 | ... | 31 |
  |------+---+-----+----+----+-----+----+
  | Aff0 | 0 | ... | 15 |  0 | ... | 15 |
  | Aff1 | 0 | ... |  0 |  1 | ... |  1 |
  | Aff2 | 0 | ... |  0 |  0 | ... |  0 |

Which will eventually yield

  core_sibling(0-15)  == 0-15
  core_sibling(16-31) == 16-31

NUMA woes
=========

If we try to play games with this and set up NUMA boundaries within those
groups of 16 cores via e.g. QEMU:

  # Node0: 0-9; Node1: 10-19
  $ qemu-system-aarch64 <blah> \
    -smp 20 -numa node,cpus=0-9,nodeid=0 -numa node,cpus=10-19,nodeid=1

The scheduler's MC domain (all CPUs with same LLC) is going to be built via

  arch_topology.c::cpu_coregroup_mask()

In there we try to figure out a sensible mask out of the topology
information we have. In short, here we'll pick the smallest of NUMA or
core sibling mask.

  node_mask(CPU9)    == 0-9
  core_sibling(CPU9) == 0-15

MC mask for CPU9 will thus be 0-9, not a problem.

  node_mask(CPU10)    == 10-19
  core_sibling(CPU10) == 0-15

MC mask for CPU10 will thus be 10-19, not a problem.

  node_mask(CPU16)    == 10-19
  core_sibling(CPU16) == 16-19

MC mask for CPU16 will thus be 16-19... Uh oh. CPUs 16-19 are in two
different unique MC spans, and the scheduler has no idea what to make of
that. That triggers the WARN_ON() added by commit

  ccf74128d66c ("sched/topology: Assert non-NUMA topology masks don't (partially) overlap")

Fixing MPIDR-derived topology
=============================

We could try to come up with some cleverer scheme to figure out which of
the available masks to pick, but really if one of those masks resulted from
MPIDR then it should be discarded because it's bound to be bogus.

I was hoping to give MPIDR a chance for SMT, to figure out which threads are
in the same core using Aff1-3 as core ID, but Sudeep and Robin pointed out
to me that there are systems out there where *all* cores have non-zero
values in their higher affinity fields (e.g. RK3288 has "5" in all of its
cores' MPIDR.Aff1), which would expose a bogus core ID to userspace.

Stop using MPIDR for topology information. When no other source of topology
information is available, mark each CPU as its own core and its NUMA node
as its LLC domain.

Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20200829130016.26106-1-valentin.schneider@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-11-05 11:43:16 +01:00
Viorel Suman
a51f268dd7 MLK-24957-2 arm64: dtsi: imx8mp: remove fsl,xcvr-fw property
Remove fsl,xcvr-fw property from xcvr node in sync
with the upstream accepted driver version.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
2020-11-02 20:07:35 +02:00
Anson Huang
f676b0e9ec MLK-24955 arm64: dts: imx8mp: Update pin function file according to Rev.D RM
Update i.MX8MP imx8mp-pinfunc.h file according latest reference manual Rev.D.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2020-11-02 16:50:36 +08:00
Nick Desaulniers
57a88e44b5 arm64: link with -z norelro regardless of CONFIG_RELOCATABLE
commit 3b92fa7485eba16b05166fddf38ab42f2ff6ab95 upstream.

With CONFIG_EXPERT=y, CONFIG_KASAN=y, CONFIG_RANDOMIZE_BASE=n,
CONFIG_RELOCATABLE=n, we observe the following failure when trying to
link the kernel image with LD=ld.lld:

error: section: .exit.data is not contiguous with other relro sections

ld.lld defaults to -z relro while ld.bfd defaults to -z norelro. This
was previously fixed, but only for CONFIG_RELOCATABLE=y.

Fixes: 3bbd3db864 ("arm64: relocatable: fix inconsistencies in linker script and options")
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20201016175339.2429280-1-ndesaulniers@google.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-11-01 12:01:02 +01:00
Marc Zyngier
7736c61080 arm64: Run ARCH_WORKAROUND_2 enabling code on all CPUs
commit 39533e12063be7f55e3d6ae21ffe067799d542a4 upstream.

Commit 606f8e7b27 ("arm64: capabilities: Use linear array for
detection and verification") changed the way we deal with per-CPU errata
by only calling the .matches() callback until one CPU is found to be
affected. At this point, .matches() stop being called, and .cpu_enable()
will be called on all CPUs.

This breaks the ARCH_WORKAROUND_2 handling, as only a single CPU will be
mitigated.

In order to address this, forcefully call the .matches() callback from a
.cpu_enable() callback, which brings us back to the original behaviour.

Fixes: 606f8e7b27 ("arm64: capabilities: Use linear array for detection and verification")
Cc: <stable@vger.kernel.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-11-01 12:01:02 +01:00
Marc Zyngier
114c6930b3 arm64: Run ARCH_WORKAROUND_1 enabling code on all CPUs
commit 18fce56134c987e5b4eceddafdbe4b00c07e2ae1 upstream.

Commit 73f3816609 ("arm64: Advertise mitigation of Spectre-v2, or lack
thereof") changed the way we deal with ARCH_WORKAROUND_1, by moving most
of the enabling code to the .matches() callback.

This has the unfortunate effect that the workaround gets only enabled on
the first affected CPU, and no other.

In order to address this, forcefully call the .matches() callback from a
.cpu_enable() callback, which brings us back to the original behaviour.

Fixes: 73f3816609 ("arm64: Advertise mitigation of Spectre-v2, or lack thereof")
Cc: <stable@vger.kernel.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-11-01 12:01:01 +01:00
Sherry Sun
7d2f72ec41 MLK-24937-1 ARM64: imx_v8_defconfig: build mic_host/SCIF/COSM as modules
Since imx_mic_host module depends on COSM module, and COSM module
depends on SCIF module, so enable these modules and build them as
modules.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
2020-10-30 09:38:48 +08:00
Michal Simek
7de30421d6 arm64: dts: zynqmp: Remove additional compatible string for i2c IPs
[ Upstream commit 35292518cb0a626fcdcabf739aed75060a018ab5 ]

DT binding permits only one compatible string which was decribed in past by
commit 63cab195bf ("i2c: removed work arounds in i2c driver for Zynq
Ultrascale+ MPSoC").
The commit aea37006e183 ("dt-bindings: i2c: cadence: Migrate i2c-cadence
documentation to YAML") has converted binding to yaml and the following
issues is reported:
...: i2c@ff030000: compatible: Additional items are not allowed
('cdns,i2c-r1p10' was unexpected)
	From schema:
.../Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml fds
...: i2c@ff030000: compatible: ['cdns,i2c-r1p14', 'cdns,i2c-r1p10'] is too
long

The commit c415f9e830 ("ARM64: zynqmp: Fix i2c node's compatible string")
has added the second compatible string but without removing origin one.
The patch is only keeping one compatible string "cdns,i2c-r1p14".

Fixes: c415f9e830 ("ARM64: zynqmp: Fix i2c node's compatible string")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/cc294ae1a79ef845af6809ddb4049f0c0f5bb87a.1598259551.git.michal.simek@xilinx.com
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-29 09:58:00 +01:00
Amit Singh Tomar
d725df0e2b arm64: dts: actions: limit address range for pinctrl node
[ Upstream commit 4bb1eb3cd4bd6241d5e5f99bbfd801ea5a007b6c ]

After commit 7cdf8446ed ("arm64: dts: actions: Add pinctrl node for
Actions Semi S700") following error has been observed while booting
Linux on Cubieboard7-lite(based on S700 SoC).

[    0.257415] pinctrl-s700 e01b0000.pinctrl: can't request region for
resource [mem 0xe01b0000-0xe01b0fff]
[    0.266902] pinctrl-s700: probe of e01b0000.pinctrl failed with error -16

This is due to the fact that memory range for "sps" power domain controller
clashes with pinctrl.

One way to fix it, is to limit pinctrl address range which is safe
to do as current pinctrl driver uses address range only up to 0x100.

This commit limits the pinctrl address range to 0x100 so that it doesn't
conflict with sps range.

Fixes: 7cdf8446ed ("arm64: dts: actions: Add pinctrl node for Actions
Semi S700")

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Suggested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-29 09:57:59 +01:00
Geert Uytterhoeven
449ad29d76 arm64: dts: renesas: r8a774c0: Fix MSIOF1 DMA channels
[ Upstream commit c91dfc9818df5f43c10c727f1cecaebdb5e2fa92 ]

According to Technical Update TN-RCT-S0352A/E, MSIOF1 DMA can only be
used with SYS-DMAC0 on R-Car E3.

Fixes: 62c0056f1c ("arm64: dts: renesas: r8a774c0: Add MSIOF nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200917132117.8515-3-geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-29 09:57:59 +01:00
Geert Uytterhoeven
845e4eefd3 arm64: dts: renesas: r8a77990: Fix MSIOF1 DMA channels
[ Upstream commit 453802c463abd003a7c38ffbc90b67ba162335b6 ]

According to Technical Update TN-RCT-S0352A/E, MSIOF1 DMA can only be
used with SYS-DMAC0 on R-Car E3.

Fixes: 8517042060 ("arm64: dts: renesas: r8a77990: Add DMA properties to MSIOF nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200917132117.8515-2-geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-29 09:57:59 +01:00
Stephan Gerhold
b78cdf1b51 arm64: dts: qcom: msm8916: Fix MDP/DSI interrupts
[ Upstream commit 027cca9eb5b450c3f6bb916ba999144c2ec23cb7 ]

The mdss node sets #interrupt-cells = <1>, so its interrupts
should be referenced using a single cell (in this case: only the
interrupt number).

However, right now the mdp/dsi node both have two interrupt cells
set, e.g. interrupts = <4 0>. The 0 is probably meant to say
IRQ_TYPE_NONE (= 0), but with #interrupt-cells = <1> this is
actually interpreted as a second interrupt line.

Remove the IRQ flags from both interrupts to fix this.

Fixes: 305410ffd1 ("arm64: dts: msm8916: Add display support")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200915071221.72895-5-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-29 09:57:59 +01:00
Stephan Gerhold
1e61c8fda1 arm64: dts: qcom: pm8916: Remove invalid reg size from wcd_codec
[ Upstream commit c2f0cbb57dbac6da3d38b47b5b96de0fe4e23884 ]

Tha parent node of "wcd_codec" specifies #address-cells = <1>
and #size-cells = <0>, which means that each resource should be
described by one cell for the address and size omitted.

However, wcd_codec currently lists 0x200 as second cell (probably
the size of the resource). When parsing this would be treated like
another memory resource - which is entirely wrong.

To quote the device tree specification [1]:
  "If the parent node specifies a value of 0 for #size-cells,
   the length field in the value of reg shall be omitted."

[1]: https://www.devicetree.org/specifications/

Fixes: 5582fcb382 ("arm64: dts: apq8016-sbc: add analog audio support with multicodec")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200915071221.72895-4-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-29 09:57:59 +01:00
Stephan Gerhold
975dafc038 arm64: dts: qcom: msm8916: Remove one more thermal trip point unit name
[ Upstream commit e6859ae8603c5946b8f3ecbd9b4f02b72955b9d0 ]

Commit fe2aff0c574d2 ("arm64: dts: qcom: msm8916: remove unit name for thermal trip points")
removed the unit names for most of the thermal trip points defined
in msm8916.dtsi, but missed to update the one for cpu0_1-thermal.

So why wasn't this spotted by "make dtbs_check"? Apparently, the name
of the thermal zone is already invalid: thermal-zones.yaml specifies
a regex of ^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$, so it is not allowed
to contain underscores. Therefore the thermal zone was never verified
using the DTB schema.

After replacing the underscore in the thermal zone name, the warning
shows up:

    apq8016-sbc.dt.yaml: thermal-zones: cpu0-1-thermal:trips: 'trip-point@0'
    does not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'

Fix up the thermal zone names and remove the unit name for the trip point.

Cc: Amit Kucheria <amit.kucheria@linaro.org>
Fixes: fe2aff0c574d2 ("arm64: dts: qcom: msm8916: remove unit name for thermal trip points")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200915071221.72895-3-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-29 09:57:59 +01:00
Krzysztof Kozlowski
08ece4ba2a arm64: dts: imx8mq: Add missing interrupts to GPC
[ Upstream commit 791619f66843a213784efb2f171be98933bad991 ]

The i.MX General Power Controller v2 device node was missing interrupts
property necessary to route its interrupt to GIC.  This also fixes the
dbts_check warnings like:

  arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000:
    {'compatible': ... '$nodename': ['gpc@303a0000']} is not valid under any of the given schemas
  arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000: 'interrupts' is a required property

Fixes: fdbcc04da2 ("arm64: dts: imx8mq: add GPC power domains")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-29 09:57:58 +01:00
Qiang Yu
8426055fc9 arm64: dts: allwinner: h5: remove Mali GPU PMU module
[ Upstream commit 2933bf3528007f834fb7f5eab033f9c5b0683f91 ]

H5's Mali GPU PMU is not present or working corretly although
H5 datasheet record its interrupt vector.

Adding this module will miss lead lima driver try to shutdown
it and get waiting timeout. This problem is not exposed before
lima runtime PM support is added.

Fixes: bb39ed07e5 ("arm64: dts: allwinner: h5: Add device node for Mali-450 GPU")
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200822062755.534761-1-yuq825@gmail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-29 09:57:58 +01:00
Jerome Brunet
c1430c8769 arm64: dts: meson: vim3: correct led polarity
[ Upstream commit 1f9d87d08e4a2299e86f8a1600aedf87ecd3b636 ]

The LEDs on the vim3 are active when the gpio is high, not low.

Fixes: c6d29c66e5 ("arm64: dts: meson-g12b-khadas-vim3: add initial device-tree")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200803141850.172704-1-jbrunet@baylibre.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-29 09:57:57 +01:00
Jian Li
e3746dc9f4 MLK-24928 lcdifv3 dts: increase lcdif FIFO panic level for 4K display
Can see lcdif underrun occasionally in 4k display when run stress case
Increase lcdif FIFO panic level to avoid underrun

Signed-off-by: Jian Li <jian.li@nxp.com>
Reviewed-by: Fancy Fang <chen.fang@nxp.com>
2020-10-28 15:39:32 +08:00
Bing Song
c630a43169 MLK-24924-1 dsp: dts: 8mp: change ocram layout for lpa
ATF put into the end of OCRAM on 8mp A1. Change the ocram layout
for lpa.

Signed-off-by: Bing Song <bing.song@nxp.com>
2020-10-28 09:13:04 +08:00
Peng Fan
358efb2c0a MLK-24921 arm64: dts: add i.MX8DXL ddr3 evk rpmsg dts
Add i.MX8DXL DDR3 EVK rpmsg dts for communicating with M4

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-10-27 13:40:08 +08:00
Richard Zhu
06d81e69dd MLK-24910-1 arm64: dts: imx8mp: set the max speed of pcie to gen3
Since the bug had been fixed on A1 chip, and PCIe GEN3 can can be
supported now.
Set the max speed of iMX8MP PCIe to GEN3.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-10-26 11:39:29 +08:00
Jacky Bai
9e0665fc3f MLK-24914 irqchip: gpcv2: Revert "MLK-23354 irqchip: gpcv2: Add wait mode workaround on imx8mp"
This reverts commit 3d65a35181.

The i.MX8MP A0 silicon will not be supported, so revert the SW workaround
for A0 to provide more robust & clean code support for i.MX8MP.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Tested-by: Jian Li <jian.li@nxp.com>
2020-10-23 17:17:50 +08:00
Xianzhong
b271f1feb0 MGS-6010 arm64: dts: imx8qm-mek: reserve 256M GPU memory above 4GB
add memory-region to reserve GPU memory above 4G region.

Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
2020-10-22 17:14:28 +08:00
Jian Li
802187edf3 MLK-24900-2 drm/imx: lcdifv3: adjust panic threshold for ddr4 evk
DDR4 EVK need larger min/max panic threshold to avoid display flickering

Signed-off-by: Jian Li <jian.li@nxp.com>
Reviewed-by: Fancy Fang <chen.fang@nxp.com>
2020-10-20 13:09:40 +08:00
Jacky Bai
98d2a8d148 MLK-24898 arm64: dts: freescale: Add imx8mp ddr4 evk board support
Add the i.MX8MP DDR4 EVK board support, on this board, there are
no flexspi & eMMC, so disable these nodes.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
2020-10-19 17:00:13 +08:00
Robin Gong
d3cc9b105b MLK-24895: arm64: dts: imx8mm-ddr4-evk: correct ddr4 evk
Correct ddr4 evk board dts since it's based on old i.mx8mm-evk board.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-10-16 23:14:44 +08:00
Fugang Duan
512d0659ee MLK-24894 arm64: dts: imx8mm-evk: add nxp 88w8987 wireless support
Add nxp 88w8987 wireless support on imx8mm lpddr4 evk:
- covert to use pwrseq instead of regulator
- enable 32Khz input
- set 16k sample rate for bt sco

Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-10-16 13:11:26 +08:00
Alice Guo
dd2aefcf94 MLK-22870 arm64: dts: add OCOTP clock
Use the kexec command to restart the root cell Linux, and the system
will hang up in imx8mm_soc_uid(). The reason is that ocotp root clk is
not enabled when the unique ID is read. Therefore, add CLK_OCOTP_ROOT to
init-on-array in root.dts to ensure that ocotp root clk in the root cell
Linux is always enabled.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-15 14:05:41 +08:00
Robin Gong
1657a49e90 MLK-24888: arm64: dts: imx8mm-evk: change to pca9450 pmic
changed to pca9450 pmic for new i.mx8mm-evk board.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2020-10-15 01:41:49 +08:00
Dinh Nguyen
f02dc39bbb arm64: dts: stratix10: add status to qspi dts node
commit 263a0269a59c0b4145829462a107fe7f7327105f upstream.

Add status = "okay" to QSPI node.

Fixes: 0cb140d07f ("arm64: dts: stratix10: Add QSPI support for Stratix10")
Cc: linux-stable <stable@vger.kernel.org> # >= v5.6
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
[iwamatsu: Drop arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts]
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-10-14 10:32:59 +02:00
Alice Guo
7574650275 MLK-22869 arch: arm64: imx8mn: fix i.MX8MN ocotp compatible string
In imx8mn.dtsi, "fsl,imx7d-ocotp" should not be added to compatible of
ocotp-ctrl because the ocotp of i.MX8MN is incompatible with i.MX7D, and
it is compatible with i.MX8MM.

And with the upper change, we could also see the real value of soc_uid
by cat /sys/devices/soc0/soc_uid.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-13 17:39:53 +08:00
Haibo Chen
f76fd2c91d MLK-24862-4 ARM64: imx_v8_defconfig: default build the goodix.c as module
Goodix GT1151Q touch chip seem not that sensitive with the reset
operation. So after power up, even without reset operation, still
can work well. So touch can probe before the panel. But panel will
do the reset operation when it probe, this reset operation will cost
over 10ms. During the reset operation, touch can't work, i2c data
operation will meet error, and the error log will print out into the
system boot log. To avoid this error log, default build the goodix
touch driver as module, and load automatically. This way, touch
always probe after panel finish the reset operation.

This method also keep align with the old OLED panel(rm67191).

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2020-10-10 10:40:04 +08:00
Haibo Chen
623fa77605 MLK-24862-3 ARM64: dts: imx8mq-evk-dcss-rm67199.dts: force the irq trigger method to edge falling
Add the property "edge-failling-trigger" to force the driver use the
edge falling irq trigger method.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2020-10-10 10:40:04 +08:00
Haibo Chen
bd81511b80 MLK-24862-1 ARM64: dts: imx8mq-evk-dcss-rm67199: add goodix touch support
The new OLED not only use a new DSI panel(Raydium RM67199), but
also use a new touch chip, goodix gt1151q. This touch chip also
share the reset pin with the panel. According to the test, this
touch chip is not that critical with the reset operation, so
let panel control the reset pin.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2020-10-10 10:40:04 +08:00
Shengjiu Wang
41eeeb0492 MLK-24875-2: arm64: dts: imx8dxl-ddr3-evk: Add support of audio sound card
Compare with imx8dxl evk board, there is 4 sound card on ddr3-evk board,
The pin of MCLK_OUT0 is changed, and the headphone jack detect device is
changed from U82 to U84.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-10-09 18:39:42 +08:00
Han Xu
6b8a945ec1 MLK-24870-2: arm64: dts: add dedicate compatible string for DXL FSPI
Added dedicate compatible string for DXL to use IPS to read data for
DXL.

Signed-off-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
2020-10-08 13:57:53 -05:00
Jason Liu
2f68e5475b Merge tag 'v5.4.70' into imx_5.4.y
* tag 'v5.4.70': (3051 commits)
  Linux 5.4.70
  netfilter: ctnetlink: add a range check for l3/l4 protonum
  ep_create_wakeup_source(): dentry name can change under you...
  ...

 Conflicts:
	arch/arm/mach-imx/pm-imx6.c
	arch/arm64/boot/dts/freescale/imx8mm-evk.dts
	arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
	drivers/crypto/caam/caamalg.c
	drivers/gpu/drm/imx/dw_hdmi-imx.c
	drivers/gpu/drm/imx/imx-ldb.c
	drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c
	drivers/mmc/host/sdhci-esdhc-imx.c
	drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
	drivers/net/ethernet/freescale/enetc/enetc.c
	drivers/net/ethernet/freescale/enetc/enetc_pf.c
	drivers/thermal/imx_thermal.c
	drivers/usb/cdns3/ep0.c
	drivers/xen/swiotlb-xen.c
	sound/soc/fsl/fsl_esai.c
	sound/soc/fsl/fsl_sai.c

Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
2020-10-08 17:46:51 +08:00
Daniel Baluta
024566cea6 MLK-24615-5 arm64: defconfig: Remove FSL_DAI config option
Because FSL DAI driver was removed, we no longer
need the FSL_DAI config option.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-10-07 15:40:50 +03:00
Daniel Baluta
c19a2d13c1 MLK-24615-3 arm64: dts: imx8mp-sof-wm8960: Remove FSL DAI generic node
This removes FSL DAI generic node (as per upstream guidance)
and moves all resource handling to dsp node.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-10-07 11:59:39 +03:00
Daniel Baluta
2cc8fc5c0d MLK-24668-6 arm64: dts: imx8qxp-sof-cs4288: Remove FSL DAI generic node
This removes FSL DAI generic node (as per upstream guidance)
and move all resource handling to dsp node.

Reviewed-by: Paul Olaru <paul.olaru@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-10-06 13:30:05 +03:00
Daniel Baluta
d1a296c0ba MLK-24668-5 arm64: dts: imx8qm-sof-wm8960: Remove FSL DAI generic node
This removes FSL DAI generic node (as per upstream guidance)
and move all resource handling to dsp node.

Reviewed-by: Paul Olaru <paul.olaru@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-10-06 13:30:00 +03:00
Daniel Baluta
4b99159456 MLK-24668-4 arm64: dts: imx8qxp-sof-wm8960: Remove FSL DAI generic node
This removes FSL DAI generic node (as per upstream guidance)
and move all resource handling to dsp node.

Reviewed-by: Paul Olaru <paul.olaru@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-10-06 13:29:55 +03:00
Daniel Baluta
4bf6280655 MLK-24668-3 arm64: dts: imx8qxp-sof-cs4288: Remove FSL DAI generic node
This removes FSL DAI generic node (as per upstream guidance)
and move all resource handling to dsp node.

Reviewed-by: Paul Olaru <paul.olaru@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-10-06 13:29:49 +03:00
Marc Zyngier
c9bfb7b4d9 KVM: arm64: Assume write fault on S1PTW permission fault on instruction fetch
commit c4ad98e4b72cb5be30ea282fce935248f2300e62 upstream.

KVM currently assumes that an instruction abort can never be a write.
This is in general true, except when the abort is triggered by
a S1PTW on instruction fetch that tries to update the S1 page tables
(to set AF, for example).

This can happen if the page tables have been paged out and brought
back in without seeing a direct write to them (they are thus marked
read only), and the fault handling code will make the PT executable(!)
instead of writable. The guest gets stuck forever.

In these conditions, the permission fault must be considered as
a write so that the Stage-1 update can take place. This is essentially
the I-side equivalent of the problem fixed by 60e21a0ef5 ("arm64: KVM:
Take S1 walks into account when determining S2 write faults").

Update kvm_is_write_fault() to return true on IABT+S1PTW, and introduce
kvm_vcpu_trap_is_exec_fault() that only return true when no faulting
on a S1 fault. Additionally, kvm_vcpu_dabt_iss1tw() is renamed to
kvm_vcpu_abt_iss1tw(), as the above makes it plain that it isn't
specific to data abort.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Will Deacon <will@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200915104218.1284701-2-maz@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-10-01 13:18:25 +02:00
Anshuman Khandual
180e60f154 arm64/cpufeature: Drop TraceFilt feature exposure from ID_DFR0 register
[ Upstream commit 1ed1b90a0594c8c9d31e8bb8be25a2b37717dc9e ]

ID_DFR0 based TraceFilt feature should not be exposed to guests. Hence lets
drop it.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org

Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1589881254-10082-3-git-send-email-anshuman.khandual@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-01 13:18:03 +02:00
James Morse
af02933d59 arm64: acpi: Make apei_claim_sea() synchronise with APEI's irq work
[ Upstream commit 8fcc4ae6faf8b455eeef00bc9ae70744e3b0f462 ]

APEI is unable to do all of its error handling work in nmi-context, so
it defers non-fatal work onto the irq_work queue. arch_irq_work_raise()
sends an IPI to the calling cpu, but this is not guaranteed to be taken
before returning to user-space.

Unless the exception interrupted a context with irqs-masked,
irq_work_run() can run immediately. Otherwise return -EINPROGRESS to
indicate ghes_notify_sea() found some work to do, but it hasn't
finished yet.

With this apei_claim_sea() returning '0' means this external-abort was
also notification of a firmware-first RAS error, and that APEI has
processed the CPER records.

Signed-off-by: James Morse <james.morse@arm.com>
Tested-by: Tyler Baicar <baicar@os.amperecomputing.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-01 13:18:02 +02:00
Will Deacon
8e32fed034 arm64: cpufeature: Relax checks for AArch32 support at EL[0-2]
[ Upstream commit 98448cdfe7060dd5491bfbd3f7214ffe1395d58e ]

We don't need to be quite as strict about mismatched AArch32 support,
which is good because the friendly hardware folks have been busy
mismatching this to their hearts' content.

  * We don't care about EL2 or EL3 (there are silly comments concerning
    the latter, so remove those)

  * EL1 support is gated by the ARM64_HAS_32BIT_EL1 capability and handled
    gracefully when a mismatch occurs

  * EL0 support is gated by the ARM64_HAS_32BIT_EL0 capability and handled
    gracefully when a mismatch occurs

Relax the AArch32 checks to FTR_NONSTRICT.

Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200421142922.18950-8-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-01 13:17:57 +02:00
Mark Rutland
3283bd6d19 arm64: insn: consistently handle exit text
[ Upstream commit ca2ef4ffabbef25644e02a98b0f48869f8be0375 ]

A kernel built with KASAN && FTRACE_WITH_REGS && !MODULES, produces a
boot-time splat in the bowels of ftrace:

| [    0.000000] ftrace: allocating 32281 entries in 127 pages
| [    0.000000] ------------[ cut here ]------------
| [    0.000000] WARNING: CPU: 0 PID: 0 at kernel/trace/ftrace.c:2019 ftrace_bug+0x27c/0x328
| [    0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.4.0-rc3-00008-g7f08ae53a7e3 #13
| [    0.000000] Hardware name: linux,dummy-virt (DT)
| [    0.000000] pstate: 60000085 (nZCv daIf -PAN -UAO)
| [    0.000000] pc : ftrace_bug+0x27c/0x328
| [    0.000000] lr : ftrace_init+0x640/0x6cc
| [    0.000000] sp : ffffa000120e7e00
| [    0.000000] x29: ffffa000120e7e00 x28: ffff00006ac01b10
| [    0.000000] x27: ffff00006ac898c0 x26: dfffa00000000000
| [    0.000000] x25: ffffa000120ef290 x24: ffffa0001216df40
| [    0.000000] x23: 000000000000018d x22: ffffa0001244c700
| [    0.000000] x21: ffffa00011bf393c x20: ffff00006ac898c0
| [    0.000000] x19: 00000000ffffffff x18: 0000000000001584
| [    0.000000] x17: 0000000000001540 x16: 0000000000000007
| [    0.000000] x15: 0000000000000000 x14: ffffa00010432770
| [    0.000000] x13: ffff940002483519 x12: 1ffff40002483518
| [    0.000000] x11: 1ffff40002483518 x10: ffff940002483518
| [    0.000000] x9 : dfffa00000000000 x8 : 0000000000000001
| [    0.000000] x7 : ffff940002483519 x6 : ffffa0001241a8c0
| [    0.000000] x5 : ffff940002483519 x4 : ffff940002483519
| [    0.000000] x3 : ffffa00011780870 x2 : 0000000000000001
| [    0.000000] x1 : 1fffe0000d591318 x0 : 0000000000000000
| [    0.000000] Call trace:
| [    0.000000]  ftrace_bug+0x27c/0x328
| [    0.000000]  ftrace_init+0x640/0x6cc
| [    0.000000]  start_kernel+0x27c/0x654
| [    0.000000] random: get_random_bytes called from print_oops_end_marker+0x30/0x60 with crng_init=0
| [    0.000000] ---[ end trace 0000000000000000 ]---
| [    0.000000] ftrace faulted on writing
| [    0.000000] [<ffffa00011bf393c>] _GLOBAL__sub_D_65535_0___tracepoint_initcall_level+0x4/0x28
| [    0.000000] Initializing ftrace call sites
| [    0.000000] ftrace record flags: 0
| [    0.000000]  (0)
| [    0.000000]  expected tramp: ffffa000100b3344

This is due to an unfortunate combination of several factors.

Building with KASAN results in the compiler generating anonymous
functions to register/unregister global variables against the shadow
memory. These functions are placed in .text.startup/.text.exit, and
given mangled names like _GLOBAL__sub_{I,D}_65535_0_$OTHER_SYMBOL. The
kernel linker script places these in .init.text and .exit.text
respectively, which are both discarded at runtime as part of initmem.

Building with FTRACE_WITH_REGS uses -fpatchable-function-entry=2, which
also instruments KASAN's anonymous functions. When these are discarded
with the rest of initmem, ftrace removes dangling references to these
call sites.

Building without MODULES implicitly disables STRICT_MODULE_RWX, and
causes arm64's patch_map() function to treat any !core_kernel_text()
symbol as something that can be modified in-place. As core_kernel_text()
is only true for .text and .init.text, with the latter depending on
system_state < SYSTEM_RUNNING, we'll treat .exit.text as something that
can be patched in-place. However, .exit.text is mapped read-only.

Hence in this configuration the ftrace init code blows up while trying
to patch one of the functions generated by KASAN.

We could try to filter out the call sites in .exit.text rather than
initializing them, but this would be inconsistent with how we handle
.init.text, and requires hooking into core bits of ftrace. The behaviour
of patch_map() is also inconsistent today, so instead let's clean that
up and have it consistently handle .exit.text.

This patch teaches patch_map() to handle .exit.text at init time,
preventing the boot-time splat above. The flow of patch_map() is
reworked to make the logic clearer and minimize redundant
conditionality.

Fixes: 3b23e4991fb66f6d ("arm64: implement ftrace with regs")
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Amit Daniel Kachhap <amit.kachhap@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Torsten Duwe <duwe@suse.de>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-01 13:17:23 +02:00
Shengjiu Wang
9b8509a9ea MLK-24845: arm64: dts: imx8mn-ddr3l: Add ak5558 and LPA support
Add ak5558 and LPA support, these dts are derived from
imx8mn-evk-ak5558.dts and imx8mn-evk-rpmsg.dts

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-09-25 16:23:45 +08:00
Ilias Apalodimas
ecd219c729 arm64: bpf: Fix branch offset in JIT
[ Upstream commit 32f6865c7aa3c422f710903baa6eb81abc6f559b ]

Running the eBPF test_verifier leads to random errors looking like this:

[ 6525.735488] Unexpected kernel BRK exception at EL1
[ 6525.735502] Internal error: ptrace BRK handler: f2000100 [#1] SMP
[ 6525.741609] Modules linked in: nls_utf8 cifs libdes libarc4 dns_resolver fscache binfmt_misc nls_ascii nls_cp437 vfat fat aes_ce_blk crypto_simd cryptd aes_ce_cipher ghash_ce gf128mul efi_pstore sha2_ce sha256_arm64 sha1_ce evdev efivars efivarfs ip_tables x_tables autofs4 btrfs blake2b_generic xor xor_neon zstd_compress raid6_pq libcrc32c crc32c_generic ahci xhci_pci libahci xhci_hcd igb libata i2c_algo_bit nvme realtek usbcore nvme_core scsi_mod t10_pi netsec mdio_devres of_mdio gpio_keys fixed_phy libphy gpio_mb86s7x
[ 6525.787760] CPU: 3 PID: 7881 Comm: test_verifier Tainted: G        W         5.9.0-rc1+ #47
[ 6525.796111] Hardware name: Socionext SynQuacer E-series DeveloperBox, BIOS build #1 Jun  6 2020
[ 6525.804812] pstate: 20000005 (nzCv daif -PAN -UAO BTYPE=--)
[ 6525.810390] pc : bpf_prog_c3d01833289b6311_F+0xc8/0x9f4
[ 6525.815613] lr : bpf_prog_d53bb52e3f4483f9_F+0x38/0xc8c
[ 6525.820832] sp : ffff8000130cbb80
[ 6525.824141] x29: ffff8000130cbbb0 x28: 0000000000000000
[ 6525.829451] x27: 000005ef6fcbf39b x26: 0000000000000000
[ 6525.834759] x25: ffff8000130cbb80 x24: ffff800011dc7038
[ 6525.840067] x23: ffff8000130cbd00 x22: ffff0008f624d080
[ 6525.845375] x21: 0000000000000001 x20: ffff800011dc7000
[ 6525.850682] x19: 0000000000000000 x18: 0000000000000000
[ 6525.855990] x17: 0000000000000000 x16: 0000000000000000
[ 6525.861298] x15: 0000000000000000 x14: 0000000000000000
[ 6525.866606] x13: 0000000000000000 x12: 0000000000000000
[ 6525.871913] x11: 0000000000000001 x10: ffff8000000a660c
[ 6525.877220] x9 : ffff800010951810 x8 : ffff8000130cbc38
[ 6525.882528] x7 : 0000000000000000 x6 : 0000009864cfa881
[ 6525.887836] x5 : 00ffffffffffffff x4 : 002880ba1a0b3e9f
[ 6525.893144] x3 : 0000000000000018 x2 : ffff8000000a4374
[ 6525.898452] x1 : 000000000000000a x0 : 0000000000000009
[ 6525.903760] Call trace:
[ 6525.906202]  bpf_prog_c3d01833289b6311_F+0xc8/0x9f4
[ 6525.911076]  bpf_prog_d53bb52e3f4483f9_F+0x38/0xc8c
[ 6525.915957]  bpf_dispatcher_xdp_func+0x14/0x20
[ 6525.920398]  bpf_test_run+0x70/0x1b0
[ 6525.923969]  bpf_prog_test_run_xdp+0xec/0x190
[ 6525.928326]  __do_sys_bpf+0xc88/0x1b28
[ 6525.932072]  __arm64_sys_bpf+0x24/0x30
[ 6525.935820]  el0_svc_common.constprop.0+0x70/0x168
[ 6525.940607]  do_el0_svc+0x28/0x88
[ 6525.943920]  el0_sync_handler+0x88/0x190
[ 6525.947838]  el0_sync+0x140/0x180
[ 6525.951154] Code: d4202000 d4202000 d4202000 d4202000 (d4202000)
[ 6525.957249] ---[ end trace cecc3f93b14927e2 ]---

The reason is the offset[] creation and later usage, while building
the eBPF body. The code currently omits the first instruction, since
build_insn() will increase our ctx->idx before saving it.
That was fine up until bounded eBPF loops were introduced. After that
introduction, offset[0] must be the offset of the end of prologue which
is the start of the 1st insn while, offset[n] holds the
offset of the end of n-th insn.

When "taken loop with back jump to 1st insn" test runs, it will
eventually call bpf2a64_offset(-1, 2, ctx). Since negative indexing is
permitted, the current outcome depends on the value stored in
ctx->offset[-1], which has nothing to do with our array.
If the value happens to be 0 the tests will work. If not this error
triggers.

commit 7c2e988f40 ("bpf: fix x64 JIT code generation for jmp to 1st insn")
fixed an indentical bug on x86 when eBPF bounded loops were introduced.

So let's fix it by creating the ctx->offset[] differently. Track the
beginning of instruction and account for the extra instruction while
calculating the arm instruction offsets.

Fixes: 2589726d12 ("bpf: introduce bounded loops")
Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>
Reported-by: Jiri Olsa <jolsa@kernel.org>
Co-developed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Co-developed-by: Yauheni Kaliuta <yauheni.kaliuta@redhat.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Signed-off-by: Yauheni Kaliuta <yauheni.kaliuta@redhat.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200917084925.177348-1-ilias.apalodimas@linaro.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-23 12:40:42 +02:00
Marc Zyngier
cdf990e2b2 arm64: Allow CPUs unffected by ARM erratum 1418040 to come in late
[ Upstream commit ed888cb0d1ebce69f12794e89fbd5e2c86d40b8d ]

Now that we allow CPUs affected by erratum 1418040 to come in late,
this prevents their unaffected sibblings from coming in late (or
coming back after a suspend or hotplug-off, which amounts to the
same thing).

To allow this, we need to add ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU,
which amounts to set .type to ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE.

Fixes: bf87bb0881d0 ("arm64: Allow booting of late CPUs affected by erratum 1418040")
Reported-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200911181611.2073183-1-maz@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-23 12:40:40 +02:00
Clark Wang
76dbd91bd7 MLK-24833-3 arm64: dts: imx8qm: add lpi2c4 node
Add lpi2c4 node for i.MX8QM.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
2020-09-23 15:49:53 +08:00
Sherry Sun
fcea4ac4b8 MLK-24818: arm64: dts: imx8/imx8m: remove the reserved-region property
of pcie nodes

Remove the reserved-region property of pcie nodes for imx8m and imx8
platform since for the new pcie frame, we don't need them any more.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2020-09-23 09:37:34 +08:00
Clark Wang
3ac4d58d5d MLK-24827 ARM64: dts: imx8-dma: change spi and i2c irq number to non-combined
Combined interrupt number may cause unexcepted irq event when using DMA
and too many interrupts are generated.
So change all spi and i2c interrupts number to non-combined for
imx8qxp/8qm/8dxl.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
2020-09-22 16:27:39 +08:00
Sherry Sun
5a50ac86e8 MLK-24796-4: arm64: configs: imx_mic_card/host: add i.MX MIC support
Add i.MX MIC support based on VOP framework. Here build imx_mic and vop
drivers as modules.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-09-22 14:48:51 +08:00
Sherry Sun
95922e6ee9 MLK-24796-3: dts: imx8qm: add imx_mic_intr for ep and add cma node for rc
For rc, use cma node to allocate share memory from rc ddr dynamically.
So add a new imx8qm-mek-vop.dts file for rc.
For ep, add an imx_mic_intr node to config the power and clock of
mu8a/mu8b, which are used to generate interrupts from rc to ep.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-09-22 14:48:51 +08:00
Sherry Sun
a734d2ab64 MLK-24796-2: dts: imx8qxp: add imx_mic_intr for ep and add cma node for rc
For rc, use cma node to allocate share memory from rc ddr dynamically.
So add a new imx8qxp-mek-vop.dts file for rc.
For ep, add an imx_mic_intr node to config the power and clock of
mu8a/mu8b, which are used to generate interrupts from rc to ep.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-09-22 14:48:51 +08:00
Robert Chiras
4096b5014e MLK-24805-4: arm64: dts: add DTS for DCSS and rm67199
Add support for the new DSI panel: Raydium RM67199 when used with DCSS.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
2020-09-22 09:32:20 +03:00
Robert Chiras
0fd53b4b2e MLK-24805-3: arm64: dts: imx8mq-evk: create dts file for lcdif-rm67199
Add support fot the new DSI panel: Raydium RM67199 when used with LCDIF.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
2020-09-22 09:32:15 +03:00
Jacky Bai
dd1f3a8955 MLK-24822 arm64: dts: freescale: Add imx8mn ddr3l evk board support
Add i.MX8MN DDR3L EVK board support.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2020-09-21 13:43:16 +08:00
Jessica Yu
ff37a26364 arm64/module: set trampoline section flags regardless of CONFIG_DYNAMIC_FTRACE
[ Upstream commit e0328feda79d9681b3e3245e6e180295550c8ee9 ]

In the arm64 module linker script, the section .text.ftrace_trampoline
is specified unconditionally regardless of whether CONFIG_DYNAMIC_FTRACE
is enabled (this is simply due to the limitation that module linker
scripts are not preprocessed like the vmlinux one).

Normally, for .plt and .text.ftrace_trampoline, the section flags
present in the module binary wouldn't matter since module_frob_arch_sections()
would assign them manually anyway. However, the arm64 module loader only
sets the section flags for .text.ftrace_trampoline when CONFIG_DYNAMIC_FTRACE=y.
That's only become problematic recently due to a recent change in
binutils-2.35, where the .text.ftrace_trampoline section (along with the
.plt section) is now marked writable and executable (WAX).

We no longer allow writable and executable sections to be loaded due to
commit 5c3a7db0c7ec ("module: Harden STRICT_MODULE_RWX"), so this is
causing all modules linked with binutils-2.35 to be rejected under arm64.
Drop the IS_ENABLED(CONFIG_DYNAMIC_FTRACE) check in module_frob_arch_sections()
so that the section flags for .text.ftrace_trampoline get properly set to
SHF_EXECINSTR|SHF_ALLOC, without SHF_WRITE.

Signed-off-by: Jessica Yu <jeyu@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: http://lore.kernel.org/r/20200831094651.GA16385@linux-8ccs
Link: https://lore.kernel.org/r/20200901160016.3646-1-jeyu@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-17 13:47:49 +02:00
Florian Fainelli
75a81be8fb arm64: dts: ns2: Fixed QSPI compatible string
[ Upstream commit 686e0a0c8c61e0e3f55321d0181fece3efd92777 ]

The string was incorrectly defined before from least to most specific,
swap the compatible strings accordingly.

Fixes: ff73917d38 ("ARM64: dts: Add QSPI Device Tree node for NS2")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-17 13:47:45 +02:00
Krzysztof Kozlowski
af0d981845 arm64: dts: imx8mq: Fix TMU interrupt property
[ Upstream commit 1f2f98f2703e8134678fe20982886085631eda23 ]

"interrupt" is not a valid property.  Using proper name fixes dtbs_check
warning:

  arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dt.yaml: tmu@30260000: 'interrupts' is a required property

Fixes: e464fd2ba4 ("arm64: dts: imx8mq: enable the multi sensor TMU")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-17 13:47:42 +02:00
Ye Li
c06ed9363c MLK-24794 arm64: dts: imx8dxl: Rename DDR3 VAL board to EVK
Per marketing request, rename this board from validation board to
EVK board.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
2020-09-16 19:31:12 -07:00
Joakim Zhang
59c2d372b4 MLK-24752-3 arch: arm64: imx8mn-ddr4: add IR device node
Add device node for imx8mn ddr4 evk board.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
2020-09-16 19:15:09 +08:00
Iuliana Prodan
aee8fd4709 MLK-24762 ARM64: configs: imx_v8_defconfig: enable DM_CRYPT
Enable DM_CRYPT, as module, to have an out-of-the-box
solution for dm-crypt with black keys and blobs.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
2020-09-11 12:17:31 +03:00
Li Jun
c0420229f2 MLK-24747-1 arm64: dtsi: imx8mp: add suspend clk for usb glue node
It turns out the usb suspend clk IMX8MP_CLK_USB_ROOT should be on to
support usb wakeup, so add the suspend clk to glue layer node for
handling.

Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
2020-09-11 16:11:52 +08:00
Peng Fan
46c4bcf45b MLK-24275 arm64: imx_v8_defconfig: build xen netback as module
Build xen netback as module, then we could have paravirtualized network
support.

Reviewed-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-11 16:15:28 +08:00
Peng Fan
b30136bea1 MLK-24763 arm64: dts: imx8qm-dom0: disable uart0_lpcg
uart0 is used by XEN, we should not allow linux to touch
the clk to avoid uart being broken.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 24947e556d05f16bfca1327ebba047b874c2a5d4)
2020-09-10 18:41:33 +08:00
Wenbin Mei
2816ccd071 arm64: dts: mt7622: add reset node for mmc device
commit d6f6cbeee4e5ee6976792851e0461c19f1ede864 upstream.

This commit adds reset node for mmc device.

Cc: <stable@vger.kernel.org> # v5.4+
Fixes: 966580ad23 ("mmc: mediatek: add support for MT7622 SoC")
Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20200814014346.6496-3-wenbin.mei@mediatek.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-09 19:12:33 +02:00
Adrian Alonso
67a6a0ff58 MLK-24700-3: dts: arm64: freescale: imx8mn ddr4 ab2 add i2c4
Add i2c4 port used by hdmi daughter cards on Audio Board
2.0 targets

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-09-08 09:58:20 -05:00
Adrian Alonso
5938e9fb2b MLK-24700-2: dts: arm64: freescale: imx8mn ab2 add i2c4
Add i2c4 port used by hdmi daughter cards on Audio Board
2.0 targets

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-09-08 09:58:06 -05:00
Adrian Alonso
c38112c9ed MLK-24700-1: dts: arm64: freescale: imx8mm ab2 add i2c4
Add i2c4 port used by hdmi daughter cards on Audio Board
2.0 targets

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-09-08 09:57:54 -05:00
Adrian Alonso
7597adf8d2 MLK-24702-2: dts: arm64 freescale: imx8mn ab2 regulator power tree
Follow the same regulator power tree as imx8mm ab2
target platforms

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-09-08 09:57:41 -05:00
Adrian Alonso
6c65808df8 MLK-24702-1: dts: arm64: freescale: imx8mn ddr4 ab2 regulator tree
Aling to use the same regulator power tree as imx8mm ab2
target boards

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-09-08 09:57:27 -05:00
Adrian Alonso
6b5ae3257d MLK-24701: dts: arm64: freescale: imx8mm ab2: sai1 rx pads
Add SAI1 RX pads to support hdmi daughter cards with
I2S audio extraction.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-09-08 09:56:47 -05:00
Joakim Zhang
826c9b5d0d MLK-24752-2 arch: arm64: config: imx_v8_defconfig: enable Remote Controller
Enable all RC decoder that kernel supported and GPIO RC device.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
2020-09-09 02:45:38 +08:00
Joakim Zhang
65aa1b7ba2 MLK-24752-1 arch: arm64: imx8m: add IR support
Add IR support for i.MX8MM/MN/MQ.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
2020-09-09 02:45:38 +08:00
Sowjanya Komatineni
eda97e9d90 arm64: tegra: Add missing timeout clock to Tegra210 SDMMC
commit 679f71fa0db2d777f39c7a5af7f7c0689fc713fa upstream.

commit 742af7e7a0 ("arm64: tegra: Add Tegra210 support")

Tegra210 uses separate SDMMC_LEGACY_TM clock for data timeout and
this clock is not enabled currently which is not recommended.

Tegra SDMMC advertises 12Mhz as timeout clock frequency in host
capability register.

So, this clock should be kept enabled by SDMMC driver.

Fixes: 742af7e7a0 ("arm64: tegra: Add Tegra210 support")
Cc: stable <stable@vger.kernel.org> # 5.4
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1598548861-32373-5-git-send-email-skomatineni@nvidia.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-05 11:22:51 +02:00
Sowjanya Komatineni
5cd8c5979e arm64: tegra: Add missing timeout clock to Tegra186 SDMMC nodes
commit baba217d2c4446b6eef309d81d8776cb5c68cb55 upstream.

commit 39cb62cb89 ("arm64: tegra: Add Tegra186 support")

Tegra186 uses separate SDMMC_LEGACY_TM clock for data timeout and
this clock is not enabled currently which is not recommended.

Tegra186 SDMMC advertises 12Mhz as timeout clock frequency in host
capability register and uses it by default.

So, this clock should be kept enabled by the SDMMC driver.

Fixes: 39cb62cb89 ("arm64: tegra: Add Tegra186 support")
Cc: stable <stable@vger.kernel.org> # 5.4
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1598548861-32373-6-git-send-email-skomatineni@nvidia.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-05 11:22:50 +02:00
Sowjanya Komatineni
ef8b5f3337 arm64: tegra: Add missing timeout clock to Tegra194 SDMMC nodes
commit c956c0cd4f6f4aac4f095621b1c4e1c5ee1df877 upstream.

commit 5425fb15d8 ("arm64: tegra: Add Tegra194 chip device tree")

Tegra194 uses separate SDMMC_LEGACY_TM clock for data timeout and
this clock is not enabled currently which is not recommended.

Tegra194 SDMMC advertises 12Mhz as timeout clock frequency in host
capability register.

So, this clock should be kept enabled by SDMMC driver.

Fixes: 5425fb15d8 ("arm64: tegra: Add Tegra194 chip device tree")
Cc: stable <stable@vger.kernel.org> # 5.4
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Link: https://lore.kernel.org/r/1598548861-32373-7-git-send-email-skomatineni@nvidia.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-05 11:22:50 +02:00
James Morse
d2ac42e61e KVM: arm64: Set HCR_EL2.PTW to prevent AT taking synchronous exception
commit 71a7f8cb1ca4ca7214a700b1243626759b6c11d4 upstream.

AT instructions do a translation table walk and return the result, or
the fault in PAR_EL1. KVM uses these to find the IPA when the value is
not provided by the CPU in HPFAR_EL1.

If a translation table walk causes an external abort it is taken as an
exception, even if it was due to an AT instruction. (DDI0487F.a's D5.2.11
"Synchronous faults generated by address translation instructions")

While we previously made KVM resilient to exceptions taken due to AT
instructions, the device access causes mismatched attributes, and may
occur speculatively. Prevent this, by forbidding a walk through memory
described as device at stage2. Now such AT instructions will report a
stage2 fault.

Such a fault will cause KVM to restart the guest. If the AT instructions
always walk the page tables, but guest execution uses the translation cached
in the TLB, the guest can't make forward progress until the TLB entry is
evicted. This isn't a problem, as since commit 5dcd0fdbb4 ("KVM: arm64:
Defer guest entry when an asynchronous exception is pending"), KVM will
return to the host to process IRQs allowing the rest of the system to keep
running.

Cc: stable@vger.kernel.org # <v5.3: 5dcd0fdbb4 ("KVM: arm64: Defer guest entry when an asynchronous exception is pending")
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-05 11:22:50 +02:00
James Morse
ffad02f9e3 KVM: arm64: Survive synchronous exceptions caused by AT instructions
commit 88a84ccccb3966bcc3f309cdb76092a9892c0260 upstream.

KVM doesn't expect any synchronous exceptions when executing, any such
exception leads to a panic(). AT instructions access the guest page
tables, and can cause a synchronous external abort to be taken.

The arm-arm is unclear on what should happen if the guest has configured
the hardware update of the access-flag, and a memory type in TCR_EL1 that
does not support atomic operations. B2.2.6 "Possible implementation
restrictions on using atomic instructions" from DDI0487F.a lists
synchronous external abort as a possible behaviour of atomic instructions
that target memory that isn't writeback cacheable, but the page table
walker may behave differently.

Make KVM robust to synchronous exceptions caused by AT instructions.
Add a get_user() style helper for AT instructions that returns -EFAULT
if an exception was generated.

While KVM's version of the exception table mixes synchronous and
asynchronous exceptions, only one of these can occur at each location.

Re-enter the guest when the AT instructions take an exception on the
assumption the guest will take the same exception. This isn't guaranteed
to make forward progress, as the AT instructions may always walk the page
tables, but guest execution may use the translation cached in the TLB.

This isn't a problem, as since commit 5dcd0fdbb4 ("KVM: arm64: Defer guest
entry when an asynchronous exception is pending"), KVM will return to the
host to process IRQs allowing the rest of the system to keep running.

Cc: stable@vger.kernel.org # <v5.3: 5dcd0fdbb4 ("KVM: arm64: Defer guest entry when an asynchronous exception is pending")
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-05 11:22:50 +02:00
James Morse
1744237ca0 KVM: arm64: Add kvm_extable for vaxorcism code
commit e9ee186bb735bfc17fa81dbc9aebf268aee5b41e upstream.

KVM has a one instruction window where it will allow an SError exception
to be consumed by the hypervisor without treating it as a hypervisor bug.
This is used to consume asynchronous external abort that were caused by
the guest.

As we are about to add another location that survives unexpected exceptions,
generalise this code to make it behave like the host's extable.

KVM's version has to be mapped to EL2 to be accessible on nVHE systems.

The SError vaxorcism code is a one instruction window, so has two entries
in the extable. Because the KVM code is copied for VHE and nVHE, we end up
with four entries, half of which correspond with code that isn't mapped.

Cc: <stable@vger.kernel.org> # 5.4.x
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-05 11:22:50 +02:00
Richard Zhu
4f60600cb9 MLK-24712 arm64: dts: imx8: use rpmsg dts in ep enable dts
As linux_m4 flash is default boot flash for iMX8QXP/iMX8QM/iMX8DXL,
enabble PCIe EP based on default boot RPMSG DTS file.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-09-04 15:11:34 +08:00
Frank van der Linden
7ded78a8c8 arm64: vdso32: make vdso32 install conditional
commit 5d28ba5f8a0cfa3a874fa96c33731b8fcd141b3a upstream.

vdso32 should only be installed if CONFIG_COMPAT_VDSO is enabled,
since it's not even supposed to be compiled otherwise, and arm64
builds without a 32bit crosscompiler will fail.

Fixes: 8d75785a8142 ("ARM64: vdso32: Install vdso32 from vdso_install")
Signed-off-by: Frank van der Linden <fllinden@amazon.com>
Cc: stable@vger.kernel.org [5.4+]
Link: https://lore.kernel.org/r/20200827234012.19757-1-fllinden@amazon.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-03 11:27:05 +02:00
Marc Zyngier
2f4b202eb1 arm64: Allow booting of late CPUs affected by erratum 1418040
[ Upstream commit bf87bb0881d0f59181fe3bbcf29c609f36483ff8 ]

As we can now switch from a system that isn't affected by 1418040
to a system that globally is affected, let's allow affected CPUs
to come in at a later time.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200731173824.107480-3-maz@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-03 11:27:01 +02:00
Marc Zyngier
82b05f0838 arm64: Move handling of erratum 1418040 into C code
[ Upstream commit d49f7d7376d0c0daf8680984a37bd07581ac7d38 ]

Instead of dealing with erratum 1418040 on each entry and exit,
let's move the handling to __switch_to() instead, which has
several advantages:

- It can be applied when it matters (switching between 32 and 64
  bit tasks).
- It is written in C (yay!)
- It can rely on static keys rather than alternatives

Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20200731173824.107480-2-maz@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-03 11:27:01 +02:00
Kefeng Wang
da56eb03ea arm64: Fix __cpu_logical_map undefined issue
[ Upstream commit eaecca9e7710281be7c31d892c9f447eafd7ddd9 ]

The __cpu_logical_map undefined issue occued when the new
tegra194-cpufreq drvier building as a module.

ERROR: modpost: "__cpu_logical_map" [drivers/cpufreq/tegra194-cpufreq.ko] undefined!

The driver using cpu_logical_map() macro which will expand to
__cpu_logical_map, we can't access it in a drvier. Let's turn
cpu_logical_map() into a C wrapper and export it to fix the
build issue.

Also create a function set_cpu_logical_map(cpu, hwid) when assign
a value to cpu_logical_map(cpu).

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-03 11:26:49 +02:00
David Brazdil
653ae33b03 KVM: arm64: Fix symbol dependency in __hyp_call_panic_nvhe
[ Upstream commit b38b298aa4397e2dc74a89b4dd3eac9e59b64c96 ]

__hyp_call_panic_nvhe contains inline assembly which did not declare
its dependency on the __hyp_panic_string symbol.

The static-declared string has previously been kept alive because of a use in
__hyp_call_panic_vhe. Fix this in preparation for separating the source files
between VHE and nVHE when the two users land in two different compilation
units. The static variable otherwise gets dropped when compiling the nVHE
source file, causing an undefined symbol linker error later.

Signed-off-by: David Brazdil <dbrazdil@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200625131420.71444-2-dbrazdil@google.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-03 11:26:48 +02:00
Stephan Gerhold
88eb00cb39 arm64: dts: qcom: msm8916: Pull down PDM GPIOs during sleep
[ Upstream commit e2ee9edc282961783d519c760bbaa20fed4dec38 ]

The original qcom kernel changed the PDM GPIOs to be pull-down
during sleep at some point. Reportedly this was done because
there was some "leakage at PDM outputs during sleep":

  https://source.codeaurora.org/quic/la/kernel/msm-3.10/commit/?id=0f87e08c1cd3e6484a6f7fb3e74e37340bdcdee0

I cannot say how effective this is, but everything seems to work
fine with this change so let's apply the same to mainline just
to be sure.

Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200605185916.318494-3-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-03 11:26:42 +02:00
Shengjiu Wang
20ced450ac MLK-24311: arm64: dts: imx8mn-ddr4: Disable unused codec node
Only ak5558 can be supported on imx8mn + audio board.
others should be disabled.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Zhang <peng.zhang_8@nxp.com>
2020-09-01 18:17:26 +08:00
Joakim Zhang
1e43e235fb MLK-24613 arch: arm64: imx8mn: add ddr pmu device node
Add ddr pmu device node for i.MX8MN EVK.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
2020-09-02 01:56:27 +08:00
Shengjiu Wang
6d1676342d MLK-24557: arm64: imx8dxl-evk: Fix noise issue for mono channel
Disable the pull control for pad, otherwise the pull up or
pull down will cause the signal abnormal on TX line, then
there is noise.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Zhang <peng.zhang_8@nxp.com>
2020-09-01 16:38:57 +08:00
Shengjiu Wang
34fb0e106f MLK-24612-4: arm64: dts: imx8qm: Add specific esai devicetree
This devicetree is to enable two client device for ESAI,
each device is an independent device for user.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Zhang <peng.zhang_8@nxp.com>
2020-08-31 18:08:17 +08:00
Richard Zhu
4dd0357e1c MLK-24596 arm64: dts: imx8dxl-evk: add the property to fixed regulator
The "enable-active-high" property should be added when always on is
required by the fixed regulator.
Otherwise, the clk_ext_sel would be changed to low after the
initialization of the regulator is complete. And PCIe wouldn't
works well.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-08-31 16:06:40 +08:00
Fugang Duan
0f10fa52f0 MLK-24600 arm64: dts: imx8mq: add dma chans for uart ports
Add dma chans for uart ports, otherwise uart is in pio mode.

Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-08-28 16:56:27 +08:00
Will Deacon
e1818ffcca KVM: Pass MMU notifier range flags to kvm_unmap_hva_range()
commit fdfe7cbd58806522e799e2a50a15aee7f2cbb7b6 upstream.

The 'flags' field of 'struct mmu_notifier_range' is used to indicate
whether invalidate_range_{start,end}() are permitted to block. In the
case of kvm_mmu_notifier_invalidate_range_start(), this field is not
forwarded on to the architecture-specific implementation of
kvm_unmap_hva_range() and therefore the backend cannot sensibly decide
whether or not to block.

Add an extra 'flags' parameter to kvm_unmap_hva_range() so that
architectures are aware as to whether or not they are permitted to block.

Cc: <stable@vger.kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: James Morse <james.morse@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Message-Id: <20200811102725.7121-2-will@kernel.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-08-26 10:41:08 +02:00
Stephen Boyd
542a493c8c ARM64: vdso32: Install vdso32 from vdso_install
[ Upstream commit 8d75785a814241587802655cc33e384230744f0c ]

Add the 32-bit vdso Makefile to the vdso_install rule so that 'make
vdso_install' installs the 32-bit compat vdso when it is compiled.

Fixes: a7f71a2c89 ("arm64: compat: Add vDSO")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Link: https://lore.kernel.org/r/20200818014950.42492-1-swboyd@chromium.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-26 10:41:05 +02:00
Robert Chiras
4ee1ddfdce MLK-24334-9: arch: arm64: dts: imx8dxl: unify adma_lcdif
Currently, the adma_lcdif and it's related nodes are duplicated in 8qxp
and 8dxl dts files. Since it's the same subsystem, move these nodes into
generic files, so that both 8qxp and 8dxl dts files can use them.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
2020-08-21 15:32:12 +03:00
Robert Chiras
6024c8cbc3 MLK-24334-6: arch: arm64: dts: im8dxl: add lcdif dts file
Create the LCDIF to parallel display WKS 1010WX001 specific use-case dts file.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
2020-08-21 15:32:12 +03:00
Robert Chiras
771768df6b MLK-24334-7: arch: arm64: dts: imx8dxl: add lcdif nodes
Add the needed nodes to enable lcdif on inx8dxl.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
2020-08-21 15:32:12 +03:00
Robert Chiras
d24b728099 MLK-24334-6: arch: arm64: dts: imx8dxl: add adma_pwm subsystem nodes
Add the PWM nodes, needed by the LCDIF subsystem found in ADMA.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
2020-08-21 15:32:12 +03:00
Robert Chiras
722b2d2c44 MLK-24334-5: add panel WKS_101WX001 to imx_v8_defconfig
This patch builds WKS 101WX001 LCD panel driver by default, in
imx_v8_defconfig.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
2020-08-21 15:32:12 +03:00
Robert Chiras
4991b6c6b6 MLK-24334-4: arm64: defconfig: add panel WKS_101WX001 to defconfig
This patch builds WKS 101WX001 LCD panel driver by default.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
2020-08-21 15:32:12 +03:00
Tomasz Maciej Nowak
a202b42b94 arm64: dts: marvell: espressobin: add ethernet alias
commit 5253cb8c00a6f4356760efb38bca0e0393aa06de upstream.

The maker of this board and its variants, stores MAC address in U-Boot
environment. Add alias for bootloader to recognise, to which ethernet
node inject the factory MAC address.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
[pali: Backported to 5.4 and older versions]
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-08-21 13:05:39 +02:00
Shaokun Zhang
ab58cc0331 arm64: perf: Correct the event index in sysfs
commit 539707caa1a89ee4efc57b4e4231c20c46575ccc upstream.

When PMU event ID is equal or greater than 0x4000, it will be reduced
by 0x4000 and it is not the raw number in the sysfs. Let's correct it
and obtain the raw event ID.

Before this patch:
cat /sys/bus/event_source/devices/armv8_pmuv3_0/events/sample_feed
event=0x001
After this patch:
cat /sys/bus/event_source/devices/armv8_pmuv3_0/events/sample_feed
event=0x4001

Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/1592487344-30555-3-git-send-email-zhangshaokun@hisilicon.com
[will: fixed formatting of 'if' condition]
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-08-21 13:05:23 +02:00
Li Jun
3ec9529ad2 MLK-24527-7 arm64: dtsi: imx8mp: remove unused properties for usb
Since we use platform data for those quirks vi compatible string,
so remove those properties.

Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
2020-08-21 13:39:55 +08:00
Clark Wang
20b125692d LF-1165 ARM64: dts: imx8qm: fix lpspi cannot use dma mode issue
Add the lpspi dma channel definition in the edma2 node.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
2020-08-20 18:29:42 +08:00
Guoniu.zhou
75aedcb34e MLK-24524: arm64: imx_v8_defconfig: build imx8-media-dev.c as module
Build imx8-media-dev.c as module by default

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit 7f37a85d4950ec44f1de25d749455f22bb3d3b55)
2020-08-20 17:49:14 +08:00
Shengjiu Wang
66901fbbbc MLK-24523: arm64: dts: imx8mp-evk: enable the power of speaker
add "regulator-always-on" to enable the power of speaker

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-08-20 17:05:27 +08:00
Li Jun
f88f8c4d9b MLK-24507-6 arm64: dts: imx8mq-evk: add power supply for usb0 phy node
As usb0 is using typec, so add usb0 phy vbus power supply property
to get vbus status and set the BC charger type.

Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
2020-08-20 14:50:13 +08:00
Li Jun
99318a9518 MLK-24507-5 arm64: dts: imx8mp-evk: add power supply for usb0 phy node
As usb0 is using typec, so add usb0 phy vbus power supply property
to get vbus status and set the BC charger type.

Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
2020-08-20 14:50:13 +08:00
Adrian Alonso
9b011c5560 MLK-24512: dts: arm64: freescale: imx8mm ddr4 ab2 target support
Add support for imx8mm ddr4 audio board 2.0 target for
revision C and B; Include Cortex-M4 dts support

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
2020-08-19 09:03:43 -05:00
Adrian Alonso
26685b2244 MLK-24511: dts: arm64: freescale: imx8mm ab2: nhx3670 fw mem region
Reserve nhx3670 Cortex-M4 application and firmware memory
region use u-boot fit imxtract to load app and firmware
into DDR memory

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
2020-08-19 09:02:56 -05:00
Dong Hongting
b1b1660423 MLK-24443 dts: arm64: freescale: imx8mn ddr4 ab2 update to cpld s1 v3.6
Update SAI routing to follow CPLD s1 v3.6 for ak5552 ADC support

Signed-off-by: Dong Hongting <hongting.dong@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-08-19 08:29:21 -05:00
Dong Hongting
3fecbef38c MLK-24440: dts: arm64: freescale: imx8mn ddr4 ab2 Add usb otg node
Add usb otg node in imx8mn ddr4 ab2 dts

Signed-off-by: Dong Hongting <hongting.dong@nxp.com>
Reviewed-by: Adrian Alonso <adrian.alonso@nxp.com>
2020-08-19 08:19:20 -05:00
Ricardo Cañuelo
274f4e9c57 arm64: dts: hisilicon: hikey: fixes to comply with adi, adv7533 DT binding
[ Upstream commit bbe28fc3cbabbef781bcdf847615d52ce2e26e42 ]

hi3660-hikey960.dts:
  Define a 'ports' node for 'adv7533: adv7533@39' and the
  'adi,dsi-lanes' property to make it compliant with the adi,adv7533 DT
  binding.

  This fills the requirements to meet the binding requirements,
  remote endpoints are not defined.

hi6220-hikey.dts:
  Change property name s/pd-gpio/pd-gpios, gpio properties should be
  plural. This is just a cosmetic change.

Signed-off-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-19 08:16:01 +02:00
Alim Akhtar
4d7115d292 arm64: dts: exynos: Fix silent hang after boot on Espresso
[ Upstream commit b072714bfc0e42c984b8fd6e069f3ca17de8137a ]

Once regulators are disabled after kernel boot, on Espresso board silent
hang observed because of LDO7 being disabled.  LDO7 actually provide
power to CPU cores and non-cpu blocks circuitries.  Keep this regulator
always-on to fix this hang.

Fixes: 9589f7721e ("arm64: dts: Add S2MPS15 PMIC node on exynos7-espresso")
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-19 08:15:55 +02:00
Stephan Gerhold
34108464f8 arm64: dts: qcom: msm8916: Replace invalid bias-pull-none property
[ Upstream commit 1b6a1a162defe649c5599d661b58ac64bb6f31b6 ]

msm8916-pins.dtsi specifies "bias-pull-none" for most of the audio
pin configurations. This was likely copied from the qcom kernel fork
where the same property was used for these audio pins.

However, "bias-pull-none" actually does not exist at all - not in
mainline and not in downstream. I can only guess that the original
intention was to configure "no pull", i.e. bias-disable.

Change it to that instead.

Fixes: 143bb9ad85 ("arm64: dts: qcom: add audio pinctrls")
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200605185916.318494-2-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-19 08:15:54 +02:00
Heiko Stuebner
192b8516c9 arm64: dts: rockchip: fix rk3399-puma gmac reset gpio
[ Upstream commit 8a445086f8af0b7b9bd8d1901d6f306bb154f70d ]

The puma gmac node currently uses opposite active-values for the
gmac phy reset pin. The gpio-declaration uses active-high while the
separate snps,reset-active-low property marks the pin as active low.

While on the kernel side this works ok, other DT users may get
confused - as seen with uboot right now.

So bring this in line and make both properties match, similar to the
other Rockchip board.

Fixes: 2c66fc34e9 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20200603132836.362519-1-heiko@sntech.de
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-19 08:15:54 +02:00
Heiko Stuebner
da9dfd06db arm64: dts: rockchip: fix rk3399-puma vcc5v0-host gpio
[ Upstream commit 7a7184f6cfa9279f1a1c10a1845d247d7fad54ff ]

The puma vcc5v0_host regulator node currently uses opposite active-values
for the enable pin. The gpio-declaration uses active-high while the
separate enable-active-low property marks the pin as active low.

While on the kernel side this works ok, other DT users may get
confused - as seen with uboot right now.

So bring this in line and make both properties match, similar to the
gmac fix.

Fixes: 2c66fc34e9 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20200604091239.424318-1-heiko@sntech.de
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-19 08:15:54 +02:00
Heiko Stuebner
066f85458d arm64: dts: rockchip: fix rk3368-lion gmac reset gpio
[ Upstream commit 2300e6dab473e93181cf76e4fe6671aa3d24c57b ]

The lion gmac node currently uses opposite active-values for the
gmac phy reset pin. The gpio-declaration uses active-high while the
separate snps,reset-active-low property marks the pin as active low.

While on the kernel side this works ok, other DT users may get
confused - as seen with uboot right now.

So bring this in line and make both properties match, similar to the
other Rockchip board.

Fixes: d99a02bcfa ("arm64: dts: rockchip: add RK3368-uQ7 (Lion) SoM")
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20200607212909.920575-1-heiko@sntech.de
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-19 08:15:54 +02:00
Guoniu.zhou
ac222f5e1b MLK-24514-2: arm64: dts: imx8mp: remove csi-gpr2 property for mipi csi node
Remove csi-gpr2 property for mipi csi node due to no longer in use.

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit d71fb772f7cf7813962eb6921c58db6b38f74933)
2020-08-19 09:22:08 +08:00
Han Xu
cfd223f785 MLK-24505: arm64: dts: imx8dxl: change wrong machine info in dts
changed from EVK to VAL for imx8dxl DDR3 VAL board

Signed-off-by: Han Xu <han.xu@nxp.com>
2020-08-17 11:18:11 -05:00
Clark Wang
d6125908c4 MLK-24506 arm64: dts: imx8qm: update i2c nodes of lvds0/1
Fix the reg size of i2c1_lvds0/1 from 0x4000 to 0x1000.
Add i2c0_lvds0/1 nodes which are set disabled by default.

Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-08-17 15:04:37 +08:00
Guoniu.zhou
7fc883954e MLK-24494-8: arm64: dts: imx8mp: add new dts support for dual ov2775
Support dual ov2775, board don't need to rework

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
2020-08-14 17:03:12 +08:00
Guoniu.zhou
25a49739f0 MLK-24494-7: arm64: dts: imx8mp: add new dts for single Basler camera support
This patch is used for single basler camera based on reuse csi
driver and don't need to board rework.

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
2020-08-14 17:03:12 +08:00
Guoniu.zhou
195e1f3154 MLK-24494-6: arm64: dts: imx8mp: add new dts for basler + ov5640 support
Add dts for Basler + OV5640 for iMX865-EVK board. Basler camera
connect to CSI port 0 and OV5640 connect to CSI port 1, as bellow:
    Basler => CSI1
    OV5640 => CSI2
Don't need to board rework.

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
2020-08-14 17:03:12 +08:00
Guoniu.zhou
2ba13c94fe MLK-24494-5: arm64: dts: imx8mp: add dts for ov2775 and ov5640 support
Add dts for OV2775 + OV5640 for iMX865-EVK board. OV2775 connect to
CSI port 0 and OV5640 connect to CSI port 1, as bellow:
   OV2775 => CSI1
   OV5640 => CSI2
Board need to rework to support this feature. More info, please
refer to rework guide provided by NXP

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
2020-08-14 17:03:12 +08:00
Guoniu.zhou
a113fa0556 MLK-24494-3: arm64: dts: imx8mp: add single ov2775 support
This patch support single ov2775 based on NXP reuse csi driver,
don't need to board rework.

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
2020-08-14 17:03:12 +08:00
Guoniu.zhou
0c9d2135a0 MLK-24494-2: arm64: imx8mp.dtsi: add dwe node for dewarp of iMX8MP
Add dewarp device node for iMX8MP platform

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
2020-08-14 17:03:12 +08:00
Bing Song
ccc0ba865e MLK-24501-2 dsp: make sdcard non-removable when lpa.
Support sdcard removalbe will trigger MMC scan.
Suspend will cost long time by MMC scan. Disable MMC scan for lpa.

Signed-off-by: Bing Song <bing.song@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
2020-08-14 16:48:32 +08:00
Li Jun
491ede1e69 MLK-24206-1 arm64: dtsi: imx8mp: assign dwc3 core clocks to dwc3 core node
Move the dwc3 core clocks to core node to match the real logic so
remove a clock warning when dwc3 core driver probe, the glue layer
only need hsio clock for wakeup handling.

Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
2020-08-14 14:13:59 +08:00
Horia Geantă
7ef316d773 arm64: dts: imx8mq/mm/mn: add caam snvs clock
On i.MX8M* the snvs clock is mandatory cf. DT binding doc, add it.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Franck Lenormand <franck.lenormand@nxp.com>
2020-08-13 19:38:39 +03:00
Fugang Duan
66905b708e MLK-24493 arm64: dts: imx8dxl-evk: enable pcie on default dts
A1 chip already fix pcie issue, so enable pcie in imx8dxl-evk.dts,
and remove the extra file "*-pcie.dts".

Current BSP doesn't support A0 chip after the change.

Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-08-13 16:54:51 +08:00
Fugang Duan
7f9a947a93 MLK-24486-01 arm64: dts: imx8qm: add lpuart4 node
Add lpuart4 node for i.MX8QM.

Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-08-13 16:54:50 +08:00
Robin Gong
bab45f760b MLK-24483-3: arm64: dts: imx8mm: changed to imx51-ecspi type
Changed ecspi compatible name to imx51-ecspi instead of imx6ul-ecspi since
ERR009165 not fix on i.mx8mm.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Clark Wang <xiaoning.wang@nxp.com>
2020-08-11 23:29:08 +08:00
Robin Gong
14b77dc47b MLK-24483-2: arm64: dts: imx8mq: changed to imx51-ecspi type
Changed ecspi compatible name to imx51-ecspi instead of imx6ul-ecspi since
ERR009165 not fix on i.mx8mq.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Clark Wang <xiaoning.wang@nxp.com>
2020-08-11 23:29:08 +08:00
Marc Zyngier
6330b0cb2a arm64: Workaround circular dependency in pointer_auth.h
With the backport of f227e3ec3b5c ("random32: update the net random
state on interrupt and activity") and its associated fixes, the
arm64 build explodes early:

In file included from ../include/linux/smp.h:67,
                  from ../include/linux/percpu.h:7,
                  from ../include/linux/prandom.h:12,
                  from ../include/linux/random.h:118,
                  from ../arch/arm64/include/asm/pointer_auth.h:6,
                  from ../arch/arm64/include/asm/processor.h:39,
                  from ../include/linux/mutex.h:19,
                  from ../include/linux/kernfs.h:12,
                  from ../include/linux/sysfs.h:16,
                  from ../include/linux/kobject.h:20,
                  from ../include/linux/of.h:17,
                  from ../include/linux/irqdomain.h:35,
                  from ../include/linux/acpi.h:13,
                  from ../include/acpi/apei.h:9,
                  from ../include/acpi/ghes.h:5,
                  from ../include/linux/arm_sdei.h:8,
                  from ../arch/arm64/kernel/asm-offsets.c:10:
../arch/arm64/include/asm/smp.h💯29: error: field ‘ptrauth_key’ has
incomplete type

This is due to struct ptrauth_keys_kernel not being defined before
we transitively include asm/smp.h from linux/random.h.

Paper over it by moving the inclusion of linux/random.h *after* the
type has been defined.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-08-07 09:34:01 +02:00
Robin Murphy
3bb2f52ad9 arm64: csum: Fix handling of bad packets
[ Upstream commit 05fb3dbda187bbd9cc1cd0e97e5d6595af570ac6 ]

Although iph is expected to point to at least 20 bytes of valid memory,
ihl may be bogus, for example on reception of a corrupt packet. If it
happens to be less than 5, we really don't want to run away and
dereference 16GB worth of memory until it wraps back to exactly zero...

Fixes: 0e455d8e80 ("arm64: Implement optimised IP checksum helpers")
Reported-by: guodeqing <geffrey.guo@huawei.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-05 09:59:48 +02:00
Sami Tolvanen
8a90b436a0 arm64/alternatives: move length validation inside the subsection
[ Upstream commit 966a0acce2fca776391823381dba95c40e03c339 ]

Commit f7b93d42945c ("arm64/alternatives: use subsections for replacement
sequences") breaks LLVM's integrated assembler, because due to its
one-pass design, it cannot compute instruction sequence lengths before the
layout for the subsection has been finalized. This change fixes the build
by moving the .org directives inside the subsection, so they are processed
after the subsection layout is known.

Fixes: f7b93d42945c ("arm64/alternatives: use subsections for replacement sequences")
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>
Link: https://github.com/ClangBuiltLinux/linux/issues/1078
Link: https://lore.kernel.org/r/20200730153701.3892953-1-samitolvanen@google.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-05 09:59:48 +02:00
Guoniu.zhou
a22f0ab104 LF-1409-09: arm64: configs: imx_v8_defconfig: enable iMX8 camera
Add nine variables as bellow to enable camera related driver for
iMX8QXP, QM, MN and MP platform

CONFIG_IMX8_MEDIA_DEVICE
CONFIG_IMX8_ISI_HW
CONFIG_IMX8_ISI_CORE
CONFIG_IMX8_ISI_CAPTURE
CONFIG_IMX8_ISI_M2M
CONFIG_IMX8_MIPI_CSI2
CONFIG_IMX8_MIPI_CSI2_SAM
CONFIG_IMX8_PARALLEL_CSI
CONFIG_GMSL_MAX9286

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
2020-07-31 16:34:24 +08:00
Shengjiu Wang
51ec3c5adf MLK-24444-3: arm64: dts: imx8mp-evk-dsp: Fix the confliction for uart
uart4 is used for debug purpose when dsp is used, disabled the uart4 node
for the access conflication in uart driver and dsp firmware.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-07-30 09:54:18 +08:00
Shengjiu Wang
c989fbb675 MLK-24444-2: arm64: dts: imx8qxp-mek-dsp: Configure lpuart for debug
On imx8qxp-mek, the RS232 interface is used for debugging dsp firmware.
So dedicately configure lpuart in this dtb.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-07-30 09:54:13 +08:00
Will Deacon
679fe09188 arm64: Use test_tsk_thread_flag() for checking TIF_SINGLESTEP
[ Upstream commit 5afc78551bf5d53279036e0bf63314e35631d79f ]

Rather than open-code test_tsk_thread_flag() at each callsite, simply
replace the couple of offenders with calls to test_tsk_thread_flag()
directly.

Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-29 10:18:40 +02:00
Fugang Duan
44d48993b9 MLK-24435 arm64: dts: imx8mq-evk: enable bt hsp for nxp 88w8987/88w8997
Enable nxp 88w8987/nxp8997 bluetooth HSP for imx8mq evk board.

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-07-24 11:17:46 +08:00
Fugang Duan
3da0dac0f0 MLK-24436 arm64: dts: imx8: select bt-sco-pcm-wb to support nbs and wbs
Select bt-sco-pcm-wb codec dai in default to support HFP
nbs and wbs for nxp 88w8997 and 88w8987 chips.

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-07-24 11:17:45 +08:00
Will Deacon
5c2450ac7c arm64: compat: Ensure upper 32 bits of x0 are zero on syscall return
commit 15956689a0e60aa0c795174f3c310b60d8794235 upstream.

Although we zero the upper bits of x0 on entry to the kernel from an
AArch32 task, we do not clear them on the exception return path and can
therefore expose 64-bit sign extended syscall return values to userspace
via interfaces such as the 'perf_regs' ABI, which deal exclusively with
64-bit registers.

Explicitly clear the upper 32 bits of x0 on return from a compat system
call.

Cc: <stable@vger.kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Keno Fischer <keno@juliacomputing.com>
Cc: Luis Machado <luis.machado@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-22 09:33:16 +02:00
Will Deacon
ed766e740c arm64: ptrace: Consistently use pseudo-singlestep exceptions
commit ac2081cdc4d99c57f219c1a6171526e0fa0a6fff upstream.

Although the arm64 single-step state machine can be fast-forwarded in
cases where we wish to generate a SIGTRAP without actually executing an
instruction, this has two major limitations outside of simply skipping
an instruction due to emulation.

1. Stepping out of a ptrace signal stop into a signal handler where
   SIGTRAP is blocked. Fast-forwarding the stepping state machine in
   this case will result in a forced SIGTRAP, with the handler reset to
   SIG_DFL.

2. The hardware implicitly fast-forwards the state machine when executing
   an SVC instruction for issuing a system call. This can interact badly
   with subsequent ptrace stops signalled during the execution of the
   system call (e.g. SYSCALL_EXIT or seccomp traps), as they may corrupt
   the stepping state by updating the PSTATE for the tracee.

Resolve both of these issues by injecting a pseudo-singlestep exception
on entry to a signal handler and also on return to userspace following a
system call.

Cc: <stable@vger.kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Tested-by: Luis Machado <luis.machado@linaro.org>
Reported-by: Keno Fischer <keno@juliacomputing.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-22 09:33:16 +02:00
Will Deacon
bdb7113299 arm64: ptrace: Override SPSR.SS when single-stepping is enabled
commit 3a5a4366cecc25daa300b9a9174f7fdd352b9068 upstream.

Luis reports that, when reverse debugging with GDB, single-step does not
function as expected on arm64:

  | I've noticed, under very specific conditions, that a PTRACE_SINGLESTEP
  | request by GDB won't execute the underlying instruction. As a consequence,
  | the PC doesn't move, but we return a SIGTRAP just like we would for a
  | regular successful PTRACE_SINGLESTEP request.

The underlying problem is that when the CPU register state is restored
as part of a reverse step, the SPSR.SS bit is cleared and so the hardware
single-step state can transition to the "active-pending" state, causing
an unexpected step exception to be taken immediately if a step operation
is attempted.

In hindsight, we probably shouldn't have exposed SPSR.SS in the pstate
accessible by the GPR regset, but it's a bit late for that now. Instead,
simply prevent userspace from configuring the bit to a value which is
inconsistent with the TIF_SINGLESTEP state for the task being traced.

Cc: <stable@vger.kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Keno Fischer <keno@juliacomputing.com>
Link: https://lore.kernel.org/r/1eed6d69-d53d-9657-1fc9-c089be07f98c@linaro.org
Reported-by: Luis Machado <luis.machado@linaro.org>
Tested-by: Luis Machado <luis.machado@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-22 09:33:16 +02:00
Krzysztof Kozlowski
c5acd9395d arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
[ Upstream commit 681a5c71fb829fc2193e3bb524af41525477f5c3 ]

Fix dtschema validator warnings like:
    intc@fffc1000: $nodename:0:
        'intc@fffc1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Fixes: 78cd6a9d8e ("arm64: dts: Add base stratix 10 dtsi")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-22 09:33:04 +02:00
Neil Armstrong
b2c7d6ce2d arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
[ Upstream commit b2037dafcf082cd24b88ae9283af628235df36e1 ]

When starting at 744MHz, the Mali 450 core crashes on S805X based boards:
 lima d00c0000.gpu: IRQ ppmmu3 not found
 lima d00c0000.gpu: IRQ ppmmu4 not found
 lima d00c0000.gpu: IRQ ppmmu5 not found
 lima d00c0000.gpu: IRQ ppmmu6 not found
 lima d00c0000.gpu: IRQ ppmmu7 not found
 Internal error: synchronous external abort: 96000210 [#1] PREEMPT SMP
 Modules linked in:
 CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.7.2+ #492
 Hardware name: Libre Computer AML-S805X-AC (DT)
 pstate: 40000005 (nZcv daif -PAN -UAO)
 pc : lima_gp_init+0x28/0x188
 ...
 Call trace:
  lima_gp_init+0x28/0x188
  lima_device_init+0x334/0x534
  lima_pdev_probe+0xa4/0xe4
 ...
 Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

Reverting to a safer 666Mhz frequency on the S805X that doesn't use the
GP0 PLL makes it more stable.

Fixes: fd47716479 ("ARM64: dts: add S805X based P241 board")
Fixes: 0449b8e371 ("arm64: dts: meson: add libretech aml-s805x-ac board")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200618132737.14243-1-narmstrong@baylibre.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-22 09:33:01 +02:00
Jerome Brunet
cbd8c92a8d arm64: dts: meson: add missing gxl rng clock
[ Upstream commit 95ca6f06dd4827ff63be5154120c7a8511cd9a41 ]

The peripheral clock of the RNG is missing for gxl while it is present
for gxbb.

Fixes: 1b3f6d1486 ("ARM64: dts: meson-gx: add clock CLKID_RNG0 to hwrng node")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200617125346.1163527-1-jbrunet@baylibre.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-22 09:33:01 +02:00
Neil Armstrong
d09e12709a arm64: dts: g12-common: add parkmode_disable_ss_quirk on DWC3 controller
[ Upstream commit a81bcfb6ac20cdd2e8dec3da14c8bbe1d18f6321 ]

When high load on the DWC3 SuperSpeed port, the controller crashes with:
[  221.141621] xhci-hcd xhci-hcd.0.auto: xHCI host not responding to stop endpoint command.
[  221.157631] xhci-hcd xhci-hcd.0.auto: Host halt failed, -110
[  221.157635] xhci-hcd xhci-hcd.0.auto: xHCI host controller not responding, assume dead
[  221.159901] xhci-hcd xhci-hcd.0.auto: xHCI host not responding to stop endpoint command.
[  221.159961] hub 2-1.1:1.0: hub_ext_port_status failed (err = -22)
[  221.160076] xhci-hcd xhci-hcd.0.auto: HC died; cleaning up
[  221.165946] usb 2-1.1-port1: cannot reset (err = -22)

Setting the parkmode_disable_ss_quirk quirk fixes the issue.

Reported-by: Tim <elatllat@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Cc: Jianxin Pan <jianxin.pan@amlogic.com>
CC: Dongjin Kim <tobetter@gmail.com>
Link: https://lore.kernel.org/r/20200221091532.8142-4-narmstrong@baylibre.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-22 09:32:58 +02:00
Ard Biesheuvel
4c7924060f arm64/alternatives: don't patch up internal branches
[ Upstream commit 5679b28142193a62f6af93249c0477be9f0c669b ]

Commit f7b93d42945c ("arm64/alternatives: use subsections for replacement
sequences") moved the alternatives replacement sequences into subsections,
in order to keep the as close as possible to the code that they replace.

Unfortunately, this broke the logic in branch_insn_requires_update,
which assumed that any branch into kernel executable code was a branch
that required updating, which is no longer the case now that the code
sequences that are patched in are in the same section as the patch site
itself.

So the only way to discriminate branches that require updating and ones
that don't is to check whether the branch targets the replacement sequence
itself, and so we can drop the call to kernel_text_address() entirely.

Fixes: f7b93d42945c ("arm64/alternatives: use subsections for replacement sequences")
Reported-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Alexandru Elisei <alexandru.elisei@arm.com>
Link: https://lore.kernel.org/r/20200709125953.30918-1-ardb@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-22 09:32:53 +02:00
Ard Biesheuvel
a8f13826f9 arm64/alternatives: use subsections for replacement sequences
[ Upstream commit f7b93d42945cc71e1346dd5ae07c59061d56745e ]

When building very large kernels, the logic that emits replacement
sequences for alternatives fails when relative branches are present
in the code that is emitted into the .altinstr_replacement section
and patched in at the original site and fixed up. The reason is that
the linker will insert veneers if relative branches go out of range,
and due to the relative distance of the .altinstr_replacement from
the .text section where its branch targets usually live, veneers
may be emitted at the end of the .altinstr_replacement section, with
the relative branches in the sequence pointed at the veneers instead
of the actual target.

The alternatives patching logic will attempt to fix up the branch to
point to its original target, which will be the veneer in this case,
but given that the patch site is likely to be far away as well, it
will be out of range and so patching will fail. There are other cases
where these veneers are problematic, e.g., when the target of the
branch is in .text while the patch site is in .init.text, in which
case putting the replacement sequence inside .text may not help either.

So let's use subsections to emit the replacement code as closely as
possible to the patch site, to ensure that veneers are only likely to
be emitted if they are required at the patch site as well, in which
case they will be in range for the replacement sequence both before
and after it is transported to the patch site.

This will prevent alternative sequences in non-init code from being
released from memory after boot, but this is tolerable given that the
entire section is only 512 KB on an allyesconfig build (which weighs in
at 500+ MB for the entire Image). Also, note that modules today carry
the replacement sequences in non-init sections as well, and any of
those that target init code will be emitted into init sections after
this change.

This fixes an early crash when booting an allyesconfig kernel on a
system where any of the alternatives sequences containing relative
branches are activated at boot (e.g., ARM64_HAS_PAN on TX2)

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Dave P Martin <dave.martin@arm.com>
Link: https://lore.kernel.org/r/20200630081921.13443-1-ardb@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-22 09:32:53 +02:00
Marc Zyngier
86e3c7c70c arm64: arch_timer: Allow an workaround descriptor to disable compat vdso
commit c1fbec4ac0d701f350a581941d35643d5a9cd184 upstream.

As we are about to disable the vdso for compat tasks in some circumstances,
let's allow a workaround descriptor to express exactly that.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200706163802.1836732-3-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-22 09:32:50 +02:00
Marc Zyngier
71d65a3fc6 arm64: Introduce a way to disable the 32bit vdso
commit 97884ca8c2925d14c32188e865069f21378b4b4f upstream.

[this is a redesign rather than a backport]

We have a class of errata (grouped under the ARM64_WORKAROUND_1418040
banner) that force the trapping of counter access from 32bit EL0.

We would normally disable the whole vdso for such defect, except that
it would disable it for 64bit userspace as well, which is a shame.

Instead, add a new vdso_clock_mode, which signals that the vdso
isn't usable for compat tasks.  This gets checked in the new
vdso_clocksource_ok() helper, now provided for the 32bit vdso.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200706163802.1836732-2-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-22 09:32:50 +02:00
Adrian Alonso
b13f65c205 MLK-24424: dts: arm64: freescale: imx8mm evk 8mic swpdm fixed mclk
Enable fixed-mclk feature on imx-swpdm this allows to
have exact divide ratios for clocking configuration
for SAI mclk and bitclk this improves performance for
voice applications.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-07-20 11:02:57 -05:00
Adrian Alonso
e48d080636 MLK-24421: dts: arm64: freescale: imx8mm evk 8mic swpdm dmas
Set dmas transfer type for SAI5 to support swpdm
multichannel interleave streams, set sai5_clk_root
to 24576000Hz

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-07-20 11:02:05 -05:00
Fabio Estevam
0cd745bc3c
MLK-24374-2 arm64: dts: imx8qm: Move USBH1 to imx8qm-ss-conn
Commit ee96e9f815 ("MLK-24368-1 arm64: dts: imx8qm: Add support for USBH1")
caused i.MX8DXL USB PHYs to not go into low power mode via runtime suspend.

Fix it by moving the usbh1, usbmisc2 and usbphynop2 to the specific
imx8qm-ss-conn.dtsi file.

While at it, change the usbphynop2 status as disabled.

Reviewed-by: Jun Li <jun.li@nxp.com>
Tested-by: Sebastien Haezebrouck <sebastien.haezebrouck@nxp.com>
Reported-by: Sebastien Haezebrouck <sebastien.haezebrouck@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
2020-07-17 15:00:56 +08:00
Adrian Alonso
910929b767 MLK-24403: dts: arm64: freescale: imx8mm ab2 update to cpld s1 v3.4
Update SAI routing options to match CPLD firmware version:
ab2_s1_v3.4_20200630

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-07-16 11:47:47 -05:00
Adrian Alonso
50f99dde5d MLK-24402: dts: arm64: freescale: imx8mm ab2 add enet phy irq gpio
Add enet phy interrupt gpio pad, fixes unknown state on
CPLD IMXPMN_ENET_INT_B port.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-07-16 11:47:19 -05:00
Adrian Alonso
4c7c5f4c71 MLK-24401: dts: arm64: freescale: imx8mm ab2 fixed regulators
Use fixed regulators for power boot seqeunce
Set VDD_5V0 regulator to boot-on, always-on

BUCK5 (VDD_1V8) - pmic
    ANA_12V0
        ADC_DVDD_3V3
        ADC_AVDD_5V0
        DAC_DVDD_3V3
        DAC_AVDD_5V0
    VDD_5V0
        CPH_3V3
            CPH_1V8

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-07-16 11:46:38 -05:00
Adrian Alonso
e212c7f29e MLK-24400: dts: arm64: freescale: imx8mm ab2 cm4 support
Enable Cortex-M4 for NHX3670 BLE support on AB2 target

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-07-16 11:46:02 -05:00
Steven Price
79aaeec712 KVM: arm64: Fix kvm_reset_vcpu() return code being incorrect with SVE
If SVE is enabled then 'ret' can be assigned the return value of
kvm_vcpu_enable_sve() which may be 0 causing future "goto out" sites to
erroneously return 0 on failure rather than -EINVAL as expected.

Remove the initialisation of 'ret' and make setting the return value
explicit to avoid this situation in the future.

Fixes: 9a3cdf26e3 ("KVM: arm64/sve: Allow userspace to enable SVE for vcpus")
Cc: stable@vger.kernel.org
Reported-by: James Morse <james.morse@arm.com>
Signed-off-by: Steven Price <steven.price@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200617105456.28245-1-steven.price@arm.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-16 08:16:44 +02:00
Alexandru Elisei
3884294986 KVM: arm64: Annotate hyp NMI-related functions as __always_inline
commit 7733306bd593c737c63110175da6c35b4b8bb32c upstream.

The "inline" keyword is a hint for the compiler to inline a function.  The
functions system_uses_irq_prio_masking() and gic_write_pmr() are used by
the code running at EL2 on a non-VHE system, so mark them as
__always_inline to make sure they'll always be part of the .hyp.text
section.

This fixes the following splat when trying to run a VM:

[   47.625273] Kernel panic - not syncing: HYP panic:
[   47.625273] PS:a00003c9 PC:0000ca0b42049fc4 ESR:86000006
[   47.625273] FAR:0000ca0b42049fc4 HPFAR:0000000010001000 PAR:0000000000000000
[   47.625273] VCPU:0000000000000000
[   47.647261] CPU: 1 PID: 217 Comm: kvm-vcpu-0 Not tainted 5.8.0-rc1-ARCH+ #61
[   47.654508] Hardware name: Globalscale Marvell ESPRESSOBin Board (DT)
[   47.661139] Call trace:
[   47.663659]  dump_backtrace+0x0/0x1cc
[   47.667413]  show_stack+0x18/0x24
[   47.670822]  dump_stack+0xb8/0x108
[   47.674312]  panic+0x124/0x2f4
[   47.677446]  panic+0x0/0x2f4
[   47.680407] SMP: stopping secondary CPUs
[   47.684439] Kernel Offset: disabled
[   47.688018] CPU features: 0x240402,20002008
[   47.692318] Memory Limit: none
[   47.695465] ---[ end Kernel panic - not syncing: HYP panic:
[   47.695465] PS:a00003c9 PC:0000ca0b42049fc4 ESR:86000006
[   47.695465] FAR:0000ca0b42049fc4 HPFAR:0000000010001000 PAR:0000000000000000
[   47.695465] VCPU:0000000000000000 ]---

The instruction abort was caused by the code running at EL2 trying to fetch
an instruction which wasn't mapped in the EL2 translation tables. Using
objdump showed the two functions as separate symbols in the .text section.

Fixes: 85738e05dc ("arm64: kvm: Unmask PMR before entering guest")
Cc: stable@vger.kernel.org
Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: James Morse <james.morse@arm.com>
Link: https://lore.kernel.org/r/20200618171254.1596055-1-alexandru.elisei@arm.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-16 08:16:43 +02:00
Andrew Scull
b956ec9afc KVM: arm64: Stop clobbering x0 for HVC_SOFT_RESTART
commit b9e10d4a6c9f5cbe6369ce2c17ebc67d2e5a4be5 upstream.

HVC_SOFT_RESTART is given values for x0-2 that it should installed
before exiting to the new address so should not set x0 to stub HVC
success or failure code.

Fixes: af42f20480 ("arm64: hyp-stub: Zero x0 on successful stub handling")
Cc: stable@vger.kernel.org
Signed-off-by: Andrew Scull <ascull@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200706095259.1338221-1-ascull@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-16 08:16:43 +02:00
Will Deacon
a20aa35b83 KVM: arm64: Fix definition of PAGE_HYP_DEVICE
commit 68cf617309b5f6f3a651165f49f20af1494753ae upstream.

PAGE_HYP_DEVICE is intended to encode attribute bits for an EL2 stage-1
pte mapping a device. Unfortunately, it includes PROT_DEVICE_nGnRE which
encodes attributes for EL1 stage-1 mappings such as UXN and nG, which are
RES0 for EL2, and DBM which is meaningless as TCR_EL2.HD is not set.

Fix the definition of PAGE_HYP_DEVICE so that it doesn't set RES0 bits
at EL2.

Acked-by: Marc Zyngier <maz@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200708162546.26176-1-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-16 08:16:43 +02:00
Wei Li
06cee3572e arm64: kgdb: Fix single-step exception handling oops
[ Upstream commit 8523c006264df65aac7d77284cc69aac46a6f842 ]

After entering kdb due to breakpoint, when we execute 'ss' or 'go' (will
delay installing breakpoints, do single-step first), it won't work
correctly, and it will enter kdb due to oops.

It's because the reason gotten in kdb_stub() is not as expected, and it
seems that the ex_vector for single-step should be 0, like what arch
powerpc/sh/parisc has implemented.

Before the patch:
Entering kdb (current=0xffff8000119e2dc0, pid 0) on processor 0 due to Keyboard Entry
[0]kdb> bp printk
Instruction(i) BP #0 at 0xffff8000101486cc (printk)
    is enabled   addr at ffff8000101486cc, hardtype=0 installed=0

[0]kdb> g

/ # echo h > /proc/sysrq-trigger

Entering kdb (current=0xffff0000fa878040, pid 266) on processor 3 due to Breakpoint @ 0xffff8000101486cc
[3]kdb> ss

Entering kdb (current=0xffff0000fa878040, pid 266) on processor 3 Oops: (null)
due to oops @ 0xffff800010082ab8
CPU: 3 PID: 266 Comm: sh Not tainted 5.7.0-rc4-13839-gf0e5ad491718 #6
Hardware name: linux,dummy-virt (DT)
pstate: 00000085 (nzcv daIf -PAN -UAO)
pc : el1_irq+0x78/0x180
lr : __handle_sysrq+0x80/0x190
sp : ffff800015003bf0
x29: ffff800015003d20 x28: ffff0000fa878040
x27: 0000000000000000 x26: ffff80001126b1f0
x25: ffff800011b6a0d8 x24: 0000000000000000
x23: 0000000080200005 x22: ffff8000101486cc
x21: ffff800015003d30 x20: 0000ffffffffffff
x19: ffff8000119f2000 x18: 0000000000000000
x17: 0000000000000000 x16: 0000000000000000
x15: 0000000000000000 x14: 0000000000000000
x13: 0000000000000000 x12: 0000000000000000
x11: 0000000000000000 x10: 0000000000000000
x9 : 0000000000000000 x8 : ffff800015003e50
x7 : 0000000000000002 x6 : 00000000380b9990
x5 : ffff8000106e99e8 x4 : ffff0000fadd83c0
x3 : 0000ffffffffffff x2 : ffff800011b6a0d8
x1 : ffff800011b6a000 x0 : ffff80001130c9d8
Call trace:
 el1_irq+0x78/0x180
 printk+0x0/0x84
 write_sysrq_trigger+0xb0/0x118
 proc_reg_write+0xb4/0xe0
 __vfs_write+0x18/0x40
 vfs_write+0xb0/0x1b8
 ksys_write+0x64/0xf0
 __arm64_sys_write+0x14/0x20
 el0_svc_common.constprop.2+0xb0/0x168
 do_el0_svc+0x20/0x98
 el0_sync_handler+0xec/0x1a8
 el0_sync+0x140/0x180

[3]kdb>

After the patch:
Entering kdb (current=0xffff8000119e2dc0, pid 0) on processor 0 due to Keyboard Entry
[0]kdb> bp printk
Instruction(i) BP #0 at 0xffff8000101486cc (printk)
    is enabled   addr at ffff8000101486cc, hardtype=0 installed=0

[0]kdb> g

/ # echo h > /proc/sysrq-trigger

Entering kdb (current=0xffff0000fa852bc0, pid 268) on processor 0 due to Breakpoint @ 0xffff8000101486cc
[0]kdb> g

Entering kdb (current=0xffff0000fa852bc0, pid 268) on processor 0 due to Breakpoint @ 0xffff8000101486cc
[0]kdb> ss

Entering kdb (current=0xffff0000fa852bc0, pid 268) on processor 0 due to SS trap @ 0xffff800010082ab8
[0]kdb>

Fixes: 44679a4f14 ("arm64: KGDB: Add step debugging support")
Signed-off-by: Wei Li <liwei391@huawei.com>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200509214159.19680-2-liwei391@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-07-16 08:16:40 +02:00
Bing Song
e449166808 MLK-24365-9 dts: codec: support lpa in audio codec.
Audio codec need ignore suspend/resume for LPA.

Signed-off-by: Bing Song <bing.song@nxp.com>
2020-07-10 16:48:12 +08:00
Bing Song
396def6370 MLK-24365-3 dts: dsp: imx8mp: add dts for lpa
The DTS is for i.MX8MP DSP offload audio playback. DSP only use OCRAM
and OCRAM_A when audio playback, so DRAM can enter retention mode to
save Power. As the size limitation of OCRAM and OCRAM_A and the size
audio decoder library, the LPA playback only can support MP3 and AAC.
OCRAM address is 0x900000-0x990000. ATF will use 0x960000-0x980000.
DSP LPA will use ocram(0x900000-0x960000) and ocram_e(0x980000-
0x990000)

Signed-off-by: Bing Song <bing.song@nxp.com>
2020-07-10 16:48:11 +08:00
Bing Song
7abd5e8287 MLK-24365-1 dts: dsp: manage audiomix clock in dsp driver.
IMX8MP_CLK_AUDIO_ROOT and IMX8MP_CLK_AUDIO_AXI_DIV will be gated when
suspend even if dsp driver ignored suspend when low power audio offload
playback. The root cause is the two clocks is controlled when audiomix
power on/off. Add the two clocks in dsp driver, so driver will add
one ref count when useing dsp, so the two clocks don't be gated when
A core suspend during low power audio playback.

Signed-off-by: Bing Song <bing.song@nxp.com>
2020-07-10 16:48:11 +08:00
Jacky Bai
97b5de8b94 MLK-24383 arm64: dts: freescale: Change the noc clock setting for imx8mq
Change the NOC clock source to system pll1_800m and set the
noc frequency to 800m by default.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
2020-07-07 16:30:25 +08:00
Peter Chen
d2662861b7
MLK-24368-3 ARM64: configs: imx_v8_defconfig: enable CONFIG_USB_UAS
It is useful to support UAS storage device, and both our USB3 controllers
could support it.

Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
2020-07-05 10:32:23 +08:00
Alifer Moraes
ee96e9f815
MLK-24368-1 arm64: dts: imx8qm: Add support for USBH1
Add support for USBH1 on imx8qm, USBH1 is a HSIC controller

Reviewed-by: Jun Li <jun.li@nxp.com>
CC: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Alifer Moraes <alifer.moraes@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
2020-07-05 10:31:57 +08:00
Robin Gong
c036eb65fd arm64: dts: imx8mn-ddr4-evk: correct ldo1/ldo2 voltage range
commit cfb12c8952f617df58d73d24161e539a035d82b0 upstream.

Correct ldo1 voltage range from wrong high group(3.0V~3.3V) to low group
(1.6V~1.9V) because the ldo1 should be 1.8V. Actually, two voltage groups
have been supported at bd718x7-regulator driver, hence, just corrrect the
voltage range to 1.6V~3.3V. For ldo2@0.8V, correct voltage range too.
Otherwise, ldo1 would be kept @3.0V and ldo2@0.9V which violate i.mx8mn
datasheet as the below warning log in kernel:

[    0.995524] LDO1: Bringing 1800000uV into 3000000-3000000uV
[    0.999196] LDO2: Bringing 800000uV into 900000-900000uV

Fixes: 3e44dd0973 ("arm64: dts: imx8mn-ddr4-evk: Add rohm,bd71847 PMIC support")
Cc: stable@vger.kernel.org
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-06-30 15:37:10 -04:00
Robin Gong
90bd9c611f arm64: dts: imx8mm-evk: correct ldo1/ldo2 voltage range
commit 4fd6b5735c03c0955d93960d31f17d7144f5578f upstream.

Correct ldo1 voltage range from wrong high group(3.0V~3.3V) to low group
(1.6V~1.9V) because the ldo1 should be 1.8V. Actually, two voltage groups
have been supported at bd718x7-regulator driver, hence, just corrrect the
voltage range to 1.6V~3.3V. For ldo2@0.8V, correct voltage range too.
Otherwise, ldo1 would be kept @3.0V and ldo2@0.9V which violate i.mx8mm
datasheet as the below warning log in kernel:

[    0.995524] LDO1: Bringing 1800000uV into 3000000-3000000uV
[    0.999196] LDO2: Bringing 800000uV into 900000-900000uV

Fixes: 78cc25fa26 ("arm64: dts: imx8mm-evk: Add BD71847 PMIC")
Cc: stable@vger.kernel.org
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-06-30 15:37:10 -04:00
Jiping Ma
73f79b420b arm64: perf: Report the PC value in REGS_ABI_32 mode
commit 8dfe804a4031ca6ba3a3efb2048534249b64f3a5 upstream.

A 32-bit perf querying the registers of a compat task using REGS_ABI_32
will receive zeroes from w15, when it expects to find the PC.

Return the PC value for register dwarf register 15 when returning register
values for a compat task to perf.

Cc: <stable@vger.kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Jiping Ma <jiping.ma2@windriver.com>
Link: https://lore.kernel.org/r/1589165527-188401-1-git-send-email-jiping.ma2@windriver.com
[will: Shuffled code and added a comment]
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-06-30 15:37:10 -04:00
Will Deacon
cbed4eb0a9 arm64: sve: Fix build failure when ARM64_SVE=y and SYSCTL=n
[ Upstream commit e575fb9e76c8e33440fb859572a8b7d430f053d6 ]

When I squashed the 'allnoconfig' compiler warning about the
set_sve_default_vl() function being defined but not used in commit
1e570f512cbd ("arm64/sve: Eliminate data races on sve_default_vl"), I
accidentally broke the build for configs where ARM64_SVE is enabled, but
SYSCTL is not.

Fix this by only compiling the SVE sysctl support if both CONFIG_SVE=y
and CONFIG_SYSCTL=y.

Cc: Dave Martin <Dave.Martin@arm.com>
Reported-by: Qian Cai <cai@lca.pw>
Link: https://lore.kernel.org/r/20200616131808.GA1040@lca.pw
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-30 15:37:05 -04:00
Will Deacon
81344ae52c arm64: hw_breakpoint: Don't invoke overflow handler on uaccess watchpoints
[ Upstream commit 24ebec25fb270100e252b19c288e21bd7d8cc7f7 ]

Unprivileged memory accesses generated by the so-called "translated"
instructions (e.g. STTR) at EL1 can cause EL0 watchpoints to fire
unexpectedly if kernel debugging is enabled. In such cases, the
hw_breakpoint logic will invoke the user overflow handler which will
typically raise a SIGTRAP back to the current task. This is futile when
returning back to the kernel because (a) the signal won't have been
delivered and (b) userspace can't handle the thing anyway.

Avoid invoking the user overflow handler for watchpoints triggered by
kernel uaccess routines, and instead single-step over the faulting
instruction as we would if no overflow handler had been installed.

(Fixes tag identifies the introduction of unprivileged memory accesses,
 which exposed this latent bug in the hw_breakpoint code)

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Fixes: 57f4959bad ("arm64: kernel: Add support for User Access Override")
Reported-by: Luis Machado <luis.machado@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:47 +02:00
Vidya Sagar
a7ba81f26d arm64: tegra: Fix flag for 64-bit resources in 'ranges' property
[ Upstream commit 3482a7afb261e2de9269a7f9ad0f4a3a82a83a53 ]

Fix flag in PCIe controllers device-tree nodes 'ranges' property to correctly
represent 64-bit resources.

Fixes: 2602c32f15 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT")
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:31 +02:00
Jon Hunter
17232b92cf arm64: tegra: Fix ethernet phy-mode for Jetson Xavier
[ Upstream commit bba25915b172c72f6fa635f091624d799e3c9cae ]

The 'phy-mode' property is currently defined as 'rgmii' for Jetson
Xavier. This indicates that the RGMII RX and TX delays are set by the
MAC and the internal delays set by the PHY are not used.

If the Marvell PHY driver is enabled, such that it is used and not the
generic PHY, ethernet failures are seen (DHCP is failing to obtain an
IP address) and this is caused because the Marvell PHY driver is
disabling the internal RX and TX delays. For Jetson Xavier the internal
PHY RX and TX delay should be used and so fix this by setting the
'phy-mode' to 'rgmii-id' and not 'rgmii'.

Fixes: f89b58ce71 ("arm64: tegra: Add ethernet controller on Tegra194")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:31 +02:00
Loic Poulain
a798daf42a arm64: dts: msm8996: Fix CSI IRQ types
[ Upstream commit 4a4a26317ec8aba575f6b85789a42639937bc1a4 ]

Each IRQ_TYPE_NONE interrupt causes a warning at boot.
Fix that by defining an appropriate type.

Fixes: e0531312e7 ("arm64: dts: qcom: msm8996: Add CAMSS support")
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1587470425-13726-1-git-send-email-loic.poulain@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:25 +02:00
Jonathan Marek
0c48b6df64 arm64: dts: qcom: fix pm8150 gpio interrupts
[ Upstream commit 61d2ca503d0b55d2849fd656ce51d8e1e9ba0b6c ]

This was mistakenly copied from the downstream dts, however the upstream
driver works differently.

I only tested this with the pm8150_gpios node (used with volume button),
but the 2 others should be the same.

Fixes: e92b61c8e7 ("arm64: dts: qcom: pm8150l: Add base dts file")
Fixes: 229d5bcad0 ("arm64: dts: qcom: pm8150b: Add base dts file")
Fixes: 5101f22a5c ("arm64: dts: qcom: pm8150: Add base dts file")
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200420153543.14512-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:21 +02:00
Amit Kucheria
ef0c0fbf1d arm64: dts: qcom: msm8916: remove unit name for thermal trip points
[ Upstream commit fe2aff0c574d206f34f1864d5a0b093694c27142 ]

The thermal trip points have unit name but no reg property, so we can
remove them. It also fixes the following warnings from 'make dtbs_check'
after adding the thermal yaml bindings.

arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: thermal-zones:
gpu-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: thermal-zones:
camera-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: thermal-zones:
modem-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'

arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: thermal-zones:
gpu-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: thermal-zones:
camera-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: thermal-zones:
modem-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/2d3d045c18a2fb85b28cf304aa11ae6e6538d75e.1585562459.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:20 +02:00
Hsin-Yi Wang
0e5d7bff3b arm64: dts: mt8173: fix unit name warnings
[ Upstream commit 72b29215aced394d01ca25e432963b619daa0098 ]

Fixing several unit name warnings:

Warning (unit_address_vs_reg): /oscillator@0: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /oscillator@1: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /oscillator@2: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /thermal-zones/cpu_thermal/trips/trip-point@0: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /thermal-zones/cpu_thermal/trips/trip-point@1: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /thermal-zones/cpu_thermal/trips/cpu_crit@0: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /thermal-zones/cpu_thermal/cooling-maps/map@0: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /thermal-zones/cpu_thermal/cooling-maps/map@1: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /reserved-memory/vpu_dma_mem_region: node has a reg or ranges property, but no unit name
Warning (simple_bus_reg): /soc/pinctrl@10005000: simple-bus unit address format error, expected "1000b000"
Warning (simple_bus_reg): /soc/interrupt-controller@10220000: simple-bus unit address format error, expected "10221000"

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200210063523.133333-4-hsinyi@chromium.org
[mb: drop fixes for '_' in property name]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:20 +02:00
Andre Przywara
24911d387b arm64: dts: fvp/juno: Fix node address fields
[ Upstream commit bb5cce12ac717c7462217cd493ed701d12d6dbce ]

The Arm Ltd. boards were using an outdated address convention in the DT
node names, by separating the high from the low 32-bits of an address by
a comma.

Remove the comma from the node name suffix to be DT spec compliant.

Link: https://lore.kernel.org/r/20200513103016.130417-3-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:15 +02:00
Andre Przywara
492c50fe65 arm64: dts: fvp: Fix GIC child nodes
[ Upstream commit 78631aecc52c4b2adcf611769df2ff9c67ac16d0 ]

The GIC DT nodes for the fastmodels were not fully compliant with the
DT binding, which has certain expectations about child nodes and their
size and address cells values.

Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
This requires adjusting the interrupt nexus nodes as well, as one
field of the interrupt-map property depends on the GIC's address-size.

Since the .dts files share interrupt nexus nodes across different
interrupt controllers (GICv2 vs. GICv3), we need to use the only
commonly allowed #address-size value of <1> for both.

Link: https://lore.kernel.org/r/20200513103016.130417-11-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:14 +02:00
Andre Przywara
4e55b843fa arm64: dts: juno: Fix GIC child nodes
[ Upstream commit a78aee9e434932a500db36cc6d88daeff3745e9f ]

The GIC DT nodes for the Juno boards were not fully compliant with
the DT binding, which has certain expectations about child nodes and
their size and address cells values.

Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
This requires adjusting the interrupt nexus nodes as well, as one
field of the interrupt-map property depends on the GIC's address-size.

Link: https://lore.kernel.org/r/20200513103016.130417-10-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:14 +02:00
Marek Behún
7df82e1754 arm64: dts: armada-3720-turris-mox: fix SFP binding
[ Upstream commit c2671acbbbd822ef077cc168991e0a7dbe2172c9 ]

The sfp compatible should be 'sff,sfp', not 'sff,sfp+'. We used patched
kernel where the latter was working.

Fixes: 7109d817db ("arm64: dts: marvell: add DTS for Turris Mox")
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:14 +02:00
Marek Behún
4ca96a5de8 arm64: dts: armada-3720-turris-mox: forbid SDR104 on SDIO for FCC purposes
[ Upstream commit 7a2c36b039d2343cc29fec6102da839477b8dc60 ]

Use sdhci-caps-mask to forbid SDR104 mode on the SDIO capable SDHCI
controller. Without this the device cannot pass electromagnetic
interference certifications.

Fixes: 7109d817db ("arm64: dts: marvell: add DTS for Turris Mox")
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:14 +02:00
Neil Armstrong
66a177ae4e arm64: dts: meson: fixup SCP sram nodes
[ Upstream commit 9ecded10b4b6af238da0c86197b0418912e7513e ]

The GX and AXG SCP sram nodes were using invalid compatible and
node names for the sram entries.

Fixup the sram entries node names, and use proper compatible for them.

It notably fixes:
sram@c8000000: 'scp-shmem@0', 'scp-shmem@200' do not match any of the regexes: '^([a-z]*-)?sram(-section)?@[a-f0-9]+$', 'pinctrl-[0-9]+'

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200326165958.19274-3-narmstrong@baylibre.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-24 17:50:11 +02:00
Richard Zhu
1bda33273e MLK-24171-1 arm64: dts: imx8mp: verify the pcie pll sys ref clock
Verify the PCIe PLL_SYS reference clock source on EVK board.
The external OSC clock is used as PCIe REF clock source in default.
NOTE: Change the ext_osc of pcie/pcie_phy to '0' when enable SYS_PLL
clock mode.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-24 10:00:28 +08:00
Fugang Duan
c18960b985 MLK-24352-04 arm64: dts: imx8mp-evk: enable bt hsp for nxp 88w8997
Enable nxp 88w8997 bluetooth HSP for imx8mp evk board.

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-22 18:10:16 +08:00
Fugang Duan
5cb04e92df MLK-24352-03 arm64: dts: imx8x-mek: enable bt hsp for nxp 88w8997
Enable nxp 88w8997 bluetooth HSP on imx8qxp/imx8dx mek boards.

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-22 18:10:16 +08:00
Fugang Duan
f6421dcab6 MLK-24352-02 arm64: dts: imx8qm-mek: enable bt hsp for nxp 88w8997
Enable nxp 88w8997 bluetooth HSP.

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-22 18:10:16 +08:00
Fugang Duan
2ccb93bf68 MLK-24352-01 arm64: dts: imx8qm-mek: correct the sai1 pins for wm8960
Correct the sai1 pins for wm8960.

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-22 18:10:16 +08:00
Viorel Suman
7d64d08892 MLK-24351: arch: arm64: imx8mp: Add device tree file for SPDIF loopback mode
Added device tree support for SPDIF loopback mode on imx8mp-evk.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
2020-06-22 11:45:58 +03:00
Luke Nelson
b432540123 arm64: insn: Fix two bugs in encoding 32-bit logical immediates
[ Upstream commit 579d1b3faa3735e781ff74aac0afd598515dbc63 ]

This patch fixes two issues present in the current function for encoding
arm64 logical immediates when using the 32-bit variants of instructions.

First, the code does not correctly reject an all-ones 32-bit immediate,
and returns an undefined instruction encoding.

Second, the code incorrectly rejects some 32-bit immediates that are
actually encodable as logical immediates. The root cause is that the code
uses a default mask of 64-bit all-ones, even for 32-bit immediates.
This causes an issue later on when the default mask is used to fill the
top bits of the immediate with ones, shown here:

  /*
   * Pattern: 0..01..10..01..1
   *
   * Fill the unused top bits with ones, and check if
   * the result is a valid immediate (all ones with a
   * contiguous ranges of zeroes).
   */
  imm |= ~mask;
  if (!range_of_ones(~imm))
          return AARCH64_BREAK_FAULT;

To see the problem, consider an immediate of the form 0..01..10..01..1,
where the upper 32 bits are zero, such as 0x80000001. The code checks
if ~(imm | ~mask) contains a range of ones: the incorrect mask yields
1..10..01..10..0, which fails the check; the correct mask yields
0..01..10..0, which succeeds.

The fix for both issues is to generate a correct mask based on the
instruction immediate size, and use the mask to check for all-ones,
all-zeroes, and values wider than the mask.

Currently, arch/arm64/kvm/va_layout.c is the only user of this function,
which uses 64-bit immediates and therefore won't trigger these bugs.

We tested the new code against llvm-mc with all 1,302 encodable 32-bit
logical immediates and all 5,334 encodable 64-bit logical immediates.

Fixes: ef3935eeeb ("arm64: insn: Add encoder for bitwise operations using literals")
Suggested-by: Will Deacon <will@kernel.org>
Co-developed-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200508181547.24783-2-luke.r.nels@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-22 09:30:53 +02:00
Daniel Thompson
9a0c994191 arm64: cacheflush: Fix KGDB trap detection
[ Upstream commit ab8ad279ceac4fc78ae4dcf1a26326e05695e537 ]

flush_icache_range() contains a bodge to avoid issuing IPIs when the kgdb
trap handler is running because issuing IPIs is unsafe (and not needed)
in this execution context. However the current test, based on
kgdb_connected is flawed: it both over-matches and under-matches.

The over match occurs because kgdb_connected is set when gdb attaches
to the stub and remains set during normal running. This is relatively
harmelss because in almost all cases irq_disabled() will be false.

The under match is more serious. When kdb is used instead of kgdb to access
the debugger then kgdb_connected is not set in all the places that the
debug core updates sw breakpoints (and hence flushes the icache). This
can lead to deadlock.

Fix by replacing the ad-hoc check with the proper kgdb macro. This also
allows us to drop the #ifdef wrapper.

Fixes: 3b8c9f1cdf ("arm64: IPI each CPU after invalidating the I-cache for kernel mappings")
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200504170518.2959478-1-daniel.thompson@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-22 09:30:52 +02:00
Gavin Shan
072d23eef6 arm64/kernel: Fix range on invalidating dcache for boot page tables
[ Upstream commit 9d2d75ede59bc1edd8561f2ee9d4702a5ea0ae30 ]

Prior to commit 8eb7e28d4c ("arm64/mm: move runtime pgds to
rodata"), idmap_pgd_dir, tramp_pg_dir, reserved_ttbr0, swapper_pg_dir,
and init_pg_dir were contiguous at the end of the kernel image. The
maintenance at the end of __create_page_tables assumed these were
contiguous, and affected everything from the start of idmap_pg_dir
to the end of init_pg_dir.

That commit moved all but init_pg_dir into the .rodata section, with
other data placed between idmap_pg_dir and init_pg_dir, but did not
update the maintenance. Hence the maintenance is performed on much
more data than necessary (but as the bootloader previously made this
clean to the PoC there is no functional problem).

As we only alter idmap_pg_dir, and init_pg_dir, we only need to perform
maintenance for these. As the other dirs are in .rodata, the bootloader
will have initialised them as expected and cleaned them to the PoC. The
kernel will initialize them as necessary after enabling the MMU.

This patch reworks the maintenance to only cover the idmap_pg_dir and
init_pg_dir to avoid this unnecessary work.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200427235700.112220-1-gshan@redhat.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-22 09:30:50 +02:00
Jason Liu
5691e22711 Merge tag 'v5.4.47' into imx_5.4.y
* tag 'v5.4.47': (2193 commits)
  Linux 5.4.47
  KVM: arm64: Save the host's PtrAuth keys in non-preemptible context
  KVM: arm64: Synchronize sysreg state on injecting an AArch32 exception
  ...

 Conflicts:
	arch/arm/boot/dts/imx6qdl.dtsi
	arch/arm/mach-imx/Kconfig
	arch/arm/mach-imx/common.h
	arch/arm/mach-imx/suspend-imx6.S
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
	arch/powerpc/include/asm/cacheflush.h
	drivers/cpufreq/imx6q-cpufreq.c
	drivers/dma/imx-sdma.c
	drivers/edac/synopsys_edac.c
	drivers/firmware/imx/imx-scu.c
	drivers/net/ethernet/freescale/fec.h
	drivers/net/ethernet/freescale/fec_main.c
	drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
	drivers/net/phy/phy_device.c
	drivers/perf/fsl_imx8_ddr_perf.c
	drivers/usb/cdns3/gadget.c
	drivers/usb/dwc3/gadget.c
	include/uapi/linux/dma-buf.h

Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
2020-06-19 17:32:49 +08:00
Fugang Duan
236e62fc5e LF-1569 dts: arm64: imx8mn-evk: enable 8mic revE board
Add support for 8mic rev E PDM mic array board
support for gpio leds and software keys events:

SW1: KEY_F9 Factory reset for Android
SW2: VOLUME_MUTE
SW3: VOLUME_UP
SW4: VOLUME_DOWN

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-19 16:05:04 +08:00
Fugang Duan
d07cf6a7eb MLK-24342 arm64: dts: imx8mn-evk: enable bt hsp for nxp 88w8987
Enable nxp 88w8987 bluetooth HSP.
Note:
- 88w8987 bt i2s only support pcm mode A.

Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-19 16:05:04 +08:00
Marc Zyngier
d96ef8fa95 KVM: arm64: Save the host's PtrAuth keys in non-preemptible context
commit ef3e40a7ea8dbe2abd0a345032cd7d5023b9684f upstream.

When using the PtrAuth feature in a guest, we need to save the host's
keys before allowing the guest to program them. For that, we dump
them in a per-CPU data structure (the so called host context).

But both call sites that do this are in preemptible context,
which may end up in disaster should the vcpu thread get preempted
before reentering the guest.

Instead, save the keys eagerly on each vcpu_load(). This has an
increased overhead, but is at least safe.

Cc: stable@vger.kernel.org
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-06-17 16:40:38 +02:00
Marc Zyngier
8128576788 KVM: arm64: Synchronize sysreg state on injecting an AArch32 exception
commit 0370964dd3ff7d3d406f292cb443a927952cbd05 upstream.

On a VHE system, the EL1 state is left in the CPU most of the time,
and only syncronized back to memory when vcpu_put() is called (most
of the time on preemption).

Which means that when injecting an exception, we'd better have a way
to either:
(1) write directly to the EL1 sysregs
(2) synchronize the state back to memory, and do the changes there

For an AArch64, we already do (1), so we are safe. Unfortunately,
doing the same thing for AArch32 would be pretty invasive. Instead,
we can easily implement (2) by calling the put/load architectural
backends, and keep preemption disabled. We can then reload the
state back into EL1.

Cc: stable@vger.kernel.org
Reported-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-06-17 16:40:38 +02:00
Marc Zyngier
205b4c441b KVM: arm64: Make vcpu_cp1x() work on Big Endian hosts
commit 3204be4109ad681523e3461ce64454c79278450a upstream.

AArch32 CP1x registers are overlayed on their AArch64 counterparts
in the vcpu struct. This leads to an interesting problem as they
are stored in their CPU-local format, and thus a CP1x register
doesn't "hit" the lower 32bit portion of the AArch64 register on
a BE host.

To workaround this unfortunate situation, introduce a bias trick
in the vcpu_cp1x() accessors which picks the correct half of the
64bit register.

Cc: stable@vger.kernel.org
Reported-by: James Morse <james.morse@arm.com>
Tested-by: James Morse <james.morse@arm.com>
Acked-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-06-17 16:40:34 +02:00
James Morse
f9551b7371 KVM: arm64: Stop writing aarch32's CSSELR into ACTLR
commit 7c582bf4ed84f3eb58bdd1f63024a14c17551e7d upstream.

aarch32 has pairs of registers to access the high and low parts of 64bit
registers. KVM has a union of 64bit sys_regs[] and 32bit copro[]. The
32bit accessors read the high or low part of the 64bit sys_reg[] value
through the union.

Both sys_reg_descs[] and cp15_regs[] list access_csselr() as the accessor
for CSSELR{,_EL1}. access_csselr() is only aware of the 64bit sys_regs[],
and expects r->reg to be 'CSSELR_EL1' in the enum, index 2 of the 64bit
array.

cp15_regs[] uses the 32bit copro[] alias of sys_regs[]. Here CSSELR is
c0_CSSELR which is the same location in sys_reg[]. r->reg is 'c0_CSSELR',
index 4 in the 32bit array.

access_csselr() uses the 32bit r->reg value to access the 64bit array,
so reads and write the wrong value. sys_regs[4], is ACTLR_EL1, which
is subsequently save/restored when we enter the guest.

ACTLR_EL1 is supposed to be read-only for the guest. This register
only affects execution at EL1, and the host's value is restored before
we return to host EL1.

Convert the 32bit register index back to the 64bit version.

Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200529150656.7339-2-james.morse@arm.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-06-17 16:40:34 +02:00
Nick Desaulniers
07ffdf0d98 arm64: acpi: fix UBSAN warning
commit a194c33f45f83068ef13bf1d16e26d4ca3ecc098 upstream.

Will reported a UBSAN warning:

UBSAN: null-ptr-deref in arch/arm64/kernel/smp.c:596:6
member access within null pointer of type 'struct acpi_madt_generic_interrupt'
CPU: 0 PID: 0 Comm: swapper Not tainted 5.7.0-rc6-00124-g96bc42ff0a82 #1
Call trace:
 dump_backtrace+0x0/0x384
 show_stack+0x28/0x38
 dump_stack+0xec/0x174
 handle_null_ptr_deref+0x134/0x174
 __ubsan_handle_type_mismatch_v1+0x84/0xa4
 acpi_parse_gic_cpu_interface+0x60/0xe8
 acpi_parse_entries_array+0x288/0x498
 acpi_table_parse_entries_array+0x178/0x1b4
 acpi_table_parse_madt+0xa4/0x110
 acpi_parse_and_init_cpus+0x38/0x100
 smp_init_cpus+0x74/0x258
 setup_arch+0x350/0x3ec
 start_kernel+0x98/0x6f4

This is from the use of the ACPI_OFFSET in
arch/arm64/include/asm/acpi.h. Replace its use with offsetof from
include/linux/stddef.h which should implement the same logic using
__builtin_offsetof, so that UBSAN wont warn.

Reported-by: Will Deacon <will@kernel.org>
Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/lkml/20200521100952.GA5360@willie-the-truck/
Link: https://lore.kernel.org/r/20200608203818.189423-1-ndesaulniers@google.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-06-17 16:40:28 +02:00
Peter Chen
f45a6bb1d4
MLK-24283-4 ARM64: imx_v8_defconfig: build EH Test Fixture in
During the USB certification, the Image may be changed, so it
is not aligned with rootfs, and cause this test fixture module
not loading, therefore the related test will fail.

Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
2020-06-17 10:06:13 +08:00
Fugang Duan
890e0a2a6b MLK-24332 arm64: dts: imx8qm-mek: enable M.2/uSD sdio wlan HIF support
Add M.2/uSD sdio wlan HIF support.

Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-16 15:08:02 +08:00
Fugang Duan
0358d500ab MLK-24329 arm64: dts: imx8mm-evk: set the usd io voltage fixed at 1.8v
Set the usd slot IO voltage fixed at 1.8v.

Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-16 15:07:49 +08:00
Andy Duan
86a746d5ac MLK-24330 arm64: dts: imx8mq-evk: set usd io voltage fixed at 1.8v
Set the usd slot IO voltage fixed at 1.8v.

Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-16 15:07:31 +08:00
Peng Fan
029bc3d1e4 MLK-24324 arm64: dts: imx8qm: passthrough dsp to domu
We need passthrough dsp to domu, it is in vpu ss,
without power off it, vpu ss will not be really off.
And domu audio also needs dsp to work proper for hifi.

Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: zhang sanshan <pete.zhang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-06-15 13:55:22 +08:00
zhang sanshan
f3cd2f6a3e MA-17261 crtc do not bind encoder in dpu driver correctly in xen for android auto
display-subsystem in imx8qm-ss-dc.dtsi cover the domu dts.
dpu2_disp0 and dpu2_disp1 are added into “ports”, however dpu2 do not enable.
It cause bind failed and it have no display shown.

Change-Id: I2a16708ba49a64b61d6bd87ffdce82c0734dad2c
Signed-off-by: zhang sanshan <pete.zhang@nxp.com>
(cherry picked from commit 75b467a4eadd1b541cbdf1ef81de12550edbdc44)
2020-06-15 13:55:21 +08:00
Richard Zhu
5a38f632e9 MLK-24012-07 arm64: dts: add imx8dxl pcie ep support
Add the iMX8DXL PCIe EP support and verified on EVK board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-11 10:06:32 +08:00
Richard Zhu
a96d687775 MLK-24012-06 arm64: dts: add imx8m pcie ep support
Add the PCIe EP mode on iMX8MQ/MM/MP platforms.
And enable the EP mode on EVK boards.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-11 10:06:32 +08:00
Richard Zhu
11b7bf3e9d MLK-24012-05 arm64: dts: add imx8qm pciea ep support
Add the iMX8QM PCIEA EP support and verified on MEK board.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2020-06-11 10:06:32 +08:00