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MLK-24752-1 arch: arm64: imx8m: add IR support 

Add IR support for i.MX8MM/MN/MQ.

Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
This commit is contained in:
Joakim Zhang 2020-09-02 17:13:48 +08:00
parent 70f26e7ba5
commit 65aa1b7ba2
3 changed files with 39 additions and 0 deletions
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13
arch/arm64/boot/dts/freescale/imx8mm-evk.dts
View File

@ -47,6 +47,13 @@
#reset-cells = <0>;
};
ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ir_recv>;
};
pcie0_refclk: pcie0-refclk {
compatible = "fixed-clock";
#clock-cells = <0>;
@ -682,6 +689,12 @@
>;
};
pinctrl_ir_recv: ir-recv {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f
>;
};
pinctrl_fec1: fec1grp {
fsl,pins = <
MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3

13
arch/arm64/boot/dts/freescale/imx8mn-evk.dts
View File

@ -46,6 +46,13 @@
#reset-cells = <0>;
};
ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ir_recv>;
};
usdhc1_pwrseq: usdhc1_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
@ -171,6 +178,12 @@
>;
};
pinctrl_ir_recv: ir-recv {
fsl,pins = <
MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f
>;
};
pinctrl_fec1: fec1grp {
fsl,pins = <
MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x3

13
arch/arm64/boot/dts/freescale/imx8mq-evk.dts
View File

@ -41,6 +41,13 @@
#reset-cells = <0>;
};
ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ir_recv>;
};
resmem: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@ -813,6 +820,12 @@
};
pinctrl_ir_recv: ir-recv {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x4f
>;
};
pinctrl_csi1_pwn: csi1_pwn_grp {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19