brain-hackers_pepepper-mirror
/
linux-brain
mirror of https://github.com/brain-hackers/linux-brain.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

MLK-24914 irqchip: gpcv2: Revert "MLK-23354 irqchip: gpcv2: Add wait mode workaround on imx8mp" 

This reverts commit 3d65a35181.

The i.MX8MP A0 silicon will not be supported, so revert the SW workaround
for A0 to provide more robust & clean code support for i.MX8MP.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Tested-by: Jian Li <jian.li@nxp.com>
This commit is contained in:
Jacky Bai 2020-09-25 10:43:13 +08:00
parent 1e2976079b
commit 9e0665fc3f
3 changed files with 3 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/freescale/imx8mp-evk-root.dts
View File

@ -19,8 +19,6 @@
/delete-property/ compatible;
};
/delete-node/ &gpc;
&clk {
init-on-array = <IMX8MP_CLK_USDHC3_ROOT
IMX8MP_CLK_NAND_USDHC_BUS

13
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@ -15,7 +15,7 @@
/ {
compatible = "fsl,imx8mp";
interrupt-parent = <&gpc>;
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
@ -728,15 +728,6 @@
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;
};
gpc: gpc@303a0000 {
compatible = "fsl,imx8mp-gpc";
reg = <0x303a0000 0x10000>;
interrupt-parent = <&gic>;
interrupt-controller;
broken-wake-request-signals;
#interrupt-cells = <3>;
};
};
aips2: bus@30400000 {
@ -1596,6 +1587,7 @@
reg = <0x32fc2000 0x1000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
interrupt-parent = <&gic>;
#interrupt-cells = <1>;
fsl,channel = <1>;
fsl,num-irqs = <64>;
@ -2443,5 +2435,4 @@
};
};
};
};

5
drivers/irqchip/irq-imx-gpcv2.c
View File

@ -332,7 +332,6 @@ static const struct irq_domain_ops gpcv2_irqchip_data_domain_ops = {
static const struct of_device_id gpcv2_of_match[] = {
{ .compatible = "fsl,imx7d-gpc", .data = (const void *) 2 },
{ .compatible = "fsl,imx8mq-gpc", .data = (const void *) 4 },
{ .compatible = "fsl,imx8mp-gpc", .data = (const void *) 4 },
{ /* END */ }
};
@ -388,8 +387,7 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node,
}
irq_set_default_host(domain);
if (of_machine_is_compatible("fsl,imx8mq") ||
of_machine_is_compatible("fsl,imx8mp")) {
if (of_machine_is_compatible("fsl,imx8mq")) {
/* sw workaround for IPI can't wakeup CORE
ERRATA(ERR011171) on i.MX8MQ */
err11171 = true;
@ -437,4 +435,3 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node,
IRQCHIP_DECLARE(imx_gpcv2_imx7d, "fsl,imx7d-gpc", imx_gpcv2_irqchip_init);
IRQCHIP_DECLARE(imx_gpcv2_imx8mq, "fsl,imx8mq-gpc", imx_gpcv2_irqchip_init);
IRQCHIP_DECLARE(imx_gpcv2_imx8mp, "fsl,imx8mp-gpc", imx_gpcv2_irqchip_init);