u-boot-brain/drivers/clk/sunxi
Andre Przywara e0c7ce7e52 sunxi: clk: A80: add MMC clock support
The A80 handles resets and clock gates for the MMC devices differently,
outside of the CCU IP block. Consequently we have a separate clock
device with a separate binding for that.

Implement that with the respective clock gates and resets to allow the
A80 taking part in the DM_MMC game.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: fix a80 mmc clock config compatible]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-01-29 23:33:08 +05:30
..
clk_a10.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_a10s.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_a23.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_a31.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_a64.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_a80.c sunxi: clk: A80: add MMC clock support 2019-01-29 23:33:08 +05:30
clk_a83t.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_h3.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_h6.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_r40.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_sunxi.c clk: Add Allwinner A64 CLK driver 2019-01-18 22:19:08 +05:30
clk_v3s.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
Kconfig clk: sunxi: Add Allwinner A80 CLK driver 2019-01-18 22:19:09 +05:30
Makefile clk: sunxi: Add Allwinner A80 CLK driver 2019-01-18 22:19:09 +05:30