u-boot-brain/arch/mips/mach-mscc
Lars Povlsen 7048bb13b2 mips: vcoreiii: Fix cache coherency issues
This patch fixes an stability issue seen on some vcoreiii targets,
which was root caused to a cache inconsistency situation.

The inconsistency was caused by having kuseg pointing to NOR area but
used as a stack/gd/heap area during initialization, while only
relatively late remapping the RAM area into kuseg position.

The fix is to initialize the DDR right after the TLB setup, and then
remapping it into position before gd/stack/heap usage.

Reported-by: Ramin Seyed-Moussavi <ramin.moussavi@yacoub.de>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
2020-04-09 18:55:59 +02:00
..
include mips: vcoreiii: Fix cache coherency issues 2020-04-09 18:55:59 +02:00
cpu.c mips: vcoreiii: Fix cache coherency issues 2020-04-09 18:55:59 +02:00
dram.c mips: vcoreiii: Fix cache coherency issues 2020-04-09 18:55:59 +02:00
gpio.c mips: mscc: Add generic GPIO control utility function 2019-01-16 13:56:43 +01:00
Kconfig MSCC: delete obsolete reference to MSCC_BITBANG_SPI_GPIO 2019-05-03 16:42:23 +02:00
lowlevel_init_luton.S MSCC: add support for Luton SoCs 2018-12-19 15:23:01 +01:00
lowlevel_init.S mips: vcoreiii: Fix cache coherency issues 2020-04-09 18:55:59 +02:00
Makefile MSCC: Add board support for Serval SoC family. 2019-01-23 18:28:09 +01:00
phy.c mips: mscc: Add generic PHY MIIM utility functions 2019-01-16 13:56:43 +01:00
reset.c mips: mscc: serval: Fix reset 2019-05-03 16:42:23 +02:00