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b87e6f88e9
u-boot-brain/arch/arm/cpu/armv8
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York Sun b87e6f88e9 armv8/fsl-lsch3: Add support for second DDR clock 
FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for
general DDR controlers, and another clock for DP-DDR. DDR driver needs to
change to support multiple clocks.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-02-24 13:09:14 -08:00
..
fsl-lsch3 armv8/fsl-lsch3: Add support for second DDR clock 2015-02-24 13:09:14 -08:00
cache_v8.c armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack 2015-02-24 13:08:46 -08:00
cache.S armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack 2015-02-24 13:08:46 -08:00
config.mk arm: Switch to -mno-unaligned-access when supported by the compiler 2014-02-26 21:19:32 +01:00
cpu.c arm64: core support 2014-01-09 16:08:44 +01:00
exceptions.S arm64: core support 2014-01-09 16:08:44 +01:00
generic_timer.c arm64: core support 2014-01-09 16:08:44 +01:00
Makefile kbuild: use SoC-specific CONFIG to descend into SoC directory 2014-11-23 06:49:02 -05:00
start.S Arm64 fix a bug of vbar_el3 initialization 2014-05-25 15:26:00 +02:00
tlb.S arm64: core support 2014-01-09 16:08:44 +01:00
transition.S armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page 2014-09-25 08:36:19 -07:00
u-boot.lds arm64: core support 2014-01-09 16:08:44 +01:00