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b77c3547e8
T114, like T30, does not have a separate/different DVC (power I2C) controller like T20 - all 5 I2C controllers are identical, but I2C5 is used to designate the controller intended for power control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
70 lines
1.4 KiB
Plaintext
70 lines
1.4 KiB
Plaintext
/include/ "skeleton.dtsi"
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/ {
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compatible = "nvidia,tegra114";
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aliases {
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i2c0 = "/i2c@7000d000";
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i2c1 = "/i2c@7000c000";
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i2c2 = "/i2c@7000c400";
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i2c3 = "/i2c@7000c500";
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i2c4 = "/i2c@7000c700";
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};
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tegra_car: clock@60006000 {
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compatible = "nvidia,tegra114-car";
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reg = <0x60006000 0x1000>;
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#clock-cells = <1>;
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};
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i2c@7000c000 {
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compatible = "nvidia,tegra114-i2c";
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reg = <0x7000c000 0x100>;
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interrupts = <0 38 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 12>;
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status = "disabled";
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};
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i2c@7000c400 {
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compatible = "nvidia,tegra114-i2c";
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reg = <0x7000c400 0x100>;
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interrupts = <0 84 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 54>;
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status = "disabled";
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};
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i2c@7000c500 {
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compatible = "nvidia,tegra114-i2c";
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reg = <0x7000c500 0x100>;
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interrupts = <0 92 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 67>;
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status = "disabled";
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};
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i2c@7000c700 {
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compatible = "nvidia,tegra114-i2c";
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reg = <0x7000c700 0x100>;
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interrupts = <0 120 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 103>;
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status = "disabled";
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};
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i2c@7000d000 {
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compatible = "nvidia,tegra114-i2c";
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reg = <0x7000d000 0x100>;
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interrupts = <0 53 0x04>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car 47>;
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status = "disabled";
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};
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};
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