u-boot-brain/arch/arm/dts
Tom Warren b77c3547e8 Tegra114: fdt: Update DT files with I2C info for T114/Dalmore
T114, like T30, does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
I2C5 is used to designate the controller intended for power
control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:41 -07:00
..
exynos5250.dtsi EXYNOS5: Add device node for USB. 2013-01-08 21:14:34 +09:00
skeleton.dtsi arm: fdt: Add skeleton device tree file from kernel 2012-03-29 08:12:47 +02:00
tegra20.dtsi tegra20: fdt: add SPI SFLASH node 2013-02-11 10:35:24 -07:00
tegra30.dtsi tegra30: fdt: add SPI SLINK nodes 2013-02-11 10:35:24 -07:00
tegra114.dtsi Tegra114: fdt: Update DT files with I2C info for T114/Dalmore 2013-03-14 11:06:41 -07:00