u-boot-brain/drivers/ddr
Ley Foon Tan 456d45261b ddr: altera: Stratix10: Add ECC memory scrubbing
Scrub memory content if ECC is enabled and it is not
from warm reset boot.

Enable icache and dcache before scrub memory
and use "DC ZVA" instruction to clear memory
to zeros. This instruction writes a cache line
at a time and it can prevent false ECC error
trigger if write cache line partially.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17 22:20:17 +02:00
..
altera ddr: altera: Stratix10: Add ECC memory scrubbing 2019-04-17 22:20:17 +02:00
fsl configs: fsl: move DDR specific defines to Kconfig 2019-03-03 20:56:01 +05:30
imx drivers: ddr: introduce DDR driver for i.MX8M 2019-01-01 14:12:18 +01:00
marvell arm: mvebu: Add Marvell's integrated CPUs 2019-04-12 07:04:18 +02:00
microchip SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig drivers: ddr: introduce DDR driver for i.MX8M 2019-01-01 14:12:18 +01:00