u-boot-brain/arch/riscv
Bin Meng 4d2583dba1 riscv: Access CSRs using CSR numbers
We should prefer accessing CSRs using their CSR numbers
because:
1. It compiles fine with older toolchains.
2. We can use latest CSR names in #define macro names of CSR
   numbers as-per RISC-V spec.
3. We can access newly added CSRs even if toolchain does not
   recognize newly added CSRs by name.

This commit is inspired from Linux kernel commit a3182c91ef4e
("RISC-V: Access CSRs using CSR numbers").

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-08-15 13:42:28 +08:00
..
cpu riscv: Access CSRs using CSR numbers 2019-08-15 13:42:28 +08:00
dts dts: switch spi-flash to jedec, spi-nor compatible 2019-04-12 10:54:27 +05:30
include/asm riscv: Access CSRs using CSR numbers 2019-08-15 13:42:28 +08:00
lib efi_loader: use predefined constants in crt0_*_efi.S 2019-07-16 22:17:14 +00:00
config.mk riscv: qemu: define standalone load address 2019-01-15 09:36:31 +08:00
Kconfig riscv: Add Microchip MPFS Icicle board support 2019-06-05 13:19:24 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00