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https://github.com/brain-hackers/u-boot-brain
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bb7288ef1c
Use SGI0 interruption and TAMP_BACKUP_MAGIC_NUMBER to synchronize the core1 boot sequence requested by core0 in psci_cpu_on(): - a initial interruption is needed in ROM code after RCC_MP_GRSTCSETR_MPUP1RST (psci_cpu_off) - the ROM code set to 0 the 2 registers + TAMP_BACKUP_BRANCH_ADDRESS + TAMP_BACKUP_MAGIC_NUMBER when magic is not egual to BOOT_API_A7_CORE0_MAGIC_NUMBER This patch solve issue for cpu1 restart in kernel. echo 0 > /sys/devices/system/cpu/cpu1/online echo 1 > /sys/devices/system/cpu/cpu1/online Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
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| .. | ||
| cpu | ||
| dts | ||
| include | ||
| lib | ||
| mach-aspeed | ||
| mach-at91 | ||
| mach-bcm283x | ||
| mach-bcmstb | ||
| mach-davinci | ||
| mach-exynos | ||
| mach-highbank | ||
| mach-imx | ||
| mach-integrator | ||
| mach-k3 | ||
| mach-keystone | ||
| mach-kirkwood | ||
| mach-mediatek | ||
| mach-meson | ||
| mach-mvebu | ||
| mach-omap2 | ||
| mach-orion5x | ||
| mach-owl | ||
| mach-qemu | ||
| mach-rmobile | ||
| mach-rockchip | ||
| mach-s5pc1xx | ||
| mach-snapdragon | ||
| mach-socfpga | ||
| mach-sti | ||
| mach-stm32 | ||
| mach-stm32mp | ||
| mach-sunxi | ||
| mach-tegra | ||
| mach-uniphier | ||
| mach-versal | ||
| mach-versatile | ||
| mach-zynq | ||
| mach-zynqmp | ||
| mach-zynqmp-r5 | ||
| thumb1/include/asm/proc-armv | ||
| config.mk | ||
| Kconfig | ||
| Kconfig.debug | ||
| Makefile | ||