Tom Rini 7c352cd38d am33xx: Re-enable SW levelling for DDR2 ... The recent changes for hw leveling on am33xx were not intended for DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config value to check against. This lets us pass in the value we would use to configure, when we have not yet configured the board yet. In other cases update the call to be as functional as before and check an already programmed value in. Tested-by: Yan Liu <yan-liu@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2015-06-15 10:57:26 -04:00
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abb.c	DRA7: add ABB setup for MPU voltage domain	2014-01-24 11:41:17 -05:00
config.mk	kbuild: use shorten logs for mkimage rules	2014-02-25 11:01:29 -05:00
dra7xx_iodelay.c	ARM: DRA7: Add support for manual mode configuration	2015-06-12 13:02:05 -04:00
emif.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
hw_data.c	ARM: BeagleBoard-x15: Enable i2c5 clocks	2015-06-15 10:57:26 -04:00
hwinit.c	am33xx: Re-enable SW levelling for DDR2	2015-06-15 10:57:26 -04:00
Kconfig	arch: Make board selection choices optional	2015-05-12 18:10:02 -04:00
Makefile	ARM: DRA7: Add support for IO delay configuration	2015-06-12 13:02:05 -04:00
prcm-regs.c	ARM: BeagleBoard-x15: Enable i2c5 clocks	2015-06-15 10:57:26 -04:00
sdram.c	ARM: DRA7xx: EMIF: Fix DLL_CALIB_CTRL register	2015-06-12 12:43:07 -04:00