Lokesh Vutla 784ab7c545 OMAP5: EMIF: Add support for DDR3 device ... In OMAP5432 EMIF controlller supports DDR3 device. This patch adds support for ddr3 device intialization and configuration. Initialization sequence is done as specified in JEDEC specs. This also adds support for ddr3 leveling. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2012-07-07 14:07:24 +02:00
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am33xx	am33xx: Do not call init_timer twice	2012-07-07 14:07:21 +02:00
exynos	EXYNOS: add LCD and MIPI DSI clock interface.	2012-05-15 08:31:29 +02:00
highbank	ARM: highbank: add reset support	2012-03-28 23:31:23 +02:00
imx-common	mx53loco: Allow to print CPU information at a later stage	2012-05-15 08:31:32 +02:00
mx5	mx5: Add clock config interface	2012-05-15 08:31:32 +02:00
mx6	i.MX6: add enable_sata_clock()	2012-05-15 08:31:33 +02:00
omap3	arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx	2012-05-15 08:31:41 +02:00
omap4	OMAP5: EMIF: Add support for DDR3 device	2012-07-07 14:07:24 +02:00
omap5	OMAP5: EMIF: Add support for DDR3 device	2012-07-07 14:07:24 +02:00
omap-common	OMAP5: EMIF: Add support for DDR3 device	2012-07-07 14:07:24 +02:00
s5p-common	S5P: support generic watchdog timer	2012-02-12 10:11:29 +01:00
s5pc1xx	armv7: add appropriate headers for assembly functions	2012-05-15 08:31:26 +02:00
tegra2	arm: Tegra: Use ODMDATA from BCT in IRAM	2012-07-07 14:07:21 +02:00
u8500	armv7: add appropriate headers for assembly functions	2012-05-15 08:31:26 +02:00
cache_v7.c	armv7: cache: remove flush on un-aligned invalidate	2011-09-04 11:36:16 +02:00
config.mk	armv7: Use -march=armv7-a and thereby enable Thumb-2	2012-05-15 08:31:26 +02:00
cpu.c	Add cache functions to SPL for armv7	2012-03-27 22:05:29 +02:00
Makefile	Add cache functions to SPL for armv7	2012-03-27 22:05:29 +02:00
start.S	armv7: add appropriate headers for assembly functions	2012-05-15 08:31:26 +02:00
syslib.c	ARMV7: Vexpress: fix build errors	2010-12-08 23:44:21 +01:00