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https://github.com/brain-hackers/u-boot-brain
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7c45fc9870
Add SiFive fu540 cpu to support RISC-V arch Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
39 lines
739 B
C
39 lines
739 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <init.h>
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#include <linux/sizes.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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return fdtdec_setup_mem_size_base();
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}
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int dram_init_banksize(void)
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{
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return fdtdec_setup_memory_banksize();
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}
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ulong board_get_usable_ram_top(ulong total_size)
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{
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#ifdef CONFIG_64BIT
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/*
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* Ensure that we run from first 4GB so that all
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* addresses used by U-Boot are 32bit addresses.
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*
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* This in-turn ensures that 32bit DMA capable
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* devices work fine because DMA mapping APIs will
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* provide 32bit DMA addresses only.
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*/
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if (gd->ram_top > SZ_4G)
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return SZ_4G;
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#endif
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return gd->ram_top;
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}
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